[llvm] [LV] Create in-loop sub reductions (PR #147026)

[Luke Lau via llvm-commits]

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@@ -5151,6 +5151,8 @@ bool AArch64TTIImpl::isLegalToVectorizeReduction(
     return false;
 
   switch (RdxDesc.getRecurrenceKind()) {
+  case RecurKind::Sub:
+  case RecurKind::AddChainWithSubs:
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lukel97 wrote:

Just a heads up, this caused some regressions on RISC-V because sub reductions are now a different type. We have a fix up to update the TTI hook here #154753 but it might be worth looking at the other targets/X86 to see if they also need to have their `isLegalToVectorizeReduction` updated?

https://github.com/llvm/llvm-project/pull/147026