[llvm] AMDGPU: Add some baseline test for mfma rewrite with subregister copies (PR #153018)

[Mikael Holmén via llvm-commits]

mikaelholmen wrote:

I see
```
Failed Tests (2):
  LLVM :: CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-subreg-insert-extract.mir
  LLVM :: CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-subreg-src2-chain.mir
```
with EXPENSIVE_CHECKS.
E.g.
```
# Machine code for function test_rewrite_mfma_src2_chain_different_subregs_same_reg_full_copy_use: NoPHIs, TracksLiveness, TracksDebugUserValues

0B	bb.0:
	  liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5
16B	  %0:vreg_64_align2 = COPY $vgpr4_vgpr5
32B	  %1:av_64_align2 = COPY $vgpr0_vgpr1
48B	  %2:av_64_align2 = COPY $vgpr2_vgpr3
64B	  %3:vreg_128_align2 = GLOBAL_LOAD_DWORDX4 %0:vreg_64_align2, 0, 0, implicit $exec :: (load (s128), addrspace 1)
80B	  undef %4.sub2_sub3:vreg_128_align2 = V_MFMA_F64_4X4X4F64_vgprcd_e64 %1:av_64_align2, %2:av_64_align2, %3.sub0_sub1:vreg_128_align2, 0, 0, 0, implicit $mode, implicit $exec
96B	  dead %other_use0:vreg_64_align2 = COPY %4.sub0_sub1:vreg_128_align2
112B	  %4.sub0_sub1:vreg_128_align2 = V_MFMA_F64_4X4X4F64_vgprcd_e64 %1:av_64_align2, %2:av_64_align2, %3.sub2_sub3:vreg_128_align2, 0, 0, 0, implicit $mode, implicit $exec
128B	  dead %other_use1:vreg_64_align2 = COPY %4.sub2_sub3:vreg_128_align2
144B	  dead %other_use2:vreg_64 = COPY %4.sub1_sub2:vreg_128_align2
160B	  %8:areg_128_align2 = COPY %4:vreg_128_align2
176B	  INLINEASM &"; use $0" [sideeffect] [attdialect], $0:[reguse:AReg_128_Align2], %8:areg_128_align2
192B	  GLOBAL_STORE_DWORDX4 %0:vreg_64_align2, %8:areg_128_align2, 0, 0, implicit $exec :: (store (s128), addrspace 1)
208B	  SI_RETURN

# End machine code for function test_rewrite_mfma_src2_chain_different_subregs_same_reg_full_copy_use.

*** Bad machine code: No live subrange at use ***
- function:    test_rewrite_mfma_src2_chain_different_subregs_same_reg_full_copy_use
- basic block: %bb.0  (0x557c337490d8) [0B;224B)
- instruction: 96B	dead %other_use0:vreg_64_align2 = COPY %4.sub0_sub1:vreg_128_align2
- operand 1:   %4.sub0_sub1:vreg_128_align2
- interval:    %4 [80r,112r:1)[112r,160r:0) 0 at 112r 1 at 80r  L000000000000000C [112r,160r:0) 0 at 112r  L0000000000000030 [80r,160r:0) 0 at 80r  L00000000000000C0 [80r,160r:0) 0 at 80r  L0000000000000003 [112r,160r:0) 0 at 112r  weight:1.472917e-02
- at:          96B
LLVM ERROR: Found 1 machine code errors.
```

https://github.com/llvm/llvm-project/pull/153018