[llvm] AMDGPU: Correct inst size for av_mov_b32_imm_pseudo (PR #154459)

[Matt Arsenault via llvm-commits]

https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/154459

In the AGPR case this will be an 8 byte instruction,
which is part of why this case is a pain to deal with in the
first place.

>From 72975dcdf6eb53060c94a91e73b16b4522085147 Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: Wed, 20 Aug 2025 11:52:05 +0900
Subject: [PATCH] AMDGPU: Correct inst size for av_mov_b32_imm_pseudo

In the AGPR case this will be an 8 byte instruction,
which is part of why this case is a pain to deal with in the
first place.
---
 llvm/lib/Target/AMDGPU/SIInstructions.td | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/llvm/lib/Target/AMDGPU/SIInstructions.td b/llvm/lib/Target/AMDGPU/SIInstructions.td
index bd5dfa92a8e43..d3c15bd8f672a 100644
--- a/llvm/lib/Target/AMDGPU/SIInstructions.td
+++ b/llvm/lib/Target/AMDGPU/SIInstructions.td
@@ -155,7 +155,8 @@ def AV_MOV_B32_IMM_PSEUDO
   let VOP3 = 1;
   let isMoveImm = 1;
   let SchedRW = [Write32Bit];
-  let Size = 4;
+  let Size = 8;
+  let FixedSize = true;
   let UseNamedOperandTable = 1;
 }