[llvm] [NFC][MC][Sparc] Rearrange decode functions in Sparc disassembler (PR #154973)
Rahul Joshi via llvm-commits
llvm-commits at lists.llvm.org
Fri Aug 22 14:53:10 PDT 2025
================
@@ -266,16 +266,48 @@ DecodeCoprocPairRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address,
return MCDisassembler::Success;
}
-static DecodeStatus DecodeCall(MCInst &Inst, unsigned insn, uint64_t Address,
- const MCDisassembler *Decoder);
-static DecodeStatus DecodeSIMM5(MCInst &Inst, unsigned insn, uint64_t Address,
- const MCDisassembler *Decoder);
-static DecodeStatus DecodeSIMM13(MCInst &Inst, unsigned insn, uint64_t Address,
- const MCDisassembler *Decoder);
+static bool tryAddingSymbolicOperand(int64_t Value, bool isBranch,
+ uint64_t Address, uint64_t Offset,
+ uint64_t Width, MCInst &MI,
+ const MCDisassembler *Decoder) {
+ return Decoder->tryAddingSymbolicOperand(MI, Value, Address, isBranch, Offset,
+ Width, /*InstSize=*/4);
+}
+
+static DecodeStatus DecodeCall(MCInst &MI, unsigned insn, uint64_t Address,
+ const MCDisassembler *Decoder) {
+ int64_t CallOffset = SignExtend64(fieldFromInstruction(insn, 0, 30), 30) * 4;
+ if (!tryAddingSymbolicOperand(Address + CallOffset, false, Address, 0, 30, MI,
+ Decoder))
+ MI.addOperand(MCOperand::createImm(CallOffset));
+ return MCDisassembler::Success;
+}
+
+static DecodeStatus DecodeSIMM5(MCInst &MI, unsigned insn, uint64_t Address,
+ const MCDisassembler *Decoder) {
+ assert(isUInt<5>(insn));
+ MI.addOperand(MCOperand::createImm(SignExtend64<5>(insn)));
+ return MCDisassembler::Success;
+}
+
+static DecodeStatus DecodeSIMM13(MCInst &MI, unsigned insn, uint64_t Address,
+ const MCDisassembler *Decoder) {
+ assert(isUInt<13>(insn));
+ MI.addOperand(MCOperand::createImm(SignExtend64<13>(insn)));
+ return MCDisassembler::Success;
+}
+
template <unsigned N>
constexpr static DecodeStatus DecodeDisp(MCInst &MI, uint32_t ImmVal,
----------------
jurahul wrote:
Fixed.
https://github.com/llvm/llvm-project/pull/154973
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