[llvm] [AMDGPU] Elide bitcast fold i64 imm to build_vector (PR #154115)
Janek van Oirschot via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 19 08:36:22 PDT 2025
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@@ -5318,6 +5325,8 @@ SDValue AMDGPUTargetLowering::PerformDAGCombine(SDNode *N,
if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Src)) {
SDLoc SL(N);
uint64_t CVal = C->getZExtValue();
+ if (canMov64b(CVal))
+ break;
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JanekvO wrote:
The original patch didn't add any tests and only affected about 4 tests; I've checked what tests are affected by removing this combine altogether locally and spawned #154363 with tests for which I enable gfx942 (I did cut a bunch of tests for gfx942 enabling that seemed to be more bug/crash tests rather than actual codegen tests)
https://github.com/llvm/llvm-project/pull/154115
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