[llvm] [RISCV] Add changes to have better coverage for qc.insb and qc.insbi (PR #154135)

[via llvm-commits]

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@@ -260,3 +260,271 @@ define i64 @insbi_i64_large_mask(i64 %in1) nounwind {
   %xor2 = xor i64 %and1, %in1
   ret i64 %xor2
 }
+
+define i32 @insb(i32 %in1, i32 %in2) nounwind {
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hchandel wrote:

I changed the code to match the correct patterns after observing them by  running InstCombine on the IR that we want to match. Hopefully, now it tests the correct patterns. Also all the test cases with immediate got changed by InstCombine to a sequence of `or` and `and` which I think is covered in #154023. 

https://github.com/llvm/llvm-project/pull/154135