[llvm] [M68k] Fix reverse BTST condition causing opposite failure/success logic (PR #153086)

[Dan Salvato via llvm-commits]

dansalvato wrote:

I added a test that includes my example, and while doing that I also managed to get a second pattern to lower into BTST (AND with masked bit), so I included that test case as well. Both are branching correctly with this patch.

https://github.com/llvm/llvm-project/pull/153086