[llvm] b2fae5b - [Mips] Remove custom "original type" handling (#154082)
via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 19 00:26:42 PDT 2025
Author: Nikita Popov
Date: 2025-08-19T09:26:38+02:00
New Revision: b2fae5b3c716eab31a43ef7776a46fb56547fa5b
URL: https://github.com/llvm/llvm-project/commit/b2fae5b3c716eab31a43ef7776a46fb56547fa5b
DIFF: https://github.com/llvm/llvm-project/commit/b2fae5b3c716eab31a43ef7776a46fb56547fa5b.diff
LOG: [Mips] Remove custom "original type" handling (#154082)
Replace Mips custom logic for retaining information about original types
in calling convention lowering by directly querying the OrigTy that is
now available.
There is one change in behavior here: If the return type is a struct
containing fp128 plus additional members, the result is now different,
as we no longer special case to a single fp128 member. I believe this is
fine, because this is a fake ABI anyway: Such cases should actually use
sret, and as such are a frontend responsibility, and Clang will indeed
emit these as sret, not as a return value struct. So this only impacts
manually written IR tests.
Added:
Modified:
llvm/lib/Target/Mips/MipsCCState.cpp
llvm/lib/Target/Mips/MipsCCState.h
llvm/lib/Target/Mips/MipsCallLowering.cpp
llvm/lib/Target/Mips/MipsCallingConv.td
llvm/lib/Target/Mips/MipsFastISel.cpp
llvm/lib/Target/Mips/MipsISelLowering.cpp
llvm/test/CodeGen/Mips/llvm.frexp.ll
llvm/test/CodeGen/Mips/llvm.sincos.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/Mips/MipsCCState.cpp b/llvm/lib/Target/Mips/MipsCCState.cpp
index d7b5633d7077e..86bb3e6e35f3a 100644
--- a/llvm/lib/Target/Mips/MipsCCState.cpp
+++ b/llvm/lib/Target/Mips/MipsCCState.cpp
@@ -12,35 +12,6 @@
using namespace llvm;
-/// This function returns true if Ty is fp128, {f128} or i128 which was
-/// originally a fp128.
-bool MipsCCState::originalTypeIsF128(const Type *Ty) {
- if (Ty->isFP128Ty())
- return true;
-
- if (Ty->isStructTy() && Ty->getStructNumElements() == 1 &&
- Ty->getStructElementType(0)->isFP128Ty())
- return true;
-
- return false;
-}
-
-/// Return true if the original type was vXfXX.
-bool MipsCCState::originalEVTTypeIsVectorFloat(EVT Ty) {
- if (Ty.isVector() && Ty.getVectorElementType().isFloatingPoint())
- return true;
-
- return false;
-}
-
-/// Return true if the original type was vXfXX / vXfXX.
-bool MipsCCState::originalTypeIsVectorFloat(const Type *Ty) {
- if (Ty->isVectorTy() && Ty->isFPOrFPVectorTy())
- return true;
-
- return false;
-}
-
MipsCCState::SpecialCallingConvType
MipsCCState::getSpecialCallingConvForCallee(const SDNode *Callee,
const MipsSubtarget &Subtarget) {
@@ -57,118 +28,3 @@ MipsCCState::getSpecialCallingConvForCallee(const SDNode *Callee,
}
return SpecialCallingConv;
}
-
-void MipsCCState::PreAnalyzeCallResultForF128(
- const SmallVectorImpl<ISD::InputArg> &Ins, const Type *RetTy) {
- for (unsigned i = 0; i < Ins.size(); ++i) {
- OriginalArgWasF128.push_back(originalTypeIsF128(RetTy));
- OriginalArgWasFloat.push_back(RetTy->isFloatingPointTy());
- }
-}
-
-/// Identify lowered values that originated from f128 or float arguments and
-/// record this for use by RetCC_MipsN.
-void MipsCCState::PreAnalyzeCallReturnForF128(
- const SmallVectorImpl<ISD::OutputArg> &Outs, const Type *RetTy) {
- for (unsigned i = 0; i < Outs.size(); ++i) {
- OriginalArgWasF128.push_back(originalTypeIsF128(RetTy));
- OriginalArgWasFloat.push_back(
- RetTy->isFloatingPointTy());
- }
-}
-
-/// Identify lower values that originated from vXfXX and record
-/// this.
-void MipsCCState::PreAnalyzeCallResultForVectorFloat(
- const SmallVectorImpl<ISD::InputArg> &Ins, const Type *RetTy) {
- for (unsigned i = 0; i < Ins.size(); ++i) {
- OriginalRetWasFloatVector.push_back(originalTypeIsVectorFloat(RetTy));
- }
-}
-
-/// Identify lowered values that originated from vXfXX arguments and record
-/// this.
-void MipsCCState::PreAnalyzeReturnForVectorFloat(
- const SmallVectorImpl<ISD::OutputArg> &Outs) {
- for (unsigned i = 0; i < Outs.size(); ++i) {
- ISD::OutputArg Out = Outs[i];
- OriginalRetWasFloatVector.push_back(
- originalEVTTypeIsVectorFloat(Out.ArgVT));
- }
-}
-
-void MipsCCState::PreAnalyzeReturnValue(EVT ArgVT) {
- OriginalRetWasFloatVector.push_back(originalEVTTypeIsVectorFloat(ArgVT));
-}
-
-void MipsCCState::PreAnalyzeCallOperand(const Type *ArgTy) {
- OriginalArgWasF128.push_back(originalTypeIsF128(ArgTy));
- OriginalArgWasFloat.push_back(ArgTy->isFloatingPointTy());
- OriginalArgWasFloatVector.push_back(ArgTy->isVectorTy());
-}
-
-/// Identify lowered values that originated from f128, float and sret to vXfXX
-/// arguments and record this.
-void MipsCCState::PreAnalyzeCallOperands(
- const SmallVectorImpl<ISD::OutputArg> &Outs,
- std::vector<TargetLowering::ArgListEntry> &FuncArgs) {
- for (unsigned i = 0; i < Outs.size(); ++i) {
- TargetLowering::ArgListEntry FuncArg = FuncArgs[Outs[i].OrigArgIndex];
-
- OriginalArgWasF128.push_back(originalTypeIsF128(FuncArg.OrigTy));
- OriginalArgWasFloat.push_back(FuncArg.OrigTy->isFloatingPointTy());
- OriginalArgWasFloatVector.push_back(FuncArg.OrigTy->isVectorTy());
- }
-}
-
-void MipsCCState::PreAnalyzeFormalArgument(const Type *ArgTy,
- ISD::ArgFlagsTy Flags) {
- // SRet arguments cannot originate from f128 or {f128} returns so we just
- // push false. We have to handle this specially since SRet arguments
- // aren't mapped to an original argument.
- if (Flags.isSRet()) {
- OriginalArgWasF128.push_back(false);
- OriginalArgWasFloat.push_back(false);
- OriginalArgWasFloatVector.push_back(false);
- return;
- }
-
- OriginalArgWasF128.push_back(originalTypeIsF128(ArgTy));
- OriginalArgWasFloat.push_back(ArgTy->isFloatingPointTy());
-
- // The MIPS vector ABI exhibits a corner case of sorts or quirk; if the
- // first argument is actually an SRet pointer to a vector, then the next
- // argument slot is $a2.
- OriginalArgWasFloatVector.push_back(ArgTy->isVectorTy());
-}
-
-/// Identify lowered values that originated from f128, float and vXfXX arguments
-/// and record this.
-void MipsCCState::PreAnalyzeFormalArgumentsForF128(
- const SmallVectorImpl<ISD::InputArg> &Ins) {
- const MachineFunction &MF = getMachineFunction();
- for (unsigned i = 0; i < Ins.size(); ++i) {
- Function::const_arg_iterator FuncArg = MF.getFunction().arg_begin();
-
- // SRet arguments cannot originate from f128 or {f128} returns so we just
- // push false. We have to handle this specially since SRet arguments
- // aren't mapped to an original argument.
- if (Ins[i].Flags.isSRet()) {
- OriginalArgWasF128.push_back(false);
- OriginalArgWasFloat.push_back(false);
- OriginalArgWasFloatVector.push_back(false);
- continue;
- }
-
- assert(Ins[i].getOrigArgIndex() < MF.getFunction().arg_size());
- std::advance(FuncArg, Ins[i].getOrigArgIndex());
-
- OriginalArgWasF128.push_back(originalTypeIsF128(FuncArg->getType()));
- OriginalArgWasFloat.push_back(FuncArg->getType()->isFloatingPointTy());
-
- // The MIPS vector ABI exhibits a corner case of sorts or quirk; if the
- // first argument is actually an SRet pointer to a vector, then the next
- // argument slot is $a2.
- OriginalArgWasFloatVector.push_back(FuncArg->getType()->isVectorTy());
- }
-}
diff --git a/llvm/lib/Target/Mips/MipsCCState.h b/llvm/lib/Target/Mips/MipsCCState.h
index 4d985518ce7c5..4c36d42589d7a 100644
--- a/llvm/lib/Target/Mips/MipsCCState.h
+++ b/llvm/lib/Target/Mips/MipsCCState.h
@@ -26,59 +26,7 @@ class MipsCCState : public CCState {
getSpecialCallingConvForCallee(const SDNode *Callee,
const MipsSubtarget &Subtarget);
- static bool originalTypeIsF128(const Type *Ty);
- static bool originalEVTTypeIsVectorFloat(EVT Ty);
- static bool originalTypeIsVectorFloat(const Type *Ty);
-
- void PreAnalyzeCallOperand(const Type *ArgTy);
-
- void PreAnalyzeFormalArgument(const Type *ArgTy, ISD::ArgFlagsTy Flags);
- void PreAnalyzeReturnValue(EVT ArgVT);
-
private:
- /// Identify lowered values that originated from f128 arguments and record
- /// this for use by RetCC_MipsN.
- void PreAnalyzeCallResultForF128(const SmallVectorImpl<ISD::InputArg> &Ins,
- const Type *RetTy);
-
- /// Identify lowered values that originated from f128 arguments and record
- /// this for use by RetCC_MipsN.
- void PreAnalyzeCallReturnForF128(const SmallVectorImpl<ISD::OutputArg> &Outs, const Type *RetTy);
-
- /// Identify lowered values that originated from f128 arguments and record
- /// this.
- void
- PreAnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
- std::vector<TargetLowering::ArgListEntry> &FuncArgs);
-
- /// Identify lowered values that originated from f128 arguments and record
- /// this for use by RetCC_MipsN.
- void
- PreAnalyzeFormalArgumentsForF128(const SmallVectorImpl<ISD::InputArg> &Ins);
-
- void
- PreAnalyzeCallResultForVectorFloat(const SmallVectorImpl<ISD::InputArg> &Ins,
- const Type *RetTy);
-
- void PreAnalyzeFormalArgumentsForVectorFloat(
- const SmallVectorImpl<ISD::InputArg> &Ins);
-
- void
- PreAnalyzeReturnForVectorFloat(const SmallVectorImpl<ISD::OutputArg> &Outs);
-
- /// Records whether the value has been lowered from an f128.
- SmallVector<bool, 4> OriginalArgWasF128;
-
- /// Records whether the value has been lowered from float.
- SmallVector<bool, 4> OriginalArgWasFloat;
-
- /// Records whether the value has been lowered from a floating point vector.
- SmallVector<bool, 4> OriginalArgWasFloatVector;
-
- /// Records whether the return value has been lowered from a floating point
- /// vector.
- SmallVector<bool, 4> OriginalRetWasFloatVector;
-
// Used to handle MIPS16-specific calling convention tweaks.
// FIXME: This should probably be a fully fledged calling convention.
SpecialCallingConvType SpecialCallingConv;
@@ -89,116 +37,6 @@ class MipsCCState : public CCState {
SpecialCallingConvType SpecialCC = NoSpecialCallingConv)
: CCState(CC, isVarArg, MF, locs, C), SpecialCallingConv(SpecialCC) {}
- void
- PreAnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
- CCAssignFn Fn,
- std::vector<TargetLowering::ArgListEntry> &FuncArgs) {
- OriginalArgWasF128.clear();
- OriginalArgWasFloat.clear();
- OriginalArgWasFloatVector.clear();
- PreAnalyzeCallOperands(Outs, FuncArgs);
- }
-
- void
- AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
- CCAssignFn Fn,
- std::vector<TargetLowering::ArgListEntry> &FuncArgs) {
- PreAnalyzeCallOperands(Outs, Fn, FuncArgs);
- CCState::AnalyzeCallOperands(Outs, Fn);
- }
-
- // The AnalyzeCallOperands in the base class is not usable since we must
- // provide a means of accessing ArgListEntry::IsFixed. Delete them from this
- // class. This doesn't stop them being used via the base class though.
- void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
- CCAssignFn Fn) = delete;
- void AnalyzeCallOperands(const SmallVectorImpl<MVT> &Outs,
- SmallVectorImpl<ISD::ArgFlagsTy> &Flags,
- CCAssignFn Fn) = delete;
-
- void PreAnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
- CCAssignFn Fn) {
- OriginalArgWasFloat.clear();
- OriginalArgWasF128.clear();
- OriginalArgWasFloatVector.clear();
- PreAnalyzeFormalArgumentsForF128(Ins);
- }
-
- void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
- CCAssignFn Fn) {
- PreAnalyzeFormalArguments(Ins, Fn);
- CCState::AnalyzeFormalArguments(Ins, Fn);
- }
-
- void PreAnalyzeCallResult(const Type *RetTy) {
- OriginalArgWasF128.push_back(originalTypeIsF128(RetTy));
- OriginalArgWasFloat.push_back(RetTy->isFloatingPointTy());
- OriginalRetWasFloatVector.push_back(originalTypeIsVectorFloat(RetTy));
- }
-
- void PreAnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
- CCAssignFn Fn, const Type *RetTy) {
- OriginalArgWasFloat.clear();
- OriginalArgWasF128.clear();
- OriginalArgWasFloatVector.clear();
- PreAnalyzeCallResultForF128(Ins, RetTy);
- PreAnalyzeCallResultForVectorFloat(Ins, RetTy);
- }
-
- void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
- CCAssignFn Fn, const Type *RetTy) {
- PreAnalyzeCallResult(Ins, Fn, RetTy);
- CCState::AnalyzeCallResult(Ins, Fn);
- }
-
- void PreAnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
- CCAssignFn Fn) {
- const MachineFunction &MF = getMachineFunction();
- OriginalArgWasFloat.clear();
- OriginalArgWasF128.clear();
- OriginalArgWasFloatVector.clear();
- PreAnalyzeCallReturnForF128(Outs, MF.getFunction().getReturnType());
- PreAnalyzeReturnForVectorFloat(Outs);
- }
-
- void AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
- CCAssignFn Fn) {
- PreAnalyzeReturn(Outs, Fn);
- CCState::AnalyzeReturn(Outs, Fn);
- }
-
- bool CheckReturn(const SmallVectorImpl<ISD::OutputArg> &ArgsFlags,
- CCAssignFn Fn) {
- const MachineFunction &MF = getMachineFunction();
- PreAnalyzeCallReturnForF128(ArgsFlags, MF.getFunction().getReturnType());
- PreAnalyzeReturnForVectorFloat(ArgsFlags);
- bool Return = CCState::CheckReturn(ArgsFlags, Fn);
- OriginalArgWasFloat.clear();
- OriginalArgWasF128.clear();
- OriginalArgWasFloatVector.clear();
- return Return;
- }
-
- bool CheckCallReturn(const SmallVectorImpl<ISD::OutputArg> &ArgsFlags,
- CCAssignFn Fn, const Type *RetTy) {
- PreAnalyzeCallReturnForF128(ArgsFlags, RetTy);
- PreAnalyzeReturnForVectorFloat(ArgsFlags);
- bool Return = CCState::CheckReturn(ArgsFlags, Fn);
- OriginalArgWasFloat.clear();
- OriginalArgWasF128.clear();
- OriginalArgWasFloatVector.clear();
- return Return;
- }
- bool WasOriginalArgF128(unsigned ValNo) { return OriginalArgWasF128[ValNo]; }
- bool WasOriginalArgFloat(unsigned ValNo) {
- return OriginalArgWasFloat[ValNo];
- }
- bool WasOriginalArgVectorFloat(unsigned ValNo) const {
- return OriginalArgWasFloatVector[ValNo];
- }
- bool WasOriginalRetVectorFloat(unsigned ValNo) const {
- return OriginalRetWasFloatVector[ValNo];
- }
SpecialCallingConvType getSpecialCallingConv() { return SpecialCallingConv; }
};
}
diff --git a/llvm/lib/Target/Mips/MipsCallLowering.cpp b/llvm/lib/Target/Mips/MipsCallLowering.cpp
index 5b67346209731..35194e7e6ba23 100644
--- a/llvm/lib/Target/Mips/MipsCallLowering.cpp
+++ b/llvm/lib/Target/Mips/MipsCallLowering.cpp
@@ -26,52 +26,6 @@ MipsCallLowering::MipsCallLowering(const MipsTargetLowering &TLI)
: CallLowering(&TLI) {}
namespace {
-struct MipsOutgoingValueAssigner : public CallLowering::OutgoingValueAssigner {
- /// Is this a return value, or an outgoing call operand.
- bool IsReturn;
-
- MipsOutgoingValueAssigner(CCAssignFn *AssignFn_, bool IsReturn)
- : OutgoingValueAssigner(AssignFn_), IsReturn(IsReturn) {}
-
- bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT,
- CCValAssign::LocInfo LocInfo,
- const CallLowering::ArgInfo &Info, ISD::ArgFlagsTy Flags,
- CCState &State_) override {
- MipsCCState &State = static_cast<MipsCCState &>(State_);
-
- if (IsReturn)
- State.PreAnalyzeReturnValue(EVT::getEVT(Info.Ty));
- else
- State.PreAnalyzeCallOperand(Info.Ty);
-
- return CallLowering::OutgoingValueAssigner::assignArg(
- ValNo, OrigVT, ValVT, LocVT, LocInfo, Info, Flags, State);
- }
-};
-
-struct MipsIncomingValueAssigner : public CallLowering::IncomingValueAssigner {
- /// Is this a call return value, or an incoming function argument.
- bool IsReturn;
-
- MipsIncomingValueAssigner(CCAssignFn *AssignFn_, bool IsReturn)
- : IncomingValueAssigner(AssignFn_), IsReturn(IsReturn) {}
-
- bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT,
- CCValAssign::LocInfo LocInfo,
- const CallLowering::ArgInfo &Info, ISD::ArgFlagsTy Flags,
- CCState &State_) override {
- MipsCCState &State = static_cast<MipsCCState &>(State_);
-
- if (IsReturn)
- State.PreAnalyzeCallResult(Info.Ty);
- else
- State.PreAnalyzeFormalArgument(Info.Ty, Flags);
-
- return CallLowering::IncomingValueAssigner::assignArg(
- ValNo, OrigVT, ValVT, LocVT, LocInfo, Info, Flags, State);
- }
-};
-
class MipsIncomingValueHandler : public CallLowering::IncomingValueHandler {
const MipsSubtarget &STI;
@@ -329,8 +283,7 @@ bool MipsCallLowering::lowerReturn(MachineIRBuilder &MIRBuilder,
F.getContext());
MipsOutgoingValueHandler RetHandler(MIRBuilder, MF.getRegInfo(), Ret);
- MipsOutgoingValueAssigner Assigner(TLI.CCAssignFnForReturn(),
- /*IsReturn*/ true);
+ OutgoingValueAssigner Assigner(TLI.CCAssignFnForReturn());
if (!determineAssignments(Assigner, RetInfos, CCInfo))
return false;
@@ -381,8 +334,7 @@ bool MipsCallLowering::lowerFormalArguments(MachineIRBuilder &MIRBuilder,
CCInfo.AllocateStack(ABI.GetCalleeAllocdArgSizeInBytes(F.getCallingConv()),
Align(1));
- MipsIncomingValueAssigner Assigner(TLI.CCAssignFnForCall(),
- /*IsReturn*/ false);
+ IncomingValueAssigner Assigner(TLI.CCAssignFnForCall());
if (!determineAssignments(Assigner, ArgInfos, CCInfo))
return false;
@@ -498,8 +450,7 @@ bool MipsCallLowering::lowerCall(MachineIRBuilder &MIRBuilder,
CCInfo.AllocateStack(ABI.GetCalleeAllocdArgSizeInBytes(Info.CallConv),
Align(1));
- MipsOutgoingValueAssigner Assigner(TLI.CCAssignFnForCall(),
- /*IsReturn*/ false);
+ OutgoingValueAssigner Assigner(TLI.CCAssignFnForCall());
if (!determineAssignments(Assigner, ArgInfos, CCInfo))
return false;
@@ -536,8 +487,7 @@ bool MipsCallLowering::lowerCall(MachineIRBuilder &MIRBuilder,
F.getCallingConv());
SmallVector<CCValAssign, 8> ArgLocs;
- MipsIncomingValueAssigner Assigner(TLI.CCAssignFnForReturn(),
- /*IsReturn*/ true);
+ IncomingValueAssigner Assigner(TLI.CCAssignFnForReturn());
CallReturnHandler RetHandler(MIRBuilder, MF.getRegInfo(), MIB);
MipsCCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs,
diff --git a/llvm/lib/Target/Mips/MipsCallingConv.td b/llvm/lib/Target/Mips/MipsCallingConv.td
index 0e5c16c131687..3501f9fbfd2e7 100644
--- a/llvm/lib/Target/Mips/MipsCallingConv.td
+++ b/llvm/lib/Target/Mips/MipsCallingConv.td
@@ -20,19 +20,15 @@ class CCIfSubtargetNot<string F, CCAction A> : CCIfSubtarget<F, A, "!">;
/// Match if the original argument (before lowering) was a float.
/// For example, this is true for i32's that were lowered from soft-float.
-class CCIfOrigArgWasFloat<CCAction A>
- : CCIf<"static_cast<MipsCCState *>(&State)->WasOriginalArgFloat(ValNo)",
- A>;
+class CCIfOrigArgWasFloat<CCAction A> : CCIf<"OrigTy->isFloatingPointTy()", A>;
/// Match if the original argument (before lowering) was a 128-bit float (i.e.
/// long double).
-class CCIfOrigArgWasF128<CCAction A>
- : CCIf<"static_cast<MipsCCState *>(&State)->WasOriginalArgF128(ValNo)", A>;
+class CCIfOrigArgWasF128<CCAction A> : CCIf<"OrigTy->isFP128Ty()", A>;
-/// Match if the return was a floating point vector.
+/// Match if the return was not a floating point vector.
class CCIfOrigArgWasNotVectorFloat<CCAction A>
- : CCIf<"!static_cast<MipsCCState *>(&State)"
- "->WasOriginalRetVectorFloat(ValNo)", A>;
+ : CCIf<"!OrigTy->isVectorTy() || !OrigTy->isFPOrFPVectorTy()", A>;
/// Match if the special calling conv is the specified value.
class CCIfSpecialCallingConv<string CC, CCAction A>
diff --git a/llvm/lib/Target/Mips/MipsFastISel.cpp b/llvm/lib/Target/Mips/MipsFastISel.cpp
index 94fb3cc356819..1ce8d7e3e2339 100644
--- a/llvm/lib/Target/Mips/MipsFastISel.cpp
+++ b/llvm/lib/Target/Mips/MipsFastISel.cpp
@@ -1293,7 +1293,7 @@ bool MipsFastISel::finishCall(CallLoweringInfo &CLI, MVT RetVT,
SmallVector<CCValAssign, 16> RVLocs;
MipsCCState CCInfo(CC, false, *FuncInfo.MF, RVLocs, *Context);
- CCInfo.AnalyzeCallResult(CLI.Ins, RetCC_Mips, CLI.RetTy);
+ CCInfo.AnalyzeCallResult(CLI.Ins, RetCC_Mips);
// Only handle a single return value.
if (RVLocs.size() != 1)
diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp
index 466c13e78fbd5..1491300e37d3e 100644
--- a/llvm/lib/Target/Mips/MipsISelLowering.cpp
+++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp
@@ -3037,14 +3037,13 @@ SDValue MipsTargetLowering::lowerFP_TO_SINT(SDValue Op,
static bool CC_MipsO32(unsigned ValNo, MVT ValVT, MVT LocVT,
CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
- CCState &State, ArrayRef<MCPhysReg> F64Regs) {
+ Type *OrigTy, CCState &State,
+ ArrayRef<MCPhysReg> F64Regs) {
const MipsSubtarget &Subtarget = static_cast<const MipsSubtarget &>(
State.getMachineFunction().getSubtarget());
static const MCPhysReg IntRegs[] = { Mips::A0, Mips::A1, Mips::A2, Mips::A3 };
- const MipsCCState * MipsState = static_cast<MipsCCState *>(&State);
-
static const MCPhysReg F32Regs[] = { Mips::F12, Mips::F14 };
static const MCPhysReg FloatVectorIntRegs[] = { Mips::A0, Mips::A2 };
@@ -3086,7 +3085,7 @@ static bool CC_MipsO32(unsigned ValNo, MVT ValVT, MVT LocVT,
State.getFirstUnallocated(F32Regs) != ValNo;
Align OrigAlign = ArgFlags.getNonZeroOrigAlign();
bool isI64 = (ValVT == MVT::i32 && OrigAlign == Align(8));
- bool isVectorFloat = MipsState->WasOriginalArgVectorFloat(ValNo);
+ bool isVectorFloat = OrigTy->isVectorTy() && OrigTy->isFPOrFPVectorTy();
// The MIPS vector ABI for floats passes them in a pair of registers
if (ValVT == MVT::i32 && isVectorFloat) {
@@ -3163,7 +3162,8 @@ static bool CC_MipsO32_FP32(unsigned ValNo, MVT ValVT, MVT LocVT,
CCState &State) {
static const MCPhysReg F64Regs[] = { Mips::D6, Mips::D7 };
- return CC_MipsO32(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State, F64Regs);
+ return CC_MipsO32(ValNo, ValVT, LocVT, LocInfo, ArgFlags, OrigTy, State,
+ F64Regs);
}
static bool CC_MipsO32_FP64(unsigned ValNo, MVT ValVT, MVT LocVT,
@@ -3172,7 +3172,8 @@ static bool CC_MipsO32_FP64(unsigned ValNo, MVT ValVT, MVT LocVT,
CCState &State) {
static const MCPhysReg F64Regs[] = { Mips::D12_64, Mips::D14_64 };
- return CC_MipsO32(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State, F64Regs);
+ return CC_MipsO32(ValNo, ValVT, LocVT, LocInfo, ArgFlags, OrigTy, State,
+ F64Regs);
}
static bool CC_MipsO32(unsigned ValNo, MVT ValVT, MVT LocVT,
@@ -3391,7 +3392,7 @@ MipsTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
MemcpyInByVal ? 0 : ABI.GetCalleeAllocdArgSizeInBytes(CallConv);
CCInfo.AllocateStack(ReservedArgArea, Align(1));
- CCInfo.AnalyzeCallOperands(Outs, CC_Mips, CLI.getArgs());
+ CCInfo.AnalyzeCallOperands(Outs, CC_Mips);
// Get a count of how many bytes are to be pushed on the stack.
unsigned StackSize = CCInfo.getStackSize();
@@ -3686,7 +3687,7 @@ SDValue MipsTargetLowering::LowerCallResult(
MipsCCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs,
*DAG.getContext());
- CCInfo.AnalyzeCallResult(Ins, RetCC_Mips, CLI.OrigRetTy);
+ CCInfo.AnalyzeCallResult(Ins, RetCC_Mips);
// Copy all of the result registers out of their specified physreg.
for (unsigned i = 0; i != RVLocs.size(); ++i) {
@@ -3964,7 +3965,7 @@ MipsTargetLowering::CanLowerReturn(CallingConv::ID CallConv,
LLVMContext &Context, const Type *RetTy) const {
SmallVector<CCValAssign, 16> RVLocs;
MipsCCState CCInfo(CallConv, IsVarArg, MF, RVLocs, Context);
- return CCInfo.CheckCallReturn(Outs, RetCC_Mips, RetTy);
+ return CCInfo.CheckReturn(Outs, RetCC_Mips);
}
bool MipsTargetLowering::shouldSignExtendTypeInLibCall(Type *Ty,
diff --git a/llvm/test/CodeGen/Mips/llvm.frexp.ll b/llvm/test/CodeGen/Mips/llvm.frexp.ll
index 483a2540e5e01..69ad5fef7c66e 100644
--- a/llvm/test/CodeGen/Mips/llvm.frexp.ll
+++ b/llvm/test/CodeGen/Mips/llvm.frexp.ll
@@ -495,9 +495,7 @@ define { fp128, i32 } @test_frexp_fp128_i32(fp128 %a) nounwind {
; SOFT-FLOAT-64-NEXT: sd $ra, 8($sp) # 8-byte Folded Spill
; SOFT-FLOAT-64-NEXT: jal frexpl
; SOFT-FLOAT-64-NEXT: daddiu $6, $sp, 4
-; SOFT-FLOAT-64-NEXT: dmfc1 $2, $f0
-; SOFT-FLOAT-64-NEXT: dmfc1 $3, $f2
-; SOFT-FLOAT-64-NEXT: lw $4, 4($sp)
+; SOFT-FLOAT-64-NEXT: lw $2, 4($sp)
; SOFT-FLOAT-64-NEXT: ld $ra, 8($sp) # 8-byte Folded Reload
; SOFT-FLOAT-64-NEXT: jr $ra
; SOFT-FLOAT-64-NEXT: daddiu $sp, $sp, 16
diff --git a/llvm/test/CodeGen/Mips/llvm.sincos.ll b/llvm/test/CodeGen/Mips/llvm.sincos.ll
index e0e6617afb133..58eb427d3a69b 100644
--- a/llvm/test/CodeGen/Mips/llvm.sincos.ll
+++ b/llvm/test/CodeGen/Mips/llvm.sincos.ll
@@ -844,22 +844,13 @@ define { fp128, fp128 } @test_sincos_f128(fp128 %a) #0 {
; SOFT-FLOAT-64: # %bb.0:
; SOFT-FLOAT-64-NEXT: daddiu $sp, $sp, -48
; SOFT-FLOAT-64-NEXT: sd $ra, 40($sp) # 8-byte Folded Spill
-; SOFT-FLOAT-64-NEXT: sd $16, 32($sp) # 8-byte Folded Spill
-; SOFT-FLOAT-64-NEXT: mov.d $f12, $f13
-; SOFT-FLOAT-64-NEXT: move $16, $4
; SOFT-FLOAT-64-NEXT: daddiu $6, $sp, 16
-; SOFT-FLOAT-64-NEXT: daddiu $7, $sp, 0
; SOFT-FLOAT-64-NEXT: jal sincosl
-; SOFT-FLOAT-64-NEXT: mov.d $f13, $f14
-; SOFT-FLOAT-64-NEXT: ld $1, 8($sp)
-; SOFT-FLOAT-64-NEXT: sd $1, 24($16)
-; SOFT-FLOAT-64-NEXT: ld $1, 0($sp)
-; SOFT-FLOAT-64-NEXT: sd $1, 16($16)
-; SOFT-FLOAT-64-NEXT: ld $1, 24($sp)
-; SOFT-FLOAT-64-NEXT: sd $1, 8($16)
-; SOFT-FLOAT-64-NEXT: ld $1, 16($sp)
-; SOFT-FLOAT-64-NEXT: sd $1, 0($16)
-; SOFT-FLOAT-64-NEXT: ld $16, 32($sp) # 8-byte Folded Reload
+; SOFT-FLOAT-64-NEXT: daddiu $7, $sp, 0
+; SOFT-FLOAT-64-NEXT: ldc1 $f0, 16($sp)
+; SOFT-FLOAT-64-NEXT: ldc1 $f2, 24($sp)
+; SOFT-FLOAT-64-NEXT: ld $2, 0($sp)
+; SOFT-FLOAT-64-NEXT: ld $3, 8($sp)
; SOFT-FLOAT-64-NEXT: ld $ra, 40($sp) # 8-byte Folded Reload
; SOFT-FLOAT-64-NEXT: jr $ra
; SOFT-FLOAT-64-NEXT: daddiu $sp, $sp, 48
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