[llvm] [AMDGPU] Add support for store to constant address space (PR #153835)

[Shilei Tian via llvm-commits]

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@@ -3910,10 +3910,14 @@ SDValue AMDGPUTargetLowering::performLoadCombine(SDNode *N,
 // type.
 SDValue AMDGPUTargetLowering::performStoreCombine(SDNode *N,
                                                   DAGCombinerInfo &DCI) const {
+  StoreSDNode *SN = cast<StoreSDNode>(N);
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shiltian wrote:

There are basically two possible ways of *lowering* it:

1. Removing it from the DAG

This is what the current PR is trying to do. If `performStoreCombine` isn't the right place for that, then the "universal custom lowering" you mentioned would probably be a better option. By that, I assume you mean doing it in the legalizer. That would indeed be a good place to replace the store with its chain node. The limitation, though, is that it can't really be *universal*. We'd need to mark every potential store type as `custom` in target lowering so the legalizer knows to handle them this way.

2. Truly lowering it to a global store instruction

This is the simpler approach, as you pointed out. It would just lower directly to a global store. The question here is whether that's acceptable.

https://github.com/llvm/llvm-project/pull/153835