[llvm] [AMDGPU] Support merging 16-bit and 8-bit TBUFFER load/store instruction (PR #145078)

[Jay Foad via llvm-commits]

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@@ -1060,13 +1068,46 @@ bool SILoadStoreOptimizer::offsetsCanBeCombined(CombineInfo &CI,
         Info0->NumFormat != Info1->NumFormat)
       return false;
 
-    // TODO: Should be possible to support more formats, but if format loads
-    // are not dword-aligned, the merged load might not be valid.
-    if (Info0->BitsPerComp != 32)
+    // For 8-bit or 16-bit formats there is no 3-component variant.
+    // If NumCombinedComponents is 3, try the 4-component format and use XYZ.
+    // Example:
+    //   tbuffer_load_format_x + tbuffer_load_format_x + tbuffer_load_format_x
+    //   ==> tbuffer_load_format_xyz with format:[BUF_FMT_16_16_16_16_SNORM]
+    unsigned NumCombinedComponents = CI.Width + Paired.Width;
+    unsigned CombinedBufferFormat =
+        getBufferFormatWithCompCount(CI.Format, NumCombinedComponents, STI);
+    if (CombinedBufferFormat == 0 && NumCombinedComponents == 3) {
+      if (Info0->BitsPerComp == 8 || Info0->BitsPerComp == 16) {
+        unsigned TryFormat = getBufferFormatWithCompCount(CI.Format, 4, STI);
+        if (!TryFormat)
+          return false;
+        CombinedBufferFormat = TryFormat;
+        NumCombinedComponents = 4;
+      }
+    }
+
+    if (CombinedBufferFormat == 0)
+      return false;
+
+    // Merge only when the two access ranges are strictly back-to-back,
+    // any gap or overlap can over-write data or leave holes.
+    unsigned BytePerComp = Info0->BitsPerComp / 8;
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jayfoad wrote:

This is the same as `CI.EltSize`?

https://github.com/llvm/llvm-project/pull/145078