The Week Of Monday 14 October 2024 Archives by thread
Starting: Mon Oct 14 00:04:00 PDT 2024
Ending: Sun Oct 20 23:45:35 PDT 2024
Messages: 5346
- [llvm] [InstCombine] Transform (fcmp + fadd + sel) into (fcmp + sel + fadd) (PR #106492)
Rajat Bajpai via llvm-commits
- [llvm] [AMDGPU][SplitModule] Handle !callees metadata (PR #108802)
LLVM Continuous Integration via llvm-commits
- [llvm] [RISCV][VCIX] Add a tied constraint between rd and rs3 in sf.v.xvv and sf.v.xvw instructions (PR #111630)
Michal Terepeta via llvm-commits
- [llvm] [llvm-cxxfilt] Add --quote option to quote demangled function names (PR #111871)
James Henderson via llvm-commits
- [llvm] [X86] Do not elect to tail call if caller must preserve all registers (PR #112098)
Antonio Frighetto via llvm-commits
- [llvm] [ARM] Simplify code with std::map::operator[] (NFC) (PR #112159)
Nikita Popov via llvm-commits
- [llvm] [BOLT] Avoid repeated set lookups (NFC) (PR #112157)
Nikita Popov via llvm-commits
- [libcxx] [llvm] [libc++] Deprecate and remove meaningless `<cxxx>` headers (PR #111615)
Nikolas Klauser via llvm-commits
- [llvm] [NFC][LoopVectorize] Make replaceVPBBWithIRVPBB more efficient (PR #111514)
David Sherwood via llvm-commits
- [clang] [llvm] [Inliner] Propagate more attributes to params when inlining (PR #91101)
Nikita Popov via llvm-commits
- [llvm] a07639f - [AArch64] Increase inline memmove limit to 16 stored registers (#111848)
via llvm-commits
- [llvm] [AArch64] Increase inline memmove limit to 16 stored registers (PR #111848)
David Green via llvm-commits
- [llvm] [VPlan] Introduce multi-branch recipe, use for multi-exit loops (WIP). (PR #109193)
David Sherwood via llvm-commits
- [llvm] 57cd6d8 - [llvm][docs] Document how to get admin permissions for a Buildbot worker (#108561)
via llvm-commits
- [llvm] [llvm][docs] Document how to get admin permissions for a Buildbot worker (PR #108561)
David Spickett via llvm-commits
- [compiler-rt] [compiler-rt][RISCV] Use u64 data type for marchid and mimpid (PR #112163)
Piyou Chen via llvm-commits
- [llvm] [LLVM] Slay undead copysign code (PR #111269)
via llvm-commits
- [llvm] [MIR] Serialize virtual register flags (PR #110228)
Akshat Oke via llvm-commits
- [llvm] [LLVM] Doc sret only works with void returns (PR #112167)
via llvm-commits
- [compiler-rt] 7fc3491 - [compiler-rt][RISCV] Use u64 data type for marchid and mimpid (#112163)
via llvm-commits
- [llvm] [llvm][ARM] Add Addend Checks for MOVT and MOVW instructions. (PR #111970)
David Spickett via llvm-commits
- [lld] [lld][elf] Warn if '*' pattern is used multiple times in version scripts (PR #102669)
Karl-Johan Karlsson via llvm-commits
- [llvm] [TargetLowering][SelectionDAG] Exploit nneg Flag in UINT_TO_FP (PR #108931)
Michael Marjieh via llvm-commits
- [llvm] d6827f6 - Fix CMake dependencies on mlir-linalg-ods-yaml-gen (#111973)
via llvm-commits
- [llvm] [mlir] Fix CMake dependencies on mlir-linalg-ods-yaml-gen (PR #111973)
Thomas Preud'homme via llvm-commits
- [llvm] dbfca24 - [MIR] Serialize virtual register flags (#110228)
via llvm-commits
- [llvm] [MIR] Add missing noteNewVirtualRegister callbacks (PR #111634)
Akshat Oke via llvm-commits
- [llvm] [NewPM][CodeGen] Port StackColoring to NPM (PR #111812)
Akshat Oke via llvm-commits
- [libunwind] [llvm] [AArch64][Libunwind] Add Support for FEAT_PAuthLR DWARF Instruction (PR #112171)
Jack Styles via llvm-commits
- [llvm] [LoopInterchange] Fix overflow in cost calculation (PR #111807)
Sjoerd Meijer via llvm-commits
- [llvm] 3dba5d8 - [MIR] Add missing noteNewVirtualRegister callbacks (#111634)
via llvm-commits
- [llvm] [AMDGPU] Serialize WWM_REG vreg flag (PR #110229)
Akshat Oke via llvm-commits
- [llvm] 828d72b - [GlobalISel] Add an assert for the DemandedElts APInt size. (#112150)
via llvm-commits
- [llvm] [GlobalISel] Add an assert for the DemandedElts APInt size. (PR #112150)
David Green via llvm-commits
- [llvm] [GlobalISel] Support vector G_UNMERGE_VALUES in computeKnownBits. (PR #112172)
David Green via llvm-commits
- [llvm] bec839d - [AMDGPU] Serialize WWM_REG vreg flag (#110229)
via llvm-commits
- [clang] [lld] [lld][LoongArch] Enable relaxation when --relax option is passed (PR #111488)
via llvm-commits
- [llvm] [X86] LowerShift - lower vXi8 shifts of an uniform constant using PSHUFB (PR #112175)
Simon Pilgrim via llvm-commits
- [llvm] [X86][AMX] Fix missing stride register for tileloadd (PR #110226)
Simon Pilgrim via llvm-commits
- [llvm] AMDGPU/GlobalISel: Fix inst-selection of ballot (PR #109986)
Nicolai Hähnle via llvm-commits
- [clang] [lld] [lld][LoongArch] Add relaxation option (PR #111488)
via llvm-commits
- [clang] [lld] [lld][LoongArch] Add the relaxation option (PR #111488)
via llvm-commits
- [compiler-rt] 851817b - fuzzer/strncmp.test: Increase iteration to 20M.
NAKAMURA Takumi via llvm-commits
- [llvm] [SCEV] Retain SCEVSequentialMinMaxExpr if an operand may trigger UB. (PR #110824)
Florian Hahn via llvm-commits
- [llvm] [AMDGPU] Tidy SIPreAllocateWWMRegs after recent changes (NFCI) (PR #111967)
Jay Foad via llvm-commits
- [llvm] f3aebe6 - [llvm][ARM] Add Addend Checks for MOVT and MOVW instructions. (#111970)
via llvm-commits
- [llvm] fe1e1e3 - Add myself as the PS4/PS5 code owner (#108002)
via llvm-commits
- [llvm] Add myself as the PS4/PS5 code owner (PR #108002)
Jeremy Morse via llvm-commits
- [llvm] [DAG] Enhance SDPatternMatch to match integer minimum and maximum patterns in addition to the existing ISD nodes. (PR #111774)
Simon Pilgrim via llvm-commits
- [llvm] 52e5683 - [GlobalISel][ARM] Legalization of G_CONSTANT using constant pool (#98308)
via llvm-commits
- [llvm] [GlobalISel][ARM] Legalization of G_CONSTANT using constant pool (PR #98308)
Serge Pavlov via llvm-commits
- [llvm] [GlobalISel][ARM] Selection of G_CONSTANT using constant pool (PR #96225)
Serge Pavlov via llvm-commits
- [llvm] [InstCombine] Transform high latency, dependent FSQRT/FDIV into FMUL (PR #87474)
Sushant Gokhale via llvm-commits
- [clang] [lld] [llvm] [clang][MIPS] Add support for mipsel-windows-* targets (PR #107744)
Jiaxun Yang via llvm-commits
- [llvm] [AMDGPU] Skip non-first terminators when forcing emit zero flag (PR #112116)
Jay Foad via llvm-commits
- [llvm] fdf2b0a - [LangRef] Document that sret only works with void returns (#112167)
via llvm-commits
- [llvm] [InstCombine] Drop range attributes in `foldIsPowerOf2OrZero` (PR #112178)
Yingwei Zheng via llvm-commits
- [llvm] [Analysis] Avoid running transform passes that have just been run (PR #112092)
Yingwei Zheng via llvm-commits
- [llvm] [MIR] Fix tests for flags in register info (PR #112179)
Akshat Oke via llvm-commits
- [llvm] [CMake][Windows] Fix Debug config build when using MSBuild (PR #111765)
NAKAMURA Takumi via llvm-commits
- [llvm] c5f82f7 - ValueTracking: introduce llvm::isNotCrossLaneOperation (#112011)
via llvm-commits
- [llvm] ValueTracking: introduce llvm::isNotCrossLaneOperation (PR #112011)
Ramkumar Ramachandra via llvm-commits
- [clang] [lld] [llvm] [WebAssembly] Enable nontrapping-fptoint and bulk-memory by default. (PR #112049)
Dan Gohman via llvm-commits
- [llvm] [SLP] Make getSameOpcode support different instructions if they have same semantics. (PR #112181)
Han-Kuan Chen via llvm-commits
- [llvm] 5af8cec - Revert "Fix CMake dependencies on mlir-linalg-ods-yaml-gen (#111973)"
Thomas Preud'homme via llvm-commits
- [clang] [llvm] [ARM] [AArch32] Add support for Arm China STAR-MC1 CPU (PR #110085)
Albert Huang via llvm-commits
- [llvm] [DAGCombiner] Fix check for extending loads (PR #112182)
Lewis Crawford via llvm-commits
- [llvm] ccb9835 - [X86] LowerShift - lower vXi8 shifts of an uniform constant using PSHUFB (#112175)
via llvm-commits
- [llvm] ValueTracking: handle more ops in isNotCrossLaneOperation (PR #112183)
Ramkumar Ramachandra via llvm-commits
- [llvm] f778861 - [X86] vselect-packss.ll - regenerate test checks with vpternlog comments
Simon Pilgrim via llvm-commits
- [llvm] 387b37a - [LLVM] [Clang] Support for Gentoo `*t64` triples (64-bit time_t ABIs) (#111302)
via llvm-commits
- [clang] [llvm] [LLVM] [Clang] Support for Gentoo `*t64` triples (64-bit time_t ABIs) (PR #111302)
Michał Górny via llvm-commits
- [llvm] ValueTracking: simplify udiv/urem recurrences (PR #108973)
Ramkumar Ramachandra via llvm-commits
- [llvm] BasicAA: return more PartialAlias when scalable (PR #110519)
Ramkumar Ramachandra via llvm-commits
- [llvm] Revert "[llvm][ARM] Add Addend Checks for MOVT and MOVW instructions.… (PR #112184)
Jack Styles via llvm-commits
- [llvm] 6a98c4a - Revert "[llvm][ARM] Add Addend Checks for MOVT and MOVW instructions.… (#112184)
via llvm-commits
- [compiler-rt] [compiler-rt] Explicitly enable C extensions for profile (PR #110555)
Martin Storsjö via llvm-commits
- [llvm] [NewPM][CodeGen] Add callback style codegen pass builder (PR #108690)
via llvm-commits
- [compiler-rt] [compiler-rt] Add cpu model init for Windows. (PR #111961)
Martin Storsjö via llvm-commits
- [compiler-rt] [sanitizer] Undef _TIME_BITS along with _FILE_OFFSET_BITS (PR #99699)
Michał Górny via llvm-commits
- [llvm] [LoopVectorize] Don't discount instructions scalarized due to tail folding (PR #109289)
John Brawn via llvm-commits
- [compiler-rt] 9cc6d6e - [compiler-rt] Explicitly enable C extensions for profile (#110555)
via llvm-commits
- [llvm] 7f06d8a - [SCEV] Retain SCEVSequentialMinMaxExpr if an operand may trigger UB. (#110824)
via llvm-commits
- [llvm] [mlir] [flang][OpenMP] Support `target ... nowait` (PR #111823)
Michael Klemm via llvm-commits
- [llvm] [IR] Allow MDString in operand bundles (PR #110805)
via llvm-commits
- [llvm] [VPlan] Use VPWidenIntrinsicRecipe to vp.select. (PR #110489)
Florian Hahn via llvm-commits
- [llvm] 39aae57 - [ORC] skip reoptimization tests on PPC.
Sunho Kim via llvm-commits
- [llvm] 9edc454 - [InstCombine] Drop range attributes in `foldIsPowerOf2OrZero` (#112178)
via llvm-commits
- [llvm] [SCEVExpander] Expand UDiv avoiding UB when in seq_min/max. (PR #92177)
Florian Hahn via llvm-commits
- [llvm] [NFC][CodingStandard] Extend if-else brace example with else-if (PR #112193)
Rahul Joshi via llvm-commits
- [clang] [llvm] [mlir] [polly] [NFC] Rename `Intrinsic::getDeclaration` to `getOrInsertDeclaration` (PR #111752)
Rahul Joshi via llvm-commits
- [llvm] 8b20f1b - [MIR] Fix tests for flags in register info (#112179)
via llvm-commits
- [clang] [lldb] [llvm] [APInt] Fix APInt constructions where value does not fit bitwidth (NFCI) (PR #80309)
Nikita Popov via llvm-commits
- [llvm] [WebAssembly] Fix feature coalescing (PR #110647)
Nikita Popov via llvm-commits
- [llvm] 429387a - [RISCV] Support Expressions in .insn Directives (#111893)
via llvm-commits
- [llvm] [RISCV] Support Expressions in .insn Directives (PR #111893)
Sam Elliott via llvm-commits
- [llvm] bdf241c - ValueTracking: handle more ops in isNotCrossLaneOperation (#112183)
via llvm-commits
- [llvm] [LV][VPlan] Add initial support for CSA vectorization (PR #106560)
Michael Maitland via llvm-commits
- [llvm] f3947aa - [gn] port aa44f59abf39
Nico Weber via llvm-commits
- [llvm] [SLP]Initial support for interleaved loads (PR #112042)
Alexey Bataev via llvm-commits
- [llvm] f9bc00e - [SLP]Initial support for interleaved loads
via llvm-commits
- [llvm] [SLP]Do not account external uses in EH block and in non-returning blocks (PR #112045)
Alexey Bataev via llvm-commits
- [llvm] [MachineVerifier] Query TargetInstrInfo for PHI nodes. (PR #110507)
Vyacheslav Levytskyy via llvm-commits
- [llvm] [BOLT][AArch64] Add support for compact code model (PR #112110)
Kristof Beyls via llvm-commits
- [llvm] 11f625c - [DAG] Enhance SDPatternMatch to match integer minimum and maximum patterns in addition to the existing ISD nodes. (#111774)
via llvm-commits
- [llvm] PowerPC/VSX: Select FMINNUM_IEEE and FMAXNUM_IEEE (PR #112195)
YunQiang Su via llvm-commits
- [llvm] [AMDGPU] Skip terminators when forcing emit zero flag (PR #112116)
Shilei Tian via llvm-commits
- [llvm] [NewPM][CodeGen] Port VirtRegMap to NPM (PR #109936)
Akshat Oke via llvm-commits
- [llvm] [LLVM] Add `LLVMIntrinsicCopyName` to LLVM C API (PR #112197)
Rahul Joshi via llvm-commits
- [llvm] [RISCV][VLOPT] Add support for 11.9 min/max instructions (PR #112198)
Michael Maitland via llvm-commits
- [llvm] Revert "[DAG] Enhance SDPatternMatch to match integer minimum and maximum patterns in addition to the existing ISD nodes." (PR #112200)
via llvm-commits
- [llvm] a3b0c31 - Revert "[DAG] Enhance SDPatternMatch to match integer minimum and maximum patterns in addition to the existing ISD nodes." (#112200)
via llvm-commits
- [llvm] [AArch64][InstCombine] Eliminate redundant barrier intrinsics (PR #112023)
Danila Malyutin via llvm-commits
- [llvm] [RISCV][VLOPT] Add support for 11.10 div instructions (PR #112201)
Michael Maitland via llvm-commits
- [llvm] [DAG] Enhance SDPatternMatch to match integer minimum and maximum patterns in addition to the existing ISD nodes. (PR #112203)
via llvm-commits
- [llvm] cd6c2b8 - [NewPM][CodeGen] Port StackColoring to NPM (#111812)
via llvm-commits
- [llvm] fd8a4b0 - [X86] combineAndnp - fold ANDN(SEXT(SETCC()),X) -> SELECT(NOT(SETCC()),X,0) on AVX512 targets
Simon Pilgrim via llvm-commits
- [llvm] d81c2f1 - [X86] canCreateUndefOrPoisonForTargetNode - X86ISD::VPERMV3 shuffles don't create undef/poison
Simon Pilgrim via llvm-commits
- [llvm] [ConstantFold] Fold `log1p` and `log1pf` when the input parameter is a constant value. (PR #112113)
via llvm-commits
- [llvm] 9c64b5e - [ARM] Simplify code with std::map::operator[] (NFC) (#112159)
via llvm-commits
- [llvm] b53186f - [gn build] Port 8f9cce0bef31
Nico Weber via llvm-commits
- [llvm] 91a0fec - [SLP][NFC]Replace unreachable instructions by rets, NFC.
Alexey Bataev via llvm-commits
- [llvm] [RISCV][VLOPT] Add support for 11.11 integer widening multiply instructions (PR #112204)
Michael Maitland via llvm-commits
- [llvm] [BranchFolding] Add an option to tail merge only bbs without successors (PR #101969)
Vladimir Radosavljevic via llvm-commits
- [llvm] [docs] Update docs on code-review process (PR #111735)
Andrzej Warzyński via llvm-commits
- [compiler-rt] [llvm] Add explicit symbol visibility macros to InstrProfData.inc (PR #110732)
Vassil Vassilev via llvm-commits
- [llvm] ddb64e6 - [AArch64] Add support for Armv9.6-A FEAT_MPAM system registers (#111822)
via llvm-commits
- [llvm] [AArch64] Add support for Armv9.6-A FEAT_MPAM system registers (PR #111822)
Jonathan Thackray via llvm-commits
- [llvm] LAA: generalize strides over unequal type sizes (PR #108088)
Ramkumar Ramachandra via llvm-commits
- [llvm] [AMDGPU][test]added remove duplicate options for update_mc_test_check script (PR #111769)
Ivan Kosarev via llvm-commits
- [llvm] 84b99b4 - [NFC][CodingStandard] Extend if-else brace example with else-if (#112193)
via llvm-commits
- [llvm] [LLVM][TableGen] Check overloaded intrinsic mangling suffix conflicts (PR #110324)
Rahul Joshi via llvm-commits
- [llvm] 81fee74 - [Hexagon] Mark instructions as part of the frame setup to fix test sugared-constants.ll (#111795)
via llvm-commits
- [llvm] [Hexagon] Mark instructions as part of the frame setup to fix test sugared-constants.ll (PR #111795)
Ikhlas Ajbar via llvm-commits
- [llvm] [AArch64] Avoid single-element vector fp converts in streaming[-compatible] functions (PR #112213)
Benjamin Maxwell via llvm-commits
- [llvm] [AMDGPU] Include WWM register spill into BB Prolog (PR #111496)
via llvm-commits
- [llvm] [RISCV][VLOPT] Add support for 11.13 integer multiply-add instructions (PR #112216)
Michael Maitland via llvm-commits
- [llvm] [LAA] Use MaxStride instead of CommonStride to calculate MaxVF (PR #98142)
Florian Hahn via llvm-commits
- [llvm] InstCombine/test: cover foldSelectValueEquivalence (PR #111694)
Ramkumar Ramachandra via llvm-commits
- [llvm] InstCombine: extend select-equiv to support vectors (PR #111966)
Ramkumar Ramachandra via llvm-commits
- [llvm] cbc4be2 - [AMDGPU] Use MachineInstr::mayLoadOrStore. NFC.
Jay Foad via llvm-commits
- [llvm] [CodeGen] Correctly handle non-standard cases in RemoveLoadsIntoFakeUses (PR #111551)
Stephen Tozer via llvm-commits
- [llvm] aa2c0f3 - [ARM] [AArch32] Add support for Arm China STAR-MC1 CPU (#110085)
via llvm-commits
- [llvm] [RISCV][VLOPT] Add support for 11.14 widening integer mul-add instructions (PR #112219)
Michael Maitland via llvm-commits
- [llvm] ab902ee - [SLP][NFC]Replace more unreachable terminators by rets, NFC
Alexey Bataev via llvm-commits
- [llvm] [LV][EVL] Introduce MergeUntilPivot VPInstruction to enable out-loop reduction in EVL vectorization. (PR #101641)
Mel Chen via llvm-commits
- [llvm] [AMDGPU][AMDGPUDemoteSCCBranchToExecz] demote s_cbranch_scc0/1 branches into vcmp + s_cbranch_execz branches (PR #110284)
Juan Manuel Martinez Caamaño via llvm-commits
- [clang] [lld] [llvm] [WebAssembly] Define a new "Trail1" CPU (PR #112035)
Dan Gohman via llvm-commits
- [llvm] [InstCombine] Extend fcmp+select folding to minnum/maxnum intrinsics (PR #112088)
Alexey Bader via llvm-commits
- [llvm] [LV] Check early for supported interleave factors with scalable types [nfc] (PR #111592)
David Sherwood via llvm-commits
- [llvm] [SLP]Do not vectorize code in EH and non-returning blocks (PR #112221)
Alexey Bataev via llvm-commits
- [llvm] [LLVM] Change `Intrinsic::getBaseName` to return `std::string` (PR #111613)
Rahul Joshi via llvm-commits
- [llvm] eb83e4a - [llvm][llvm-lit] Fix typo in --resultdb-output help
David Spickett via llvm-commits
- [llvm] [VPlan] Implement VPReductionRecipe::computeCost(). NFC (PR #107790)
Florian Hahn via llvm-commits
- [llvm] [KernelInfo] Implement new LLVM IR pass for GPU code analysis (PR #102944)
Matt Arsenault via llvm-commits
- [llvm] LAA: check nusw on GEP in place of inbounds (PR #112223)
Ramkumar Ramachandra via llvm-commits
- [llvm] [mlir] Fix CMake dependencies on mlir-linalg-ods-yaml-gen (PR #112224)
Thomas Preud'homme via llvm-commits
- [llvm] a31e834 - [RISCV][VLOPT] Update test cases to use riscv-enable-vl-optimizer and better formatting
Michael Maitland via llvm-commits
- [llvm] a746594 - [AMDGPU] Skip terminators when forcing emit zero flag (#112116)
via llvm-commits
- [llvm] [utils] support "Reverts ${PR}" in commit messages (PR #112226)
George Burgess IV via llvm-commits
- [llvm] [APInt] Fix getAllOnes() with zero width (PR #112227)
Nikita Popov via llvm-commits
- [llvm] [RISCV][VLOPT] Allow propagation even when VL isn't VLMAX (PR #112228)
Michael Maitland via llvm-commits
- [llvm] [AArch64] Add @llvm.experimental.vector.match (PR #101974)
David Sherwood via llvm-commits
- [llvm] [llvm][llvm-lit] Add total time for each testsuite in JUnit XML output (PR #112230)
David Spickett via llvm-commits
- [llvm] [RISCV][VLOPT] Add support for mask-register logical instructions and set mask instructions (PR #112231)
Michael Maitland via llvm-commits
- [clang] [llvm] Update llvm::Registry to work for LLVM shared library builds on windows (PR #109024)
Vassil Vassilev via llvm-commits
- [llvm] [mlir] eliminating g++ warnings (PR #105520)
Frank Schlimbach via llvm-commits
- [libcxx] [llvm] [libcxx] improves diagnostics for containers with bad value types (PR #106296)
Christopher Di Bella via llvm-commits
- [llvm] [AArch64][PAC] Factor out the emission of pointer check sequence (NFC) (PR #110702)
Anton Korobeynikov via llvm-commits
- [llvm] [JumpThreading] Add a hook to override options (PR #111826)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] In instruction selector, allow copy from physical reg to s1 (PR #96157)
Matt Arsenault via llvm-commits
- [clang] [llvm] [AArch64] Introduce new armv9.6 features (PR #111677)
via llvm-commits
- [llvm] b5600c6 - [TargetLowering][SelectionDAG] Exploit nneg Flag in UINT_TO_FP (#108931)
via llvm-commits
- [clang] [llvm] [llvm][opt][Transforms][SPIR-V] Enable `InferAddressSpaces` for SPIR-V (PR #110897)
Matt Arsenault via llvm-commits
- [llvm] [BOLT] Support perf2bolt-N in the driver (PR #111072)
Amir Ayupov via llvm-commits
- [llvm] [NVTPX] Copy kernel arguments as byte array (PR #110356)
Artem Belevich via llvm-commits
- [llvm] [IR] Add `samesign` flag to icmp instruction (PR #111419)
Thorsten Schütt via llvm-commits
- [llvm] [feature][riscv] handle target address calculation in llvm-objdump disassembly for riscv (PR #109914)
Craig Topper via llvm-commits
- [llvm] 2f077ec - [RISCV][VLOPT] Enable VLOptimizer for vl-opt.ll test file
Michael Maitland via llvm-commits
- [llvm] Add a pass to collect dropped variable statistics (PR #102233)
Shubham Sandeep Rastogi via llvm-commits
- [compiler-rt] d4efc3e - [Coverage][WebAssembly] Add initial support for WebAssembly/WASI (#111332)
via llvm-commits
- [clang] [compiler-rt] [lld] [llvm] [Coverage][WebAssembly] Add initial support for WebAssembly/WASI (PR #111332)
Yuta Saito via llvm-commits
- [lldb] [llvm] [lldb] Move SBLanguages.h out of API tree (PR #111929)
Med Ismail Bennani via llvm-commits
- [clang] [llvm] [CUDA] Add support for CUDA-12.6 and sm_100 (PR #112028)
Artem Belevich via llvm-commits
- [compiler-rt] 53c9553 - [scudo] Apply the min release threshold to the group (#112014)
via llvm-commits
- [compiler-rt] [scudo] Apply the min release threshold to the group (PR #112014)
via llvm-commits
- [llvm] [X86][CodeGen] Add base atan2 intrinsic lowering (p4) (PR #110760)
Tex Riddell via llvm-commits
- [llvm] [LLVM] Re-add `Intrinsic::getDeclaration` for out-of-tree code (PR #112242)
Rahul Joshi via llvm-commits
- [llvm] [SandboxVectorizer] Add container class to track and manage SeedBundles (PR #112048)
via llvm-commits
- [lld] [LLD][COFF] Fix handling of weak aliases referencing lazy symbols (PR #112243)
Jacek Caban via llvm-commits
- [llvm] 82e89c0 - [RISCV][VLOPT] Add support for 11.9 min/max instructions (#112198)
via llvm-commits
- [llvm] c2c4db8 - [RISCV][VLOPT] Add support for 11.11 div instructions (#112201)
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NAKAMURA Takumi via llvm-commits
- [llvm] Introduce CounterExpressionBuilder::replace(C, Map) (PR #112698)
NAKAMURA Takumi via llvm-commits
- [llvm] Introduce CounterExpressionBuilder::replace(C, Map) (PR #112698)
NAKAMURA Takumi via llvm-commits
- [llvm] Introduce CounterExpressionBuilder::replace(C, Map) (PR #112698)
NAKAMURA Takumi via llvm-commits
- [llvm] Introduce CounterExpressionBuilder::replace(C, Map) (PR #112698)
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Nashe Mncube via llvm-commits
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Nikita Popov via llvm-commits
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- [compiler-rt] 8f8d5f0 - [rtsan] Add statistics for suppression count (#112718)
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- [llvm] ab75180 - [DirectX] Remove trivially dead functions at linkage finalize (#106146)
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- [compiler-rt] 29097dd - [rtsan][NFC] Remove rtsan_ prefix from stats variables (#112762)
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- [llvm] [DebugInfo] Fix missing includes in two headers (PR #112766)
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- [clang] [llvm] [Clang] Match MSVC handling of duplicate header search paths in Microsoft compatibility modes. (PR #105738)
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- [compiler-rt] 7086584 - [sanitizer] Large range support in IsAccessibleMemoryRange (#112665)
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- [llvm] Fix crash in `CodeGenPrepare.cpp` and `Verifier.cpp` (PR #112772)
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- [llvm] 5033ea7 - [LLDB][Minidump] Add breakpoint stop reasons to the minidump. (#108448)
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Paul Kirth via llvm-commits
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Rahul Joshi via llvm-commits
- [llvm] [llvm][aarch64] Add support for the MS qualifiers __ptr32, __ptr64, _sptr, __uptr (PR #112793)
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- [llvm] [SystemZ] Rename SystemZ ATT Asm dialect to GNU Asm dialect (PR #112800)
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Vitaly Buka via llvm-commits
- [llvm] [SandboxIR] Implement Operator (PR #112805)
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- [llvm] e9eec14 - [LoongArch] [CodeGen] Add options for Clang to generate LoongArch-specific frecipe & frsqrte instructions (#109917)
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- [llvm] 69a798a - Reapply "[Inliner] Propagate more attributes to params when inlining (#91101)" (2nd Attempt) (#112749)
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- [llvm] [NFC] Add SHF_NONE to fix Werror=extra warning (PR #112808)
Jinsong Ji via llvm-commits
- [llvm] 44b020a - [PowerPC][ISelLowering] Support -mstack-protector-guard=tls (#110928)
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- [clang] [llvm] [PowerPC][ISelLowering] Support -mstack-protector-guard=tls (PR #110928)
Kees Cook via llvm-commits
- [llvm] [NFC] Fix multi-character character constant warning (PR #112809)
Jinsong Ji via llvm-commits
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Vitaly Buka via llvm-commits
- [compiler-rt] bbccc52 - [lsan] Disable test with barriers on Darwin (#112810)
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Zequan Wu via llvm-commits
- [llvm] [MIPS] Use softPromoteHalf legalization for fp16 rather than PromoteFloat (PR #110199)
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- [llvm] [NFC][X86] Fix Werror=extra error due to enum (PR #112812)
Jinsong Ji via llvm-commits
- [llvm] [NFC] Fix dangling-else warning (PR #112817)
Jinsong Ji via llvm-commits
- [llvm] [AMDGPU] Avoid repeated map lookups (NFC) (PR #112819)
Kazu Hirata via llvm-commits
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Kazu Hirata via llvm-commits
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Kazu Hirata via llvm-commits
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Kazu Hirata via llvm-commits
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Jinsong Ji via llvm-commits
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Jinsong Ji via llvm-commits
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Alex MacLean via llvm-commits
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- [llvm] b497010 - [VPlan] Use VPInstruction::Name when assigning names (NFCI).
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- [llvm] Adding more vector calls for -fveclib=AMDLIBM (PR #109662)
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- [llvm] d7ae43e - [NFC][X86] Fix Werror=extra error due to enum (#112812)
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- [llvm] [GlobalIsel] Combine zext of trunc (episode II) (PR #108305)
Thorsten Schütt via llvm-commits
- [llvm] b9cb9b3 - [GVNSink] Avoid repeated hash lookups (NFC) (#113023)
via llvm-commits
- [llvm] [KnownBits] Make `{s,u}{add,sub}_sat` optimal (PR #113096)
via llvm-commits
- [llvm] 3bddf85 - [sancov] Avoid repeated map lookups (NFC) (#113026)
via llvm-commits
- [llvm] d140182 - [Support] Use a hetrogenous lookup with std::map (NFC) (#113075)
via llvm-commits
- [llvm] [Support] Add clang tooling generated explicit visibility macros (PR #113097)
Thomas Fransham via llvm-commits
- [llvm] [X86][AVX512] Use comx for compare (PR #113098)
via llvm-commits
- [llvm] [AMDGPU][True16][test] update VOP2 asm/dasm file with true16/fake16 (PR #113101)
Brox Chen via llvm-commits
- [lldb] [llvm] [DebugInfo] Add explicit visibility macros to CodeView template functions (PR #113102)
Thomas Fransham via llvm-commits
- [compiler-rt] c2717a8 - [compiler-rt] [test] Remove an unintended grep parameter
Martin Storsjö via llvm-commits
- [llvm] clang crash assigning to a global named register variable #109778 (PR #113105)
Akshay Kumar via llvm-commits
- [llvm] 20bda93 - [TLI] Add basic support for scalbnxx (#112936)
via llvm-commits
- [llvm] [InstCombine] Fold copysign of selects from sign comparison to sign operand (PR #85627)
Matt Arsenault via llvm-commits
- [llvm] 173907b - [LV] Move logic to check if op is invariant to legacy cost model. (NFC)
Florian Hahn via llvm-commits
- [clang] [compiler-rt] [llvm] Single byte coverage with branch coverage (PR #113115)
NAKAMURA Takumi via llvm-commits
- [llvm] Perf/goldsteinn/nocapture wip (PR #113116)
via llvm-commits
- [llvm] [DebugInfo] Use heterogenous lookups with std::map (NFC) (PR #113118)
Kazu Hirata via llvm-commits
- [llvm] [tools] Don't call StringRef::str() when calling StringMap::find (NFC) (PR #113119)
Kazu Hirata via llvm-commits
- [llvm] [Transforms] Avoid repeated hash lookups (NFC) (PR #113120)
Kazu Hirata via llvm-commits
- [llvm] [LAA] Don't require Stride == 1/-1 for inbounds pointer AddRecs nowrap. (PR #113126)
Florian Hahn via llvm-commits
- [llvm] Allow physical registers in patterns (PR #113127)
via llvm-commits
- [llvm] [AMDGPU][MIR] Serialize SpillPhysVGPRs (PR #113129)
Akshat Oke via llvm-commits
- [compiler-rt] [compiler-rt] Add infrastructure for testing cpuid builtins (PR #101927)
Aiden Grossman via llvm-commits
Last message date:
Sun Oct 20 23:45:35 PDT 2024
Archived on: Sun Oct 20 23:45:37 PDT 2024
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