[llvm] [DXIL] Add GroupMemoryBarrierWithGroupSync intrinsic (PR #112641)
Adam Yang via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 16 17:59:21 PDT 2024
https://github.com/adam-yang created https://github.com/llvm/llvm-project/pull/112641
Example implementation of lowering GroupMemoryBarrierWithGroupSync via new tablegen based method.
>From 6fb6bd74848180a5cf007723580f7302b07699a6 Mon Sep 17 00:00:00 2001
From: Adam Yang <31109344+adam-yang at users.noreply.github.com>
Date: Tue, 8 Oct 2024 00:53:11 -0700
Subject: [PATCH 1/9] Added GroupMemoryBarrierWithGroupSync intrinsic for DXIL
---
llvm/include/llvm/IR/IntrinsicsDirectX.td | 2 ++
llvm/lib/Target/DirectX/DXIL.td | 9 ++++++
llvm/lib/Target/DirectX/DXILConstants.h | 7 +++++
llvm/lib/Target/DirectX/DXILOpLowering.cpp | 31 +++++++++++++++++++
.../GroupMemoryBarrierWithGroupSync.ll | 8 +++++
5 files changed, 57 insertions(+)
create mode 100644 llvm/test/CodeGen/DirectX/GroupMemoryBarrierWithGroupSync.ll
diff --git a/llvm/include/llvm/IR/IntrinsicsDirectX.td b/llvm/include/llvm/IR/IntrinsicsDirectX.td
index 1cf6acbf126475..32ff2c0de04662 100644
--- a/llvm/include/llvm/IR/IntrinsicsDirectX.td
+++ b/llvm/include/llvm/IR/IntrinsicsDirectX.td
@@ -88,4 +88,6 @@ def int_dx_wave_is_first_lane : DefaultAttrsIntrinsic<[llvm_i1_ty], [], [IntrCon
def int_dx_sign : DefaultAttrsIntrinsic<[LLVMScalarOrSameVectorWidth<0, llvm_i32_ty>], [llvm_any_ty], [IntrNoMem]>;
def int_dx_step : DefaultAttrsIntrinsic<[LLVMMatchType<0>], [llvm_anyfloat_ty, LLVMMatchType<0>], [IntrNoMem]>;
def int_dx_radians : DefaultAttrsIntrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>], [IntrNoMem]>;
+
+def int_dx_groupMemoryBarrierWithGroupSync : DefaultAttrsIntrinsic<[], [], []>;
}
diff --git a/llvm/lib/Target/DirectX/DXIL.td b/llvm/lib/Target/DirectX/DXIL.td
index e8f56b18730d71..a4ffc38d2af297 100644
--- a/llvm/lib/Target/DirectX/DXIL.td
+++ b/llvm/lib/Target/DirectX/DXIL.td
@@ -277,6 +277,7 @@ def IsFeedback : DXILAttribute;
def IsWave : DXILAttribute;
def NeedsUniformInputs : DXILAttribute;
def IsBarrier : DXILAttribute;
+def NoDuplicate : DXILAttribute;
class Overloads<Version ver, list<DXILOpParamType> ols> {
Version dxil_version = ver;
@@ -810,3 +811,11 @@ def WaveGetLaneIndex : DXILOp<111, waveGetLaneIndex> {
let stages = [Stages<DXIL1_0, [all_stages]>];
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
+
+def Barrier : DXILOp<80, barrier> {
+ let Doc = "inserts a memory barrier in the shader";
+ let arguments = [Int32Ty];
+ let result = VoidTy;
+ let stages = [Stages<DXIL1_0, [compute, library]>];
+ let attributes = [Attributes<DXIL1_0, [NoDuplicate]>];
+}
diff --git a/llvm/lib/Target/DirectX/DXILConstants.h b/llvm/lib/Target/DirectX/DXILConstants.h
index 022cd57795a063..38984727761bb3 100644
--- a/llvm/lib/Target/DirectX/DXILConstants.h
+++ b/llvm/lib/Target/DirectX/DXILConstants.h
@@ -30,6 +30,13 @@ enum class OpParamType : unsigned {
#include "DXILOperation.inc"
};
+enum class BarrierMode : unsigned {
+ SyncThreadGroup = 0x00000001,
+ UAVFenceGlobal = 0x00000002,
+ UAVFenceThreadGroup = 0x00000004,
+ TGSMFence = 0x00000008,
+};
+
} // namespace dxil
} // namespace llvm
diff --git a/llvm/lib/Target/DirectX/DXILOpLowering.cpp b/llvm/lib/Target/DirectX/DXILOpLowering.cpp
index c0f8d433833ee7..93b9aa49379f3e 100644
--- a/llvm/lib/Target/DirectX/DXILOpLowering.cpp
+++ b/llvm/lib/Target/DirectX/DXILOpLowering.cpp
@@ -210,6 +210,34 @@ class OpLowerer {
});
}
+ [[nodiscard]] bool lowerBarrier(Function& F, Intrinsic::ID IntrId) {
+ IRBuilder<> &IRB = OpBuilder.getIRB();
+ return replaceFunction(F, [&](CallInst *CI) -> Error {
+ unsigned BarrierMode = 0;
+ switch (IntrId) {
+ default:
+ report_fatal_error("Unhandled barrier operation type.");
+ break;
+ case Intrinsic::dx_groupMemoryBarrierWithGroupSync:
+ BarrierMode = (unsigned)dxil::BarrierMode::TGSMFence | (unsigned)dxil::BarrierMode::SyncThreadGroup;
+ break;
+ }
+
+ std::array<Value *, 1> Args{IRB.getInt32(BarrierMode)};
+
+ IRB.SetInsertPoint(CI);
+ Expected<CallInst *> OpCall =
+ OpBuilder.tryCreateOp(OpCode::Barrier, Args, CI->getName());
+ if (Error E = OpCall.takeError())
+ return E;
+
+ CI->replaceAllUsesWith(OpCall.get());
+ CI->eraseFromParent();
+
+ return Error::success();
+ });
+ }
+
[[nodiscard]] bool lowerToBindAndAnnotateHandle(Function &F) {
IRBuilder<> &IRB = OpBuilder.getIRB();
@@ -477,6 +505,9 @@ class OpLowerer {
HasErrors |= replaceFunctionWithOp(F, OpCode); \
break;
#include "DXILOperation.inc"
+ case Intrinsic::dx_groupMemoryBarrierWithGroupSync:
+ HasErrors |= lowerBarrier(F, ID);
+ break;
case Intrinsic::dx_handle_fromBinding:
HasErrors |= lowerHandleFromBinding(F);
break;
diff --git a/llvm/test/CodeGen/DirectX/GroupMemoryBarrierWithGroupSync.ll b/llvm/test/CodeGen/DirectX/GroupMemoryBarrierWithGroupSync.ll
new file mode 100644
index 00000000000000..a99c6757814f3b
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/GroupMemoryBarrierWithGroupSync.ll
@@ -0,0 +1,8 @@
+; RUN: opt -S -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library < %s | FileCheck %s --check-prefix=CHECK
+
+define void @test_group_memory_barrier_with_group_sync() {
+entry:
+ ; CHECK: call void @dx.op.barrier(i32 80, i32 9)
+ call void @llvm.dx.groupMemoryBarrierWithGroupSync()
+ ret void
+}
\ No newline at end of file
>From ea6e1b3f6d0b92f4b324cd8a535eb0012221c496 Mon Sep 17 00:00:00 2001
From: Adam Yang <hanbyang at microsoft.com>
Date: Thu, 10 Oct 2024 12:25:26 -0700
Subject: [PATCH 2/9] Changed naming convention and fixed formatting
---
llvm/include/llvm/IR/IntrinsicsDirectX.td | 2 +-
llvm/lib/Target/DirectX/DXILOpLowering.cpp | 23 ++++++++-----------
...> group_memory_barrier_with_group_sync.ll} | 2 +-
3 files changed, 12 insertions(+), 15 deletions(-)
rename llvm/test/CodeGen/DirectX/{GroupMemoryBarrierWithGroupSync.ll => group_memory_barrier_with_group_sync.ll} (80%)
diff --git a/llvm/include/llvm/IR/IntrinsicsDirectX.td b/llvm/include/llvm/IR/IntrinsicsDirectX.td
index 32ff2c0de04662..d891809da01bcb 100644
--- a/llvm/include/llvm/IR/IntrinsicsDirectX.td
+++ b/llvm/include/llvm/IR/IntrinsicsDirectX.td
@@ -89,5 +89,5 @@ def int_dx_sign : DefaultAttrsIntrinsic<[LLVMScalarOrSameVectorWidth<0, llvm_i32
def int_dx_step : DefaultAttrsIntrinsic<[LLVMMatchType<0>], [llvm_anyfloat_ty, LLVMMatchType<0>], [IntrNoMem]>;
def int_dx_radians : DefaultAttrsIntrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>], [IntrNoMem]>;
-def int_dx_groupMemoryBarrierWithGroupSync : DefaultAttrsIntrinsic<[], [], []>;
+def int_dx_group_memory_barrier_with_group_sync : DefaultAttrsIntrinsic<[], [], []>;
}
diff --git a/llvm/lib/Target/DirectX/DXILOpLowering.cpp b/llvm/lib/Target/DirectX/DXILOpLowering.cpp
index 93b9aa49379f3e..f3ff372af8d201 100644
--- a/llvm/lib/Target/DirectX/DXILOpLowering.cpp
+++ b/llvm/lib/Target/DirectX/DXILOpLowering.cpp
@@ -210,19 +210,14 @@ class OpLowerer {
});
}
- [[nodiscard]] bool lowerBarrier(Function& F, Intrinsic::ID IntrId) {
+ [[nodiscard]] bool lowerBarrier(Function &F, Intrinsic::ID IntrId,
+ ArrayRef<dxil::BarrierMode> BarrierModes) {
+ unsigned BarrierMode = 0;
+ for (const dxil::BarrierMode B : BarrierModes) {
+ BarrierMode |= (unsigned)B;
+ }
IRBuilder<> &IRB = OpBuilder.getIRB();
return replaceFunction(F, [&](CallInst *CI) -> Error {
- unsigned BarrierMode = 0;
- switch (IntrId) {
- default:
- report_fatal_error("Unhandled barrier operation type.");
- break;
- case Intrinsic::dx_groupMemoryBarrierWithGroupSync:
- BarrierMode = (unsigned)dxil::BarrierMode::TGSMFence | (unsigned)dxil::BarrierMode::SyncThreadGroup;
- break;
- }
-
std::array<Value *, 1> Args{IRB.getInt32(BarrierMode)};
IRB.SetInsertPoint(CI);
@@ -505,8 +500,10 @@ class OpLowerer {
HasErrors |= replaceFunctionWithOp(F, OpCode); \
break;
#include "DXILOperation.inc"
- case Intrinsic::dx_groupMemoryBarrierWithGroupSync:
- HasErrors |= lowerBarrier(F, ID);
+ case Intrinsic::dx_group_memory_barrier_with_group_sync:
+ HasErrors |= lowerBarrier(
+ F, ID,
+ {dxil::BarrierMode::TGSMFence, dxil::BarrierMode::SyncThreadGroup});
break;
case Intrinsic::dx_handle_fromBinding:
HasErrors |= lowerHandleFromBinding(F);
diff --git a/llvm/test/CodeGen/DirectX/GroupMemoryBarrierWithGroupSync.ll b/llvm/test/CodeGen/DirectX/group_memory_barrier_with_group_sync.ll
similarity index 80%
rename from llvm/test/CodeGen/DirectX/GroupMemoryBarrierWithGroupSync.ll
rename to llvm/test/CodeGen/DirectX/group_memory_barrier_with_group_sync.ll
index a99c6757814f3b..48907647c660f8 100644
--- a/llvm/test/CodeGen/DirectX/GroupMemoryBarrierWithGroupSync.ll
+++ b/llvm/test/CodeGen/DirectX/group_memory_barrier_with_group_sync.ll
@@ -3,6 +3,6 @@
define void @test_group_memory_barrier_with_group_sync() {
entry:
; CHECK: call void @dx.op.barrier(i32 80, i32 9)
- call void @llvm.dx.groupMemoryBarrierWithGroupSync()
+ call void @llvm.dx.group.memory.barrier.with.group.sync()
ret void
}
\ No newline at end of file
>From 7ee8d540c359757eab545e04d8091e52f6b932dc Mon Sep 17 00:00:00 2001
From: Adam Yang <hanbyang at microsoft.com>
Date: Thu, 10 Oct 2024 12:59:52 -0700
Subject: [PATCH 3/9] Got rid of the noduplicate attr
---
llvm/lib/Target/DirectX/DXIL.td | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/llvm/lib/Target/DirectX/DXIL.td b/llvm/lib/Target/DirectX/DXIL.td
index a4ffc38d2af297..bff9fa3ca3b68e 100644
--- a/llvm/lib/Target/DirectX/DXIL.td
+++ b/llvm/lib/Target/DirectX/DXIL.td
@@ -277,7 +277,6 @@ def IsFeedback : DXILAttribute;
def IsWave : DXILAttribute;
def NeedsUniformInputs : DXILAttribute;
def IsBarrier : DXILAttribute;
-def NoDuplicate : DXILAttribute;
class Overloads<Version ver, list<DXILOpParamType> ols> {
Version dxil_version = ver;
@@ -817,5 +816,5 @@ def Barrier : DXILOp<80, barrier> {
let arguments = [Int32Ty];
let result = VoidTy;
let stages = [Stages<DXIL1_0, [compute, library]>];
- let attributes = [Attributes<DXIL1_0, [NoDuplicate]>];
+ let attributes = [Attributes<DXIL1_0, []>];
}
>From c7d83cf8ae32d98b0677ff1a88f74fe4827dd61f Mon Sep 17 00:00:00 2001
From: Adam Yang <hanbyang at microsoft.com>
Date: Thu, 10 Oct 2024 13:03:52 -0700
Subject: [PATCH 4/9] Shader model changed to 6.0
---
.../CodeGen/DirectX/group_memory_barrier_with_group_sync.ll | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/llvm/test/CodeGen/DirectX/group_memory_barrier_with_group_sync.ll b/llvm/test/CodeGen/DirectX/group_memory_barrier_with_group_sync.ll
index 48907647c660f8..7cacbe778ac952 100644
--- a/llvm/test/CodeGen/DirectX/group_memory_barrier_with_group_sync.ll
+++ b/llvm/test/CodeGen/DirectX/group_memory_barrier_with_group_sync.ll
@@ -1,4 +1,4 @@
-; RUN: opt -S -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library < %s | FileCheck %s --check-prefix=CHECK
+; RUN: opt -S -dxil-op-lower -mtriple=dxil-pc-shadermodel6.0-library < %s | FileCheck %s --check-prefix=CHECK
define void @test_group_memory_barrier_with_group_sync() {
entry:
>From 279fe4550883f8941b113641653971222e16dec6 Mon Sep 17 00:00:00 2001
From: Adam Yang <hanbyang at microsoft.com>
Date: Thu, 10 Oct 2024 13:07:03 -0700
Subject: [PATCH 5/9] Fixed the incorrect arguments list
---
llvm/lib/Target/DirectX/DXIL.td | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/llvm/lib/Target/DirectX/DXIL.td b/llvm/lib/Target/DirectX/DXIL.td
index bff9fa3ca3b68e..ae55eb9f02cb55 100644
--- a/llvm/lib/Target/DirectX/DXIL.td
+++ b/llvm/lib/Target/DirectX/DXIL.td
@@ -813,7 +813,7 @@ def WaveGetLaneIndex : DXILOp<111, waveGetLaneIndex> {
def Barrier : DXILOp<80, barrier> {
let Doc = "inserts a memory barrier in the shader";
- let arguments = [Int32Ty];
+ let arguments = [];
let result = VoidTy;
let stages = [Stages<DXIL1_0, [compute, library]>];
let attributes = [Attributes<DXIL1_0, []>];
>From a4258a8280822af40490f4f4e260fa8ff1c38f0d Mon Sep 17 00:00:00 2001
From: Adam Yang <hanbyang at microsoft.com>
Date: Thu, 10 Oct 2024 13:13:21 -0700
Subject: [PATCH 6/9] Revert "Shader model changed to 6.0"
This reverts commit c7d83cf8ae32d98b0677ff1a88f74fe4827dd61f.
---
.../CodeGen/DirectX/group_memory_barrier_with_group_sync.ll | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/llvm/test/CodeGen/DirectX/group_memory_barrier_with_group_sync.ll b/llvm/test/CodeGen/DirectX/group_memory_barrier_with_group_sync.ll
index 7cacbe778ac952..48907647c660f8 100644
--- a/llvm/test/CodeGen/DirectX/group_memory_barrier_with_group_sync.ll
+++ b/llvm/test/CodeGen/DirectX/group_memory_barrier_with_group_sync.ll
@@ -1,4 +1,4 @@
-; RUN: opt -S -dxil-op-lower -mtriple=dxil-pc-shadermodel6.0-library < %s | FileCheck %s --check-prefix=CHECK
+; RUN: opt -S -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library < %s | FileCheck %s --check-prefix=CHECK
define void @test_group_memory_barrier_with_group_sync() {
entry:
>From 70688f663e91c5cf3a8d57aa1e636bf34dbac1cc Mon Sep 17 00:00:00 2001
From: Adam Yang <31109344+adam-yang at users.noreply.github.com>
Date: Tue, 15 Oct 2024 15:56:50 -0700
Subject: [PATCH 7/9] Added another intermediate memory barrier intrinsic that
maps directly to the barrier dxil op
---
llvm/include/llvm/IR/IntrinsicsDirectX.td | 1 +
llvm/lib/Target/DirectX/DXIL.td | 3 +-
.../Target/DirectX/DXILIntrinsicExpansion.cpp | 26 +++++++++++++++++
llvm/lib/Target/DirectX/DXILOpLowering.cpp | 28 -------------------
.../group_memory_barrier_with_group_sync.ll | 2 +-
5 files changed, 30 insertions(+), 30 deletions(-)
diff --git a/llvm/include/llvm/IR/IntrinsicsDirectX.td b/llvm/include/llvm/IR/IntrinsicsDirectX.td
index d891809da01bcb..af60f5e2136f99 100644
--- a/llvm/include/llvm/IR/IntrinsicsDirectX.td
+++ b/llvm/include/llvm/IR/IntrinsicsDirectX.td
@@ -89,5 +89,6 @@ def int_dx_sign : DefaultAttrsIntrinsic<[LLVMScalarOrSameVectorWidth<0, llvm_i32
def int_dx_step : DefaultAttrsIntrinsic<[LLVMMatchType<0>], [llvm_anyfloat_ty, LLVMMatchType<0>], [IntrNoMem]>;
def int_dx_radians : DefaultAttrsIntrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>], [IntrNoMem]>;
+def int_dx_memory_barrier : DefaultAttrsIntrinsic<[], [llvm_i32_ty], []>;
def int_dx_group_memory_barrier_with_group_sync : DefaultAttrsIntrinsic<[], [], []>;
}
diff --git a/llvm/lib/Target/DirectX/DXIL.td b/llvm/lib/Target/DirectX/DXIL.td
index ae55eb9f02cb55..b596aa8239a0e2 100644
--- a/llvm/lib/Target/DirectX/DXIL.td
+++ b/llvm/lib/Target/DirectX/DXIL.td
@@ -813,7 +813,8 @@ def WaveGetLaneIndex : DXILOp<111, waveGetLaneIndex> {
def Barrier : DXILOp<80, barrier> {
let Doc = "inserts a memory barrier in the shader";
- let arguments = [];
+ let LLVMIntrinsic = int_dx_memory_barrier;
+ let arguments = [Int32Ty];
let result = VoidTy;
let stages = [Stages<DXIL1_0, [compute, library]>];
let attributes = [Attributes<DXIL1_0, []>];
diff --git a/llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp b/llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
index 1e84a7216013da..2bbd5c8e3d7cf0 100644
--- a/llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
+++ b/llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
@@ -10,6 +10,7 @@
// opcodes in DirectX Intermediate Language (DXIL).
//===----------------------------------------------------------------------===//
+#include "DXILConstants.h"
#include "DXILIntrinsicExpansion.h"
#include "DirectX.h"
#include "llvm/ADT/STLExtras.h"
@@ -65,6 +66,7 @@ static bool isIntrinsicExpansion(Function &F) {
case Intrinsic::dx_sign:
case Intrinsic::dx_step:
case Intrinsic::dx_radians:
+ case Intrinsic::dx_group_memory_barrier_with_group_sync:
return true;
}
return false;
@@ -451,6 +453,27 @@ static Value *expandRadiansIntrinsic(CallInst *Orig) {
return Builder.CreateFMul(X, PiOver180);
}
+static Value *expandMemoryBarrier(CallInst *Orig, Intrinsic::ID IntrinsicId) {
+ assert(IntrinsicId == Intrinsic::dx_group_memory_barrier_with_group_sync);
+ unsigned BarrierMode = 0;
+ switch (IntrinsicId) {
+ case Intrinsic::dx_group_memory_barrier_with_group_sync:
+ BarrierMode = (unsigned)dxil::BarrierMode::TGSMFence |
+ (unsigned)dxil::BarrierMode::SyncThreadGroup;
+ break;
+ default:
+ report_fatal_error(Twine("Unexpected memory barrier intrinsic."),
+ /* gen_crash_diag=*/false);
+ break;
+ }
+
+ IRBuilder<> Builder(Orig);
+ return Builder.CreateIntrinsic(
+ Builder.getVoidTy(), Intrinsic::dx_memory_barrier,
+ ArrayRef<Value *>{Builder.getInt32(BarrierMode)}, nullptr,
+ Orig->getName());
+}
+
static Intrinsic::ID getMaxForClamp(Type *ElemTy,
Intrinsic::ID ClampIntrinsic) {
if (ClampIntrinsic == Intrinsic::dx_uclamp)
@@ -574,6 +597,9 @@ static bool expandIntrinsic(Function &F, CallInst *Orig) {
case Intrinsic::dx_radians:
Result = expandRadiansIntrinsic(Orig);
break;
+ case Intrinsic::dx_group_memory_barrier_with_group_sync:
+ Result = expandMemoryBarrier(Orig, IntrinsicId);
+ break;
}
if (Result) {
Orig->replaceAllUsesWith(Result);
diff --git a/llvm/lib/Target/DirectX/DXILOpLowering.cpp b/llvm/lib/Target/DirectX/DXILOpLowering.cpp
index f3ff372af8d201..c0f8d433833ee7 100644
--- a/llvm/lib/Target/DirectX/DXILOpLowering.cpp
+++ b/llvm/lib/Target/DirectX/DXILOpLowering.cpp
@@ -210,29 +210,6 @@ class OpLowerer {
});
}
- [[nodiscard]] bool lowerBarrier(Function &F, Intrinsic::ID IntrId,
- ArrayRef<dxil::BarrierMode> BarrierModes) {
- unsigned BarrierMode = 0;
- for (const dxil::BarrierMode B : BarrierModes) {
- BarrierMode |= (unsigned)B;
- }
- IRBuilder<> &IRB = OpBuilder.getIRB();
- return replaceFunction(F, [&](CallInst *CI) -> Error {
- std::array<Value *, 1> Args{IRB.getInt32(BarrierMode)};
-
- IRB.SetInsertPoint(CI);
- Expected<CallInst *> OpCall =
- OpBuilder.tryCreateOp(OpCode::Barrier, Args, CI->getName());
- if (Error E = OpCall.takeError())
- return E;
-
- CI->replaceAllUsesWith(OpCall.get());
- CI->eraseFromParent();
-
- return Error::success();
- });
- }
-
[[nodiscard]] bool lowerToBindAndAnnotateHandle(Function &F) {
IRBuilder<> &IRB = OpBuilder.getIRB();
@@ -500,11 +477,6 @@ class OpLowerer {
HasErrors |= replaceFunctionWithOp(F, OpCode); \
break;
#include "DXILOperation.inc"
- case Intrinsic::dx_group_memory_barrier_with_group_sync:
- HasErrors |= lowerBarrier(
- F, ID,
- {dxil::BarrierMode::TGSMFence, dxil::BarrierMode::SyncThreadGroup});
- break;
case Intrinsic::dx_handle_fromBinding:
HasErrors |= lowerHandleFromBinding(F);
break;
diff --git a/llvm/test/CodeGen/DirectX/group_memory_barrier_with_group_sync.ll b/llvm/test/CodeGen/DirectX/group_memory_barrier_with_group_sync.ll
index 48907647c660f8..c43625755d6efc 100644
--- a/llvm/test/CodeGen/DirectX/group_memory_barrier_with_group_sync.ll
+++ b/llvm/test/CodeGen/DirectX/group_memory_barrier_with_group_sync.ll
@@ -1,4 +1,4 @@
-; RUN: opt -S -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library < %s | FileCheck %s --check-prefix=CHECK
+; RUN: opt -S -dxil-intrinsic-expansion -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library < %s | FileCheck %s --check-prefix=CHECK
define void @test_group_memory_barrier_with_group_sync() {
entry:
>From e41187a1a32115b313ccd1972e895835fc06ac92 Mon Sep 17 00:00:00 2001
From: Adam Yang <31109344+adam-yang at users.noreply.github.com>
Date: Tue, 15 Oct 2024 16:27:13 -0700
Subject: [PATCH 8/9] Format
---
llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp b/llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
index 2bbd5c8e3d7cf0..e24b04f913be52 100644
--- a/llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
+++ b/llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
@@ -10,8 +10,8 @@
// opcodes in DirectX Intermediate Language (DXIL).
//===----------------------------------------------------------------------===//
-#include "DXILConstants.h"
#include "DXILIntrinsicExpansion.h"
+#include "DXILConstants.h"
#include "DirectX.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallVector.h"
>From 36dbb21745a6e1c2581ef35e6af3428d9253de25 Mon Sep 17 00:00:00 2001
From: Adam Yang <hanbyang at microsoft.com>
Date: Wed, 16 Oct 2024 17:48:25 -0700
Subject: [PATCH 9/9] Tablegen simple
---
llvm/include/llvm/IR/IntrinsicsDirectX.td | 1 -
llvm/lib/Target/DirectX/DXIL.td | 14 +++-
.../Target/DirectX/DXILIntrinsicExpansion.cpp | 26 --------
llvm/lib/Target/DirectX/DXILOpLowering.cpp | 25 +++----
.../group_memory_barrier_with_group_sync.ll | 2 +-
llvm/utils/TableGen/DXILEmitter.cpp | 66 +++++++++++++++----
6 files changed, 80 insertions(+), 54 deletions(-)
diff --git a/llvm/include/llvm/IR/IntrinsicsDirectX.td b/llvm/include/llvm/IR/IntrinsicsDirectX.td
index af60f5e2136f99..d891809da01bcb 100644
--- a/llvm/include/llvm/IR/IntrinsicsDirectX.td
+++ b/llvm/include/llvm/IR/IntrinsicsDirectX.td
@@ -89,6 +89,5 @@ def int_dx_sign : DefaultAttrsIntrinsic<[LLVMScalarOrSameVectorWidth<0, llvm_i32
def int_dx_step : DefaultAttrsIntrinsic<[LLVMMatchType<0>], [llvm_anyfloat_ty, LLVMMatchType<0>], [IntrNoMem]>;
def int_dx_radians : DefaultAttrsIntrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>], [IntrNoMem]>;
-def int_dx_memory_barrier : DefaultAttrsIntrinsic<[], [llvm_i32_ty], []>;
def int_dx_group_memory_barrier_with_group_sync : DefaultAttrsIntrinsic<[], [], []>;
}
diff --git a/llvm/lib/Target/DirectX/DXIL.td b/llvm/lib/Target/DirectX/DXIL.td
index b596aa8239a0e2..bf5b9ba5006ce8 100644
--- a/llvm/lib/Target/DirectX/DXIL.td
+++ b/llvm/lib/Target/DirectX/DXIL.td
@@ -293,6 +293,11 @@ class Attributes<Version ver = DXIL1_0, list<DXILAttribute> attrs> {
list<DXILAttribute> op_attrs = attrs;
}
+class IntrinsicSelect<Intrinsic intr, list<string> extra_args> {
+ Intrinsic Intr = intr;
+ list<string> ExtraArgs = extra_args;
+}
+
// Abstraction DXIL Operation
class DXILOp<int opcode, DXILOpClass opclass> {
// A short description of the operation
@@ -307,6 +312,8 @@ class DXILOp<int opcode, DXILOpClass opclass> {
// LLVM Intrinsic DXIL Operation maps to
Intrinsic LLVMIntrinsic = ?;
+ list<IntrinsicSelect> intrinsic_selects = [];
+
// Result type of the op
DXILOpParamType result;
@@ -813,7 +820,12 @@ def WaveGetLaneIndex : DXILOp<111, waveGetLaneIndex> {
def Barrier : DXILOp<80, barrier> {
let Doc = "inserts a memory barrier in the shader";
- let LLVMIntrinsic = int_dx_memory_barrier;
+ let intrinsic_selects = [
+ IntrinsicSelect<
+ int_dx_group_memory_barrier_with_group_sync,
+ [ "OpBuilder.getIRB().getInt32((unsigned)BarrierMode::SyncThreadGroup | (unsigned)BarrierMode::TGSMFence)" ]>,
+ ];
+
let arguments = [Int32Ty];
let result = VoidTy;
let stages = [Stages<DXIL1_0, [compute, library]>];
diff --git a/llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp b/llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
index e24b04f913be52..1e84a7216013da 100644
--- a/llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
+++ b/llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
@@ -11,7 +11,6 @@
//===----------------------------------------------------------------------===//
#include "DXILIntrinsicExpansion.h"
-#include "DXILConstants.h"
#include "DirectX.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallVector.h"
@@ -66,7 +65,6 @@ static bool isIntrinsicExpansion(Function &F) {
case Intrinsic::dx_sign:
case Intrinsic::dx_step:
case Intrinsic::dx_radians:
- case Intrinsic::dx_group_memory_barrier_with_group_sync:
return true;
}
return false;
@@ -453,27 +451,6 @@ static Value *expandRadiansIntrinsic(CallInst *Orig) {
return Builder.CreateFMul(X, PiOver180);
}
-static Value *expandMemoryBarrier(CallInst *Orig, Intrinsic::ID IntrinsicId) {
- assert(IntrinsicId == Intrinsic::dx_group_memory_barrier_with_group_sync);
- unsigned BarrierMode = 0;
- switch (IntrinsicId) {
- case Intrinsic::dx_group_memory_barrier_with_group_sync:
- BarrierMode = (unsigned)dxil::BarrierMode::TGSMFence |
- (unsigned)dxil::BarrierMode::SyncThreadGroup;
- break;
- default:
- report_fatal_error(Twine("Unexpected memory barrier intrinsic."),
- /* gen_crash_diag=*/false);
- break;
- }
-
- IRBuilder<> Builder(Orig);
- return Builder.CreateIntrinsic(
- Builder.getVoidTy(), Intrinsic::dx_memory_barrier,
- ArrayRef<Value *>{Builder.getInt32(BarrierMode)}, nullptr,
- Orig->getName());
-}
-
static Intrinsic::ID getMaxForClamp(Type *ElemTy,
Intrinsic::ID ClampIntrinsic) {
if (ClampIntrinsic == Intrinsic::dx_uclamp)
@@ -597,9 +574,6 @@ static bool expandIntrinsic(Function &F, CallInst *Orig) {
case Intrinsic::dx_radians:
Result = expandRadiansIntrinsic(Orig);
break;
- case Intrinsic::dx_group_memory_barrier_with_group_sync:
- Result = expandMemoryBarrier(Orig, IntrinsicId);
- break;
}
if (Result) {
Orig->replaceAllUsesWith(Result);
diff --git a/llvm/lib/Target/DirectX/DXILOpLowering.cpp b/llvm/lib/Target/DirectX/DXILOpLowering.cpp
index c0f8d433833ee7..1be20cf112bb6f 100644
--- a/llvm/lib/Target/DirectX/DXILOpLowering.cpp
+++ b/llvm/lib/Target/DirectX/DXILOpLowering.cpp
@@ -105,20 +105,21 @@ class OpLowerer {
return false;
}
- [[nodiscard]]
- bool replaceFunctionWithOp(Function &F, dxil::OpCode DXILOp) {
+ [[nodiscard]] bool replaceFunctionWithOp(Function &F, dxil::OpCode DXILOp,
+ ArrayRef<Value *> ExtraArgs) {
bool IsVectorArgExpansion = isVectorArgExpansion(F);
return replaceFunction(F, [&](CallInst *CI) -> Error {
- SmallVector<Value *> Args;
- OpBuilder.getIRB().SetInsertPoint(CI);
+ SmallVector<Value *> NewArgs;
if (IsVectorArgExpansion) {
- SmallVector<Value *> NewArgs = argVectorFlatten(CI, OpBuilder.getIRB());
- Args.append(NewArgs.begin(), NewArgs.end());
+ NewArgs = argVectorFlatten(CI, OpBuilder.getIRB());
} else
- Args.append(CI->arg_begin(), CI->arg_end());
+ NewArgs.append(CI->arg_begin(), CI->arg_end());
- Expected<CallInst *> OpCall =
- OpBuilder.tryCreateOp(DXILOp, Args, CI->getName(), F.getReturnType());
+ NewArgs.append(ExtraArgs.begin(), ExtraArgs.end());
+
+ OpBuilder.getIRB().SetInsertPoint(CI);
+ Expected<CallInst *> OpCall = OpBuilder.tryCreateOp(
+ DXILOp, NewArgs, CI->getName(), F.getReturnType());
if (Error E = OpCall.takeError())
return E;
@@ -472,9 +473,9 @@ class OpLowerer {
switch (ID) {
default:
continue;
-#define DXIL_OP_INTRINSIC(OpCode, Intrin) \
- case Intrin: \
- HasErrors |= replaceFunctionWithOp(F, OpCode); \
+#define DXIL_OP_INTRINSIC(OpCode, Intrin, ExtraArgs) \
+ case Intrin: \
+ HasErrors |= replaceFunctionWithOp(F, OpCode, ExtraArgs); \
break;
#include "DXILOperation.inc"
case Intrinsic::dx_handle_fromBinding:
diff --git a/llvm/test/CodeGen/DirectX/group_memory_barrier_with_group_sync.ll b/llvm/test/CodeGen/DirectX/group_memory_barrier_with_group_sync.ll
index c43625755d6efc..cd588d464e302b 100644
--- a/llvm/test/CodeGen/DirectX/group_memory_barrier_with_group_sync.ll
+++ b/llvm/test/CodeGen/DirectX/group_memory_barrier_with_group_sync.ll
@@ -1,4 +1,4 @@
-; RUN: opt -S -dxil-intrinsic-expansion -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library < %s | FileCheck %s --check-prefix=CHECK
+; RUN: opt -S -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library < %s | FileCheck %s --check-prefix=CHECK
define void @test_group_memory_barrier_with_group_sync() {
entry:
diff --git a/llvm/utils/TableGen/DXILEmitter.cpp b/llvm/utils/TableGen/DXILEmitter.cpp
index 06bf7a0c0a8372..ffb5892975a7fc 100644
--- a/llvm/utils/TableGen/DXILEmitter.cpp
+++ b/llvm/utils/TableGen/DXILEmitter.cpp
@@ -33,6 +33,11 @@ using namespace llvm::dxil;
namespace {
+struct DXILIntrinsicSelect {
+ StringRef Intrinsic;
+ SmallVector<StringRef, 4> ExtraArgs;
+};
+
struct DXILOperationDesc {
std::string OpName; // name of DXIL operation
int OpCode; // ID of DXIL operation
@@ -43,8 +48,7 @@ struct DXILOperationDesc {
SmallVector<const Record *> OverloadRecs;
SmallVector<const Record *> StageRecs;
SmallVector<const Record *> AttrRecs;
- StringRef Intrinsic; // The llvm intrinsic map to OpName. Default is "" which
- // means no map exists
+ SmallVector<DXILIntrinsicSelect> IntrinsicSelects;
SmallVector<StringRef, 4>
ShaderStages; // shader stages to which this applies, empty for all.
int OverloadParamIndex; // Index of parameter with overload type.
@@ -158,14 +162,43 @@ DXILOperationDesc::DXILOperationDesc(const Record *R) {
OpName);
}
- const RecordVal *RV = R->getValue("LLVMIntrinsic");
- if (RV && RV->getValue()) {
- if (DefInit *DI = dyn_cast<DefInit>(RV->getValue())) {
- auto *IntrinsicDef = DI->getDef();
- auto DefName = IntrinsicDef->getName();
- assert(DefName.starts_with("int_") && "invalid intrinsic name");
- // Remove the int_ from intrinsic name.
- Intrinsic = DefName.substr(4);
+ auto GetIntrinsicName = [](const RecordVal *RV) -> StringRef {
+ if (RV && RV->getValue()) {
+ if (DefInit *DI = dyn_cast<DefInit>(RV->getValue())) {
+ auto *IntrinsicDef = DI->getDef();
+ auto DefName = IntrinsicDef->getName();
+ assert(DefName.starts_with("int_") && "invalid intrinsic name");
+ // Remove the int_ from intrinsic name.
+ return DefName.substr(4);
+ }
+ }
+ return "";
+ };
+
+ {
+ DXILIntrinsicSelect IntrSelect;
+ IntrSelect.Intrinsic = GetIntrinsicName(R->getValue("LLVMIntrinsic"));
+ if (IntrSelect.Intrinsic.size())
+ IntrinsicSelects.emplace_back(std::move(IntrSelect));
+ }
+
+ Recs = R->getValueAsListOfDefs("intrinsic_selects");
+ if (Recs.size()) {
+ if (IntrinsicSelects.size()) {
+ PrintFatalError(R,
+ Twine("LLVMIntrinsic and intrinsic_match cannot be both "
+ "defined for DXIL operation - ") +
+ OpName);
+ } else {
+ for (const Record *R : Recs) {
+ DXILIntrinsicSelect IntrSelect;
+ IntrSelect.Intrinsic = GetIntrinsicName(R->getValue("Intr"));
+ auto ExtraArgs = R->getValueAsListOfStrings("ExtraArgs");
+ for (StringRef Arg : ExtraArgs) {
+ IntrSelect.ExtraArgs.push_back(Arg);
+ }
+ IntrinsicSelects.emplace_back(std::move(IntrSelect));
+ }
}
}
}
@@ -378,10 +411,17 @@ static void emitDXILIntrinsicMap(ArrayRef<DXILOperationDesc> Ops,
OS << "#ifdef DXIL_OP_INTRINSIC\n";
OS << "\n";
for (const auto &Op : Ops) {
- if (Op.Intrinsic.empty())
+ if (Op.IntrinsicSelects.empty()) {
continue;
- OS << "DXIL_OP_INTRINSIC(dxil::OpCode::" << Op.OpName
- << ", Intrinsic::" << Op.Intrinsic << ")\n";
+ }
+ for (const DXILIntrinsicSelect &MappedIntr : Op.IntrinsicSelects) {
+ OS << "DXIL_OP_INTRINSIC(dxil::OpCode::" << Op.OpName
+ << ", Intrinsic::" << MappedIntr.Intrinsic << ", (ArrayRef<Value *> {";
+ for (const StringRef &Arg : MappedIntr.ExtraArgs) {
+ OS << Arg << ", ";
+ }
+ OS << "}))\n";
+ }
}
OS << "\n";
OS << "#undef DXIL_OP_INTRINSIC\n";
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