[llvm] [AMDGPU]: Add implicit-def to the BB prolog (PR #112872)

[Matt Arsenault via llvm-commits]

================
@@ -8918,6 +8918,7 @@ bool SIInstrInfo::isBasicBlockPrologue(const MachineInstr &MI,
   uint16_t Opcode = MI.getOpcode();
   return IsNullOrVectorRegister &&
          (isSGPRSpill(Opcode) || isWWMRegSpillOpcode(Opcode) ||
+          Opcode == AMDGPU::IMPLICIT_DEF ||
----------------
arsenm wrote:

Does this need to consider the register type? 

https://github.com/llvm/llvm-project/pull/112872