[llvm] [feature][riscv] handle target address calculation in llvm-objdump disassembly for riscv (PR #109914)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 14 15:55:25 PDT 2024
================
@@ -244,34 +254,43 @@ class RISCVMCInstrAnalysis : public MCInstrAnalysis {
case RISCV::ADDI:
case RISCV::ADDIW: {
if (auto TargetRegState = getGPRState(Inst.getOperand(1).getReg())) {
- Target = *TargetRegState + Inst.getOperand(2).getImm();
+ // TODO: Figure out ways to find the actual value of XLEN during analysis
+ int XLEN = 32;
+ uint64_t mask = ~(0) >> XLEN;
+ Target = *TargetRegState + SignExtend64<12>(Inst.getOperand(2).getImm());
+ Target &= mask;
+ Target = SignExtend64<32>(Target);
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topperc wrote:
This SignExtend shouldn't happen for ADDI. Only ADDIW. They are different instructions and have different behavior.
https://github.com/llvm/llvm-project/pull/109914
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