[llvm] AMDGPU/GlobalISel: Run redundant_and combine in RegBankCombiner (PR #112353)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Tue Oct 15 07:28:40 PDT 2024


================
@@ -2825,17 +2825,17 @@ void CombinerHelper::replaceSingleDefInstWithOperand(MachineInstr &MI,
   Register OldReg = MI.getOperand(0).getReg();
   Register Replacement = MI.getOperand(OpIdx).getReg();
   assert(canReplaceReg(OldReg, Replacement, MRI) && "Cannot replace register?");
-  MI.eraseFromParent();
   replaceRegWith(MRI, OldReg, Replacement);
+  MI.eraseFromParent();
 }
 
 void CombinerHelper::replaceSingleDefInstWithReg(MachineInstr &MI,
                                                  Register Replacement) {
   assert(MI.getNumExplicitDefs() == 1 && "Expected one explicit def?");
   Register OldReg = MI.getOperand(0).getReg();
   assert(canReplaceReg(OldReg, Replacement, MRI) && "Cannot replace register?");
-  MI.eraseFromParent();
   replaceRegWith(MRI, OldReg, Replacement);
+  MI.eraseFromParent();
----------------
arsenm wrote:

Why is this necessary? Isn't it better to eliminate the old use to give the replacement less work? 

https://github.com/llvm/llvm-project/pull/112353


More information about the llvm-commits mailing list