[llvm] b7bc1d0 - [CodeGen] Fix return type of PHI_iterator::getIncomingValue. NFC.
Jay Foad via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 18 06:36:25 PDT 2024
Author: Jay Foad
Date: 2024-10-18T14:33:45+01:00
New Revision: b7bc1d07d3e1b2d6db102d881f8ad1083797f319
URL: https://github.com/llvm/llvm-project/commit/b7bc1d07d3e1b2d6db102d881f8ad1083797f319
DIFF: https://github.com/llvm/llvm-project/commit/b7bc1d07d3e1b2d6db102d881f8ad1083797f319.diff
LOG: [CodeGen] Fix return type of PHI_iterator::getIncomingValue. NFC.
This is supposed to match ValT aka Register.
Added:
Modified:
llvm/lib/CodeGen/MachineSSAUpdater.cpp
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/MachineSSAUpdater.cpp b/llvm/lib/CodeGen/MachineSSAUpdater.cpp
index 4cbb6ad3128bd9..c7a673b12d8c50 100644
--- a/llvm/lib/CodeGen/MachineSSAUpdater.cpp
+++ b/llvm/lib/CodeGen/MachineSSAUpdater.cpp
@@ -286,7 +286,7 @@ class SSAUpdaterTraits<MachineSSAUpdater> {
bool operator==(const PHI_iterator& x) const { return idx == x.idx; }
bool operator!=(const PHI_iterator& x) const { return !operator==(x); }
- unsigned getIncomingValue() { return PHI->getOperand(idx).getReg(); }
+ Register getIncomingValue() { return PHI->getOperand(idx).getReg(); }
MachineBasicBlock *getIncomingBlock() {
return PHI->getOperand(idx+1).getMBB();
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