[llvm] 23d4fe6 - [RISCV] Fix gcc -Wparentheses warning [NFC]

[Mikael Holmen via llvm-commits]

Author: Mikael Holmen
Date: 2024-10-17T08:00:31+02:00
New Revision: 23d4fe6c5c52e054bbed75e78104f59869337356

URL: https://github.com/llvm/llvm-project/commit/23d4fe6c5c52e054bbed75e78104f59869337356
DIFF: https://github.com/llvm/llvm-project/commit/23d4fe6c5c52e054bbed75e78104f59869337356.diff

LOG: [RISCV] Fix gcc -Wparentheses warning [NFC]

Without this gcc warned like
 ../lib/Target/RISCV/RISCVVLOptimizer.cpp:760: warning: suggest parentheses around '&&' within '||' [-Wparentheses]
   760 |            VLOp.getReg() != RISCV::X0 && "Did not expect X0 VL");
       |

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp b/llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
index ee494c46815112..2141a6ed1ed758 100644
--- a/llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
+++ b/llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
@@ -756,8 +756,8 @@ bool RISCVVLOptimizer::checkUsers(const MachineOperand *&CommonVL,
     const MachineOperand &VLOp = UserMI.getOperand(VLOpNum);
 
     // Looking for an immediate or a register VL that isn't X0.
-    assert(!VLOp.isReg() ||
-           VLOp.getReg() != RISCV::X0 && "Did not expect X0 VL");
+    assert((!VLOp.isReg() || VLOp.getReg() != RISCV::X0) &&
+           "Did not expect X0 VL");
 
     if (!CommonVL) {
       CommonVL = &VLOp;