[llvm] [RISCV][VLOPT] Allow propagation even when VL isn't VLMAX (PR #112228)

[Luke Lau via llvm-commits]

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@@ -31,6 +31,55 @@ using namespace llvm;
 
 namespace {
 
+struct VLInfo {
+  std::variant<Register, int64_t> VL;
+
+  VLInfo(const MachineOperand &VLOp) {
+    if (VLOp.isImm())
+      VL = VLOp.getImm();
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lukel97 wrote:

I think a Register can be constructed via an int64_t, is std::variant definitely storing the right type here?

https://github.com/llvm/llvm-project/pull/112228