[llvm] [RISCV][VCIX] Add a tied constraint between rd and rs3 in sf.v.xvv and sf.v.xvw instructions (PR #111630)

Michal Terepeta via llvm-commits llvm-commits at lists.llvm.org
Mon Oct 14 00:12:09 PDT 2024

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michalt wrote:

Nice, thanks! 😄 

https://github.com/llvm/llvm-project/pull/111630

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