[llvm] [AArch64] Improve index selection for histograms (PR #111150)

Benjamin Maxwell via llvm-commits llvm-commits at lists.llvm.org
Wed Oct 16 09:15:21 PDT 2024


================
@@ -2991,15 +2991,15 @@ class MaskedScatterSDNode : public MaskedGatherScatterSDNode {
   }
 };
 
-class MaskedHistogramSDNode : public MemSDNode {
+class MaskedHistogramSDNode : public MaskedGatherScatterSDNode {
 public:
   friend class SelectionDAG;
 
   MaskedHistogramSDNode(unsigned Order, const DebugLoc &DL, SDVTList VTs,
                         EVT MemVT, MachineMemOperand *MMO,
                         ISD::MemIndexType IndexType)
-      : MemSDNode(ISD::EXPERIMENTAL_VECTOR_HISTOGRAM, Order, DL, VTs, MemVT,
-                  MMO) {
+      : MaskedGatherScatterSDNode(ISD::EXPERIMENTAL_VECTOR_HISTOGRAM, Order, DL,
+                                  VTs, MemVT, MMO, IndexType) {
     LSBaseSDNodeBits.AddressingMode = IndexType;
----------------
MacDue wrote:

Remove the `LSBaseSDNodeBits.AddressingMode = IndexType;` (it's already one in the `MaskedHistogramSDNode` ctor)

https://github.com/llvm/llvm-project/pull/111150


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