[llvm] [AMDGPU] Implement hasAndNot for scalar bitwise AND-NOT operations. (PR #112647)

[Matt Arsenault via llvm-commits]

https://github.com/arsenm commented:

Needs tests (most of the effort on this patch is adding the requisite tests).

We need coverage with all the combinations of SGPR / VGPR inputs in i1 / i8 / i16 / i32 / i64 for the basic and-not pattern.

Additionally we need some tests for the optimizations enabled by this hook. https://github.com/llvm/llvm-project/blob/1b4a173fa41e02eddec9f1cf41324aa4ea8a7fa5/llvm/test/CodeGen/AMDGPU/xor3.ll#L27 is one example.

Use arguments with inreg to get sample SGPR inputs, otherwise VGPR 


https://github.com/llvm/llvm-project/pull/112647