[llvm] [MIR] Fix vreg flag vector memory leak (PR #112479)

Akshat Oke via llvm-commits llvm-commits at lists.llvm.org
Wed Oct 16 01:56:05 PDT 2024


https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/112479

>From c1690d0c48792980f36ff3d08383f86842ef2bd4 Mon Sep 17 00:00:00 2001
From: Akshat Oke <Akshat.Oke at amd.com>
Date: Tue, 15 Oct 2024 16:49:32 +0000
Subject: [PATCH 1/4] [MIR] Fix vreg flag vector memory leak

SmallVector allocates on stack so that works out here.
---
 llvm/include/llvm/CodeGen/MIRParser/MIParser.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/include/llvm/CodeGen/MIRParser/MIParser.h b/llvm/include/llvm/CodeGen/MIRParser/MIParser.h
index 4d93213de5e070..ea4ba488c9295b 100644
--- a/llvm/include/llvm/CodeGen/MIRParser/MIParser.h
+++ b/llvm/include/llvm/CodeGen/MIRParser/MIParser.h
@@ -45,7 +45,7 @@ struct VRegInfo {
   } D;
   Register VReg;
   Register PreferredReg;
-  std::vector<uint8_t> Flags;
+  SmallVector<uint8_t> Flags;
 };
 
 using Name2RegClassMap = StringMap<const TargetRegisterClass *>;

>From 7d8bf5125a2e1d69f18b04cddd085093f0038c23 Mon Sep 17 00:00:00 2001
From: Akshat Oke <Akshat.Oke at amd.com>
Date: Wed, 16 Oct 2024 06:57:34 +0000
Subject: [PATCH 2/4] Change to bit field

---
 llvm/include/llvm/CodeGen/MIRParser/MIParser.h | 2 +-
 llvm/lib/CodeGen/MIRParser/MIRParser.cpp       | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/llvm/include/llvm/CodeGen/MIRParser/MIParser.h b/llvm/include/llvm/CodeGen/MIRParser/MIParser.h
index ea4ba488c9295b..0f2898d3554d06 100644
--- a/llvm/include/llvm/CodeGen/MIRParser/MIParser.h
+++ b/llvm/include/llvm/CodeGen/MIRParser/MIParser.h
@@ -45,7 +45,7 @@ struct VRegInfo {
   } D;
   Register VReg;
   Register PreferredReg;
-  SmallVector<uint8_t> Flags;
+  uint8_t Flags = 0;
 };
 
 using Name2RegClassMap = StringMap<const TargetRegisterClass *>;
diff --git a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
index 10d3cdcf0c1ce1..c0c61b3fdd1677 100644
--- a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
@@ -703,7 +703,7 @@ bool MIRParserImpl::parseRegisterInfo(PerFunctionMIParsingState &PFS,
         return error(FlagStringValue.SourceRange.Start,
                      Twine("use of undefined register flag '") +
                          FlagStringValue.Value + "'");
-      Info.Flags.push_back(FlagValue);
+      Info.Flags |= FlagValue;
     }
     RegInfo.noteNewVirtualRegister(Info.VReg);
   }

>From f4f550cd7d200a079b99dad451ccddbf47638008 Mon Sep 17 00:00:00 2001
From: Akshat Oke <Akshat.Oke at amd.com>
Date: Wed, 16 Oct 2024 08:13:48 +0000
Subject: [PATCH 3/4] Error on setting flag again

---
 llvm/lib/CodeGen/MIRParser/MIRParser.cpp | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
index c0c61b3fdd1677..ca1cce9498b853 100644
--- a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
@@ -703,6 +703,11 @@ bool MIRParserImpl::parseRegisterInfo(PerFunctionMIParsingState &PFS,
         return error(FlagStringValue.SourceRange.Start,
                      Twine("use of undefined register flag '") +
                          FlagStringValue.Value + "'");
+      if (Info.Flags & FlagValue)
+        return error(FlagStringValue.SourceRange.Start,
+                     Twine("flag '") + FlagStringValue.Value +
+                         "' was already set for virtual register '%" +
+                         Twine(VReg.ID.Value) + "'");
       Info.Flags |= FlagValue;
     }
     RegInfo.noteNewVirtualRegister(Info.VReg);

>From 4edbcec7c49afb06954a682ecf852558c21ca349 Mon Sep 17 00:00:00 2001
From: Akshat Oke <Akshat.Oke at amd.com>
Date: Wed, 16 Oct 2024 08:55:00 +0000
Subject: [PATCH 4/4] Revert "Error on setting flag again"

This reverts commit f4f550cd7d200a079b99dad451ccddbf47638008.
---
 llvm/lib/CodeGen/MIRParser/MIRParser.cpp | 5 -----
 1 file changed, 5 deletions(-)

diff --git a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
index ca1cce9498b853..c0c61b3fdd1677 100644
--- a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
@@ -703,11 +703,6 @@ bool MIRParserImpl::parseRegisterInfo(PerFunctionMIParsingState &PFS,
         return error(FlagStringValue.SourceRange.Start,
                      Twine("use of undefined register flag '") +
                          FlagStringValue.Value + "'");
-      if (Info.Flags & FlagValue)
-        return error(FlagStringValue.SourceRange.Start,
-                     Twine("flag '") + FlagStringValue.Value +
-                         "' was already set for virtual register '%" +
-                         Twine(VReg.ID.Value) + "'");
       Info.Flags |= FlagValue;
     }
     RegInfo.noteNewVirtualRegister(Info.VReg);



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