[llvm] [RISCV][VLOPT] Add support for widening integer mul-add instructions (PR #112219)

[Craig Topper via llvm-commits]

================
@@ -419,18 +431,7 @@ static OperandInfo getOperandInfo(const MachineInstr &MI,
   case RISCV::VWADD_WV:
   case RISCV::VWADD_WX:
   case RISCV::VWSUB_WV:
-  case RISCV::VWSUB_WX:
-  // Vector Widening Integer Multiply-Add Instructions
-  // Destination EEW=2*SEW and EMUL=2*LMUL. Source EEW=SEW and EMUL=LMUL.
-  // Even though the add is a 2*SEW addition, the operands of the add are the
-  // Dest which is 2*SEW and the result of the multiply which is 2*SEW.
-  case RISCV::VWMACCU_VV:
-  case RISCV::VWMACCU_VX:
-  case RISCV::VWMACC_VV:
-  case RISCV::VWMACC_VX:
-  case RISCV::VWMACCSU_VV:
-  case RISCV::VWMACCSU_VX:
-  case RISCV::VWMACCUS_VX: {
+  case RISCV::VWSUB_WX: {
     bool IsOp1 = HasPassthru ? MO.getOperandNo() == 2 : MO.getOperandNo() == 1;
----------------
topperc wrote:

I think the HasPassThru here needs to be reviewed as a separate issue. These instructions always have a passthru now, but there's a TIED pseudo that also groups the passthru and one of the arithmetic sources together to improve regalloc. This code was probably written for that case in our downtream before non-TU and TU pseudos were merged.

https://github.com/llvm/llvm-project/pull/112219