[llvm] [MIR] Fix tests for flags in register info (PR #112179)
via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 14 03:16:52 PDT 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-powerpc
Author: Akshat Oke (optimisan)
<details>
<summary>Changes</summary>
[MIR] Serialize virtual register flags #<!-- -->110228 introduces register flags which appear empty in .mir dumps. Future tests should use `-simplify-mir`.
---
Patch is 53.48 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/112179.diff
9 Files Affected:
- (modified) llvm/test/CodeGen/AArch64/GlobalISel/arm64-regbankselect.mir (+45-45)
- (modified) llvm/test/CodeGen/AArch64/GlobalISel/call-translator.ll (+1-1)
- (modified) llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-dbg-value.mir (+1-1)
- (modified) llvm/test/CodeGen/AArch64/GlobalISel/select-intrinsic-aarch64-hint.mir (+1-1)
- (modified) llvm/test/CodeGen/AArch64/GlobalISel/select-static.mir (+27-27)
- (modified) llvm/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir (+164-164)
- (modified) llvm/test/CodeGen/ARM/peephole-callee-save-regalloc.mir (+1-1)
- (modified) llvm/test/CodeGen/MIR/AArch64/register-operand-bank.mir (+2-2)
- (modified) llvm/test/CodeGen/PowerPC/aix-p8vector-liveins.ll (+36-36)
``````````diff
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-regbankselect.mir b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-regbankselect.mir
index cec8d9ea5ba9de..a29a46bd43e496 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-regbankselect.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-regbankselect.mir
@@ -216,11 +216,11 @@ name: phiPropagation
legalized: true
tracksRegLiveness: true
# CHECK: registers:
-# CHECK-NEXT: - { id: 0, class: gpr32, preferred-register: '' }
-# CHECK-NEXT: - { id: 1, class: gpr64sp, preferred-register: '' }
-# CHECK-NEXT: - { id: 2, class: gpr32, preferred-register: '' }
-# CHECK-NEXT: - { id: 3, class: gpr, preferred-register: '' }
-# CHECK-NEXT: - { id: 4, class: gpr, preferred-register: '' }
+# CHECK-NEXT: - { id: 0, class: gpr32, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 1, class: gpr64sp, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 2, class: gpr32, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 3, class: gpr, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 4, class: gpr, preferred-register: '', flags: [ ] }
registers:
- { id: 0, class: gpr32 }
- { id: 1, class: gpr64sp }
@@ -359,8 +359,8 @@ body: |
name: ignoreTargetSpecificInst
legalized: true
# CHECK: registers:
-# CHECK-NEXT: - { id: 0, class: gpr64, preferred-register: '' }
-# CHECK-NEXT: - { id: 1, class: gpr64, preferred-register: '' }
+# CHECK-NEXT: - { id: 0, class: gpr64, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 1, class: gpr64, preferred-register: '', flags: [ ] }
registers:
- { id: 0, class: gpr64 }
- { id: 1, class: gpr64 }
@@ -397,9 +397,9 @@ name: bitcast_s32_gpr
legalized: true
# CHECK: registers:
-# CHECK-NEXT: - { id: 0, class: gpr, preferred-register: '' }
-# FAST-NEXT: - { id: 1, class: fpr, preferred-register: '' }
-# GREEDY-NEXT: - { id: 1, class: gpr, preferred-register: '' }
+# CHECK-NEXT: - { id: 0, class: gpr, preferred-register: '', flags: [ ] }
+# FAST-NEXT: - { id: 1, class: fpr, preferred-register: '', flags: [ ] }
+# GREEDY-NEXT: - { id: 1, class: gpr, preferred-register: '', flags: [ ] }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
@@ -423,9 +423,9 @@ name: bitcast_s32_fpr
legalized: true
# CHECK: registers:
-# CHECK-NEXT: - { id: 0, class: fpr, preferred-register: '' }
-# FAST-NEXT: - { id: 1, class: gpr, preferred-register: '' }
-# GREEDY-NEXT: - { id: 1, class: fpr, preferred-register: '' }
+# CHECK-NEXT: - { id: 0, class: fpr, preferred-register: '', flags: [ ] }
+# FAST-NEXT: - { id: 1, class: gpr, preferred-register: '', flags: [ ] }
+# GREEDY-NEXT: - { id: 1, class: fpr, preferred-register: '', flags: [ ] }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
@@ -448,9 +448,9 @@ name: bitcast_s32_gpr_fpr
legalized: true
# CHECK: registers:
-# CHECK-NEXT: - { id: 0, class: gpr, preferred-register: '' }
-# FAST-NEXT: - { id: 1, class: fpr, preferred-register: '' }
-# GREEDY-NEXT: - { id: 1, class: gpr, preferred-register: '' }
+# CHECK-NEXT: - { id: 0, class: gpr, preferred-register: '', flags: [ ] }
+# FAST-NEXT: - { id: 1, class: fpr, preferred-register: '', flags: [ ] }
+# GREEDY-NEXT: - { id: 1, class: gpr, preferred-register: '', flags: [ ] }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
@@ -632,8 +632,8 @@ registers:
- { id: 0, class: fpr128}
- { id: 1, class: _}
# CHECK: registers:
-# CHECK: - { id: 0, class: fpr128, preferred-register: '' }
-# CHECK: - { id: 1, class: fpr, preferred-register: '' }
+# CHECK: - { id: 0, class: fpr128, preferred-register: '', flags: [ ] }
+# CHECK: - { id: 1, class: fpr, preferred-register: '', flags: [ ] }
# CHECK: %1:fpr(s128) = COPY %0
body: |
bb.1:
@@ -659,8 +659,8 @@ registers:
- { id: 0, class: _}
- { id: 1, class: _}
# CHECK: registers:
-# CHECK: - { id: 0, class: gpr, preferred-register: '' }
-# CHECK: - { id: 1, class: gpr, preferred-register: '' }
+# CHECK: - { id: 0, class: gpr, preferred-register: '', flags: [ ] }
+# CHECK: - { id: 1, class: gpr, preferred-register: '', flags: [ ] }
# CHECK: %0:gpr(s32) = COPY $w0
# CHECK-NEXT: %1:gpr(s16) = G_TRUNC %0(s32)
body: |
@@ -723,11 +723,11 @@ name: floatingPointLoad
legalized: true
# CHECK: registers:
-# CHECK-NEXT: - { id: 0, class: gpr, preferred-register: '' }
-# CHECK-NEXT: - { id: 1, class: gpr, preferred-register: '' }
-# CHECK-NEXT: - { id: 2, class: fpr, preferred-register: '' }
-# CHECK-NEXT: - { id: 3, class: fpr, preferred-register: '' }
-# CHECK-NEXT: - { id: 4, class: fpr, preferred-register: '' }
+# CHECK-NEXT: - { id: 0, class: gpr, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 1, class: gpr, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 2, class: fpr, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 3, class: fpr, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 4, class: fpr, preferred-register: '', flags: [ ] }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
@@ -765,11 +765,11 @@ name: floatingPointStore
legalized: true
# CHECK: registers:
-# CHECK-NEXT: - { id: 0, class: gpr, preferred-register: '' }
-# CHECK-NEXT: - { id: 1, class: gpr, preferred-register: '' }
-# CHECK-NEXT: - { id: 2, class: fpr, preferred-register: '' }
-# CHECK-NEXT: - { id: 3, class: fpr, preferred-register: '' }
-# CHECK-NEXT: - { id: 4, class: fpr, preferred-register: '' }
+# CHECK-NEXT: - { id: 0, class: gpr, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 1, class: gpr, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 2, class: fpr, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 3, class: fpr, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 4, class: fpr, preferred-register: '', flags: [ ] }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
@@ -803,10 +803,10 @@ name: fp16Ext32
alignment: 4
legalized: true
# CHECK: registers:
-# CHECK-NEXT: - { id: 0, class: gpr, preferred-register: '' }
-# CHECK-NEXT: - { id: 1, class: gpr, preferred-register: '' }
-# CHECK-NEXT: - { id: 2, class: fpr, preferred-register: '' }
-# CHECK-NEXT: - { id: 3, class: fpr, preferred-register: '' }
+# CHECK-NEXT: - { id: 0, class: gpr, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 1, class: gpr, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 2, class: fpr, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 3, class: fpr, preferred-register: '', flags: [ ] }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
@@ -838,10 +838,10 @@ name: fp16Ext64
alignment: 4
legalized: true
# CHECK: registers:
-# CHECK-NEXT: - { id: 0, class: gpr, preferred-register: '' }
-# CHECK-NEXT: - { id: 1, class: gpr, preferred-register: '' }
-# CHECK-NEXT: - { id: 2, class: fpr, preferred-register: '' }
-# CHECK-NEXT: - { id: 3, class: fpr, preferred-register: '' }
+# CHECK-NEXT: - { id: 0, class: gpr, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 1, class: gpr, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 2, class: fpr, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 3, class: fpr, preferred-register: '', flags: [ ] }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
@@ -873,9 +873,9 @@ name: fp32Ext64
alignment: 4
legalized: true
# CHECK: registers:
-# CHECK-NEXT: - { id: 0, class: gpr, preferred-register: '' }
-# CHECK-NEXT: - { id: 1, class: fpr, preferred-register: '' }
-# CHECK-NEXT: - { id: 2, class: fpr, preferred-register: '' }
+# CHECK-NEXT: - { id: 0, class: gpr, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 1, class: fpr, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 2, class: fpr, preferred-register: '', flags: [ ] }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
@@ -900,7 +900,7 @@ body: |
# Make sure we map FP16 ABI on FPR register bank.
# CHECK-LABEL: name: passFp16
# CHECK: registers:
-# CHECK: - { id: 0, class: fpr, preferred-register: '' }
+# CHECK: - { id: 0, class: fpr, preferred-register: '', flags: [ ] }
# CHECK: %0:fpr(s16) = COPY $h0
# CHECK-NEXT: $h0 = COPY %0(s16)
name: passFp16
@@ -922,9 +922,9 @@ body: |
# In that example, the copy comes from an ABI lowering of a fp type.
# CHECK-LABEL: name: passFp16ViaAllocas
# CHECK: registers:
-# CHECK: - { id: 0, class: fpr, preferred-register: '' }
-# CHECK: - { id: 1, class: gpr, preferred-register: '' }
-# CHECK: - { id: 2, class: fpr, preferred-register: '' }
+# CHECK: - { id: 0, class: fpr, preferred-register: '', flags: [ ] }
+# CHECK: - { id: 1, class: gpr, preferred-register: '', flags: [ ] }
+# CHECK: - { id: 2, class: fpr, preferred-register: '', flags: [ ] }
#
# CHECK: %0:fpr(s16) = COPY $h0
# CHECK-NEXT: %1:gpr(p0) = G_FRAME_INDEX %stack.0.p.addr
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/call-translator.ll b/llvm/test/CodeGen/AArch64/GlobalISel/call-translator.ll
index b1bfe46f4b454c..ca8f5de381e13c 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/call-translator.ll
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/call-translator.ll
@@ -35,7 +35,7 @@ define void @test_simple_arg(i32 %in) {
; CHECK-LABEL: name: test_indirect_call
; CHECK: registers:
; Make sure the register feeding the indirect call is properly constrained.
-; CHECK: - { id: [[FUNC:[0-9]+]], class: gpr64, preferred-register: '' }
+; CHECK: - { id: [[FUNC:[0-9]+]], class: gpr64, preferred-register: '', flags: [ ] }
; CHECK: %[[FUNC]]:gpr64(p0) = COPY $x0
; CHECK: BLR %[[FUNC]](p0), csr_aarch64_aapcs, implicit-def $lr, implicit $sp
; CHECK: RET_ReallyLR
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-dbg-value.mir b/llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-dbg-value.mir
index c64e2f78ab3bfc..daf7d49797d5c8 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-dbg-value.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-dbg-value.mir
@@ -31,7 +31,7 @@
name: test_dbg_value
legalized: true
# CHECK: registers:
-# CHECK-NEXT: - { id: 0, class: gpr, preferred-register: '' }
+# CHECK-NEXT: - { id: 0, class: gpr, preferred-register: '', flags: [ ] }
body: |
bb.0:
liveins: $w0
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/select-intrinsic-aarch64-hint.mir b/llvm/test/CodeGen/AArch64/GlobalISel/select-intrinsic-aarch64-hint.mir
index 231785355c8323..c63f99218f05ca 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/select-intrinsic-aarch64-hint.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/select-intrinsic-aarch64-hint.mir
@@ -14,7 +14,7 @@ legalized: true
regBankSelected: true
# CHECK: registers:
-# CHECK-NEXT: - { id: 0, class: gpr, preferred-register: '' }
+# CHECK-NEXT: - { id: 0, class: gpr, preferred-register: '', flags: [ ] }
registers:
- { id: 0, class: gpr }
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/select-static.mir b/llvm/test/CodeGen/AArch64/GlobalISel/select-static.mir
index 2d84e0415a6ccf..df13c02374fedd 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/select-static.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/select-static.mir
@@ -31,7 +31,7 @@ legalized: true
regBankSelected: true
# CHECK: registers:
-# CHECK-NEXT: - { id: 0, class: gpr64sp, preferred-register: '' }
+# CHECK-NEXT: - { id: 0, class: gpr64sp, preferred-register: '', flags: [ ] }
registers:
- { id: 0, class: gpr }
@@ -105,12 +105,12 @@ legalized: true
regBankSelected: true
# CHECK: registers:
-# CHECK-NEXT: - { id: 0, class: gpr32, preferred-register: '' }
-# CHECK-NEXT: - { id: 1, class: gpr32, preferred-register: '' }
-# CHECK-NEXT: - { id: 2, class: gpr64, preferred-register: '' }
-# CHECK-NEXT: - { id: 3, class: gpr32, preferred-register: '' }
-# CHECK-NEXT: - { id: 4, class: gpr64, preferred-register: '' }
-# CHECK-NEXT: - { id: 5, class: gpr32, preferred-register: '' }
+# CHECK-NEXT: - { id: 0, class: gpr32, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 1, class: gpr32, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 2, class: gpr64, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 3, class: gpr32, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 4, class: gpr64, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 5, class: gpr32, preferred-register: '', flags: [ ] }
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
@@ -159,12 +159,12 @@ legalized: true
regBankSelected: true
# CHECK: registers:
-# CHECK-NEXT: - { id: 0, class: fpr32, preferred-register: '' }
-# CHECK-NEXT: - { id: 1, class: gpr32, preferred-register: '' }
-# CHECK-NEXT: - { id: 2, class: fpr64, preferred-register: '' }
-# CHECK-NEXT: - { id: 3, class: gpr32, preferred-register: '' }
-# CHECK-NEXT: - { id: 4, class: gpr32, preferred-register: '' }
-# CHECK-NEXT: - { id: 5, class: gpr32, preferred-register: '' }
+# CHECK-NEXT: - { id: 0, class: fpr32, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 1, class: gpr32, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 2, class: fpr64, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 3, class: gpr32, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 4, class: gpr32, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 5, class: gpr32, preferred-register: '', flags: [ ] }
registers:
- { id: 0, class: fpr }
- { id: 1, class: gpr }
@@ -202,10 +202,10 @@ regBankSelected: true
tracksRegLiveness: true
# CHECK: registers:
-# CHECK-NEXT: - { id: 0, class: fpr32, preferred-register: '' }
-# CHECK-NEXT: - { id: 1, class: gpr, preferred-register: '' }
-# CHECK-NEXT: - { id: 2, class: fpr32, preferred-register: '' }
-# CHECK-NEXT: - { id: 3, class: gpr32, preferred-register: '' }
+# CHECK-NEXT: - { id: 0, class: fpr32, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 1, class: gpr, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 2, class: fpr32, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 3, class: gpr32, preferred-register: '', flags: [ ] }
registers:
- { id: 0, class: fpr }
- { id: 1, class: gpr }
@@ -240,16 +240,16 @@ regBankSelected: true
tracksRegLiveness: true
# CHECK: registers:
-# CHECK-NEXT: - { id: 0, class: gpr32, preferred-register: '' }
-# CHECK-NEXT: - { id: 1, class: gpr32, preferred-register: '' }
-# CHECK-NEXT: - { id: 2, class: gpr32, preferred-register: '' }
-# CHECK-NEXT: - { id: 3, class: gpr32, preferred-register: '' }
-# CHECK-NEXT: - { id: 4, class: gpr64, preferred-register: '' }
-# CHECK-NEXT: - { id: 5, class: gpr64, preferred-register: '' }
-# CHECK-NEXT: - { id: 6, class: gpr64, preferred-register: '' }
-# CHECK-NEXT: - { id: 7, class: gpr64, preferred-register: '' }
-# CHECK-NEXT: - { id: 8, class: gpr64, preferred-register: '' }
-# CHECK-NEXT: - { id: 9, class: gpr64, preferred-register: '' }
+# CHECK-NEXT: - { id: 0, class: gpr32, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 1, class: gpr32, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 2, class: gpr32, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 3, class: gpr32, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 4, class: gpr64, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 5, class: gpr64, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 6, class: gpr64, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 7, class: gpr64, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 8, class: gpr64, preferred-register: '', flags: [ ] }
+# CHECK-NEXT: - { id: 9, class: gpr64, preferred-register: '', flags: [ ] }
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
diff --git a/llvm/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir b/llvm/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir
index 44e17025032021..87d1785809b909 100644
--- a/llvm/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir
+++ b/llvm/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir
@@ -109,9 +109,9 @@ legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
-# CHECK: - { id: 0, class: gprb, preferred-register: '' }
-# CHECK: - { id: 1, class: gprb, preferred-register: '' }
-# CHECK: - { id: 2, class: gprb, preferred-register: '' }
+# CHECK: - { id: 0, class: gprb, preferred-register: '', flags: [ ] }
+# CHECK: - { id: 1, class: gprb, preferred-register: '', flags: [ ] }
+# CHECK: - { id: 2, class: gprb, preferred-register: '', flags: [ ] }
registers:
- { id: 0, class: _ }
@@ -135,9 +135,9 @@ legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
-# CHECK: - { id: 0, class: gprb, preferred-register: '' }
-# CHECK: - { id: 1, class: gprb, preferred-register: '' }
-# CHECK: - { id: 2, class: gprb, preferred-register: '' }
+# CHECK: - { id: 0, class: gprb, preferred-register: '', flags: [ ] }
+# CHECK: - { id: 1, class: gprb, preferred-register: '', flags: [ ] }
+# CHECK: - { id: 2, class: gprb, preferred-register: '', flags: [ ] }
registers:
- { id: 0, class: _ }
@@ -161,9 +161,9 @@ legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
-# CHECK: - { id: 0, class: gprb, preferred-register: '' }
-# CHECK: - { id: 1, class: gprb, preferred-register: '' }
-# CHECK: - { id: 2, class: gprb, preferred-register: '' }
+# CHECK: - { id: 0, class: gprb, preferred-register: '', flags: [ ] }
+# CHECK: - { id: 1, class: gprb, preferred-register: '', flags: [ ] }
+# CHECK: - { id: 2, class: gprb, preferred-register: '', flags: [ ] }
registers:
- { id: 0, class: _ }
@@ -187,9 +187,9 @@ legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
-# CHECK: - { id: 0, class: gprb, preferred-register: '' }
-# CHECK: - { id: 1, class: gprb, preferred-register: '' }
-# CHECK: - { id: 2, class: gprb, preferred-register: '' }
+# CHECK: - { id: 0, class: gprb, preferred-register: '', flags: [ ] }
+# CHECK: - { id: 1, class: gprb, preferred-register: '', flags: [ ] }
+# CHECK: - { id: 2, class: gprb, preferred-register: '', flags: [ ] }
registers:
- { id: 0, class: _ }
@@ -213,9 +213,9 @@ legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
-# CHECK: - { id: 0, class: gprb, preferred-register: '' }
-# CHECK: - { id: 1, class: gprb, preferred-register: '' }
-# CHECK: - { id: 2, class: gprb, preferred-register: '' }
+# CHECK: - { id: 0, class: gprb, preferred-register: '', flags: [ ] }
+# CHECK: - { id: 1, class: gprb, preferred-register: '', flags: [ ] }
+# CHECK: - { id: 2, class: gprb, preferred-register: '', flags: [ ] }
registers:
- { id: 0, class: _ }
@@ -239,9 +239,9 @@ legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
-# CHECK: - { id: 0, class: gprb, preferred-register: '' }
-# CHECK: - { id: 1, class: gprb, preferred-register: '' }
-# CHECK: - { id: 2, class: gprb, preferred-register: '' }
+# CHECK: - { id: 0, class: gprb, preferred-register: '', flags: [ ] }
+# CHECK: - { id: 1, class: gprb, preferred-register: '', flags: [ ] }
+# CHECK: - { id: 2, class: gprb, preferred-register: '', flags: [ ] }
registers:
- { id: 0, class: _ }
@@ -265,9 +265,9 @@ legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
-# CHECK: - { id: 0, class: gprb, preferred-register: '' }
-# CHECK: - { id: 1, class: gprb, preferred-register: '' }
-# CHECK: - { id: 2, class: gprb, preferred-register: '' }
+# CHECK: - { id: 0, class: gprb, preferred-register: '', flags: [ ] }
+# CHECK: - { id: 1, class: gprb, preferred-register: '', flags: [ ] }
+# CHECK: - { id: 2, class: gprb, preferred-register: '', flags: [ ] }
registers:
- { id: 0, class: _ }
@@ -291,9 +291,9 @@ legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
-#...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/112179
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