[llvm] [RISCV][VLOPT] Allow propagation even when VL isn't VLMAX (PR #112228)

[Luke Lau via llvm-commits]

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@@ -713,16 +740,17 @@ bool RISCVVLOptimizer::checkUsers(std::optional<Register> &CommonVL,
 
     unsigned VLOpNum = RISCVII::getVLOpNum(Desc);
     const MachineOperand &VLOp = UserMI.getOperand(VLOpNum);
-    // Looking for a register VL that isn't X0.
-    if (!VLOp.isReg() || VLOp.getReg() == RISCV::X0) {
+    // Looking for an immediate or a register VL that isn't X0.
+    if (VLOp.isReg() && VLOp.getReg() == RISCV::X0) {
       LLVM_DEBUG(dbgs() << "    Abort due to user uses X0 as VL.\n");
       CanReduceVL = false;
       break;
     }
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lukel97 wrote:

I remember trying to create a test case with x0 as the VL operand, but the machine verifier actually complained about it being a physical register in `RISCVInstrInfo::verifyInstruction`. Does it work if we turn this into an assert?

https://github.com/llvm/llvm-project/pull/112228