[llvm] [AMDGPU] Implement hasBitTest to Optimize Bit Testing Operations (PR #112652)

[Harrison Hao via llvm-commits]

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@@ -6043,3 +6043,24 @@ bool AMDGPUTargetLowering::isReassocProfitable(MachineRegisterInfo &MRI,
                                                Register N0, Register N1) const {
   return MRI.hasOneNonDBGUse(N0); // FIXME: handle regbanks
 }
+
+bool AMDGPUTargetLowering::hasBitTest(SDValue X, SDValue Y) const {
+  if (X->isDivergent() || Y->isDivergent())
+    return false;
+
+  EVT VT = X.getValueType();
+
+  if (VT != MVT::i32 && VT != MVT::i64)
+    return false;
+
+  auto *ConstantMaskNode = dyn_cast<ConstantSDNode>(Y);
+  if (!ConstantMaskNode)
+    return false;
+
+  APInt MaskValue = ConstantMaskNode->getAPIntValue();
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harrisonGPU wrote:

Okay, I have updated it.

https://github.com/llvm/llvm-project/pull/112652