[llvm] AMDGPU/GlobalISel: Add skeletons for new register bank select passes (PR #112862)

[Diana Picus via llvm-commits]

================
@@ -0,0 +1,74 @@
+//===-- AMDGPURBLegalize.cpp ----------------------------------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+/// Lower G_ instructions that can't be inst-selected with register bank
+/// assignment given by RB-select based on machine uniformity info.
+/// Given types on all operands, some register bank assignments require lowering
+/// while other do not.
----------------
rovka wrote:

```suggestion
/// while others do not.
```

https://github.com/llvm/llvm-project/pull/112862