[llvm] [TableGen] Added submulticlass typechecking to template arg values. (PR #112904)

[Jay Foad via llvm-commits]

jayfoad wrote:

I think there is something weirder going on here, at least in the AMDGPU case. Consider:
```
class c {
  int cc = 0;
}
class d {
  int dd = 0;
}
multiclass m {
  def NAME : d;
}
defm a : m, c; // works!!!
defm b : c, m; // fails with error: Couldn't find multiclass 'c'
```
Is it ever supposed to be valid to use `defm` with a _class_ name, like `c` in `defm a : m, c;` above? Because that's exactly what we're doing here: https://github.com/llvm/llvm-project/blob/dbe47c2a06e0928edde802d062ecf1a0ce45fbb9/llvm/lib/Target/AMDGPU/VOP2Instructions.td#L153
```
multiclass
    VOP2Inst_e32_VOPD<string opName, VOPProfile P, bits<5> VOPDOp,
                      string VOPDName, SDPatternOperator node = null_frag,
                      string revOp = opName> {
  defm NAME : VOP2Inst_e32<opName, P, node, revOp>,
              VOPD_Component<VOPDOp, VOPDName>;
}
```
where `VOPD_Component` is a class.

https://github.com/llvm/llvm-project/pull/112904