[llvm] 8f6d491 - [llvm][TableGen] Count implicit defs as well as explicit ones in the GlobalISel TableGen emitter (#112673)

[via llvm-commits]

Author: JL2210
Date: 2024-10-18T10:50:44+01:00
New Revision: 8f6d4913bbc4ad9ba9c139b8ce6dd69058435d17

URL: https://github.com/llvm/llvm-project/commit/8f6d4913bbc4ad9ba9c139b8ce6dd69058435d17
DIFF: https://github.com/llvm/llvm-project/commit/8f6d4913bbc4ad9ba9c139b8ce6dd69058435d17.diff

LOG: [llvm][TableGen] Count implicit defs as well as explicit ones in the GlobalISel TableGen emitter (#112673)

`NumDefs` only counts the number of registers in `(outs)`, not any
implicit defs specified with `Defs = [...]`

This causes patterns with physical register defs to fail to import here
instead of later where implicit defs are rendered.

Add on `ImplicitDefs.size()` to count both and create `DstExpDefs` to
count only explicit defs, used later on.

Added: 
    llvm/test/TableGen/GlobalISelEmitter-implicit-defs.td

Modified: 
    llvm/utils/TableGen/GlobalISelEmitter.cpp

Removed: 
    


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diff  --git a/llvm/test/TableGen/GlobalISelEmitter-implicit-defs.td b/llvm/test/TableGen/GlobalISelEmitter-implicit-defs.td
new file mode 100644
index 00000000000000..79af1a336f2890
--- /dev/null
+++ b/llvm/test/TableGen/GlobalISelEmitter-implicit-defs.td
@@ -0,0 +1,12 @@
+// RUN: llvm-tblgen -gen-global-isel -warn-on-skipped-patterns -I %p/../../include -I %p/Common %s -o /dev/null 2>&1 < %s | FileCheck %s --implicit-check-not="Skipped pattern"
+
+include "llvm/Target/Target.td"
+include "GlobalISelEmitterCommon.td"
+
+// CHECK: Skipped pattern: Pattern defines a physical register
+let Uses = [B0], Defs = [B0] in
+def tst1 : I<(outs), (ins), [(set B0, (add B0, 1))]>;
+
+// CHECK: Skipped pattern: Src pattern result has 1 def(s) without the HasNoUse predicate set to true but Dst MI has no def
+let Uses = [B0] in
+def tst2 : I<(outs), (ins), [(set B0, (add B0, 1))]>;

diff  --git a/llvm/utils/TableGen/GlobalISelEmitter.cpp b/llvm/utils/TableGen/GlobalISelEmitter.cpp
index c53f705a38db8f..29c64ba95ff856 100644
--- a/llvm/utils/TableGen/GlobalISelEmitter.cpp
+++ b/llvm/utils/TableGen/GlobalISelEmitter.cpp
@@ -2023,7 +2023,10 @@ Expected<RuleMatcher> GlobalISelEmitter::runOnPattern(const PatternToMatch &P) {
   auto &DstI = Target.getInstruction(DstOp);
   StringRef DstIName = DstI.TheDef->getName();
 
-  unsigned DstNumDefs = DstI.Operands.NumDefs,
+  // Count both implicit and explicit defs in the dst instruction.
+  // This avoids errors importing patterns that have inherent implicit defs.
+  unsigned DstExpDefs = DstI.Operands.NumDefs,
+           DstNumDefs = DstI.ImplicitDefs.size() + DstExpDefs,
            SrcNumDefs = Src.getExtTypes().size();
   if (DstNumDefs < SrcNumDefs) {
     if (DstNumDefs != 0)
@@ -2045,7 +2048,7 @@ Expected<RuleMatcher> GlobalISelEmitter::runOnPattern(const PatternToMatch &P) {
   // The root of the match also has constraints on the register bank so that it
   // matches the result instruction.
   unsigned OpIdx = 0;
-  unsigned N = std::min(DstNumDefs, SrcNumDefs);
+  unsigned N = std::min(DstExpDefs, SrcNumDefs);
   for (unsigned I = 0; I < N; ++I) {
     const TypeSetByHwMode &VTy = Src.getExtType(I);