[llvm] [AMDGPU] Factor out getNumUsedPhysRegs(). NFC. (PR #112624)
Stanislav Mekhanoshin via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 16 15:39:25 PDT 2024
https://github.com/rampitec updated https://github.com/llvm/llvm-project/pull/112624
>From 166199ff9f8dd273e030de0206ef09a510eb75d6 Mon Sep 17 00:00:00 2001
From: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: Wed, 16 Oct 2024 15:21:39 -0700
Subject: [PATCH 1/3] [AMDGPU] Factor out getNumUsedPhysRegs(). NFC.
I will need it from one more place.
---
.../AMDGPU/AMDGPUResourceUsageAnalysis.cpp | 42 ++-----------------
llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 8 ++++
llvm/lib/Target/AMDGPU/SIRegisterInfo.h | 5 +++
3 files changed, 17 insertions(+), 38 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.cpp b/llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.cpp
index 1ee3c40d69a3b3..9087442caf8d0b 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.cpp
@@ -146,44 +146,10 @@ AMDGPUResourceUsageAnalysis::analyzeResourceUsage(
// count easily.
// A tail call isn't considered a call for MachineFrameInfo's purposes.
if (!FrameInfo.hasCalls() && !FrameInfo.hasTailCall()) {
- MCPhysReg HighestVGPRReg = AMDGPU::NoRegister;
- for (MCPhysReg Reg : reverse(AMDGPU::VGPR_32RegClass.getRegisters())) {
- if (MRI.isPhysRegUsed(Reg)) {
- HighestVGPRReg = Reg;
- break;
- }
- }
-
- if (ST.hasMAIInsts()) {
- MCPhysReg HighestAGPRReg = AMDGPU::NoRegister;
- for (MCPhysReg Reg : reverse(AMDGPU::AGPR_32RegClass.getRegisters())) {
- if (MRI.isPhysRegUsed(Reg)) {
- HighestAGPRReg = Reg;
- break;
- }
- }
- Info.NumAGPR = HighestAGPRReg == AMDGPU::NoRegister
- ? 0
- : TRI.getHWRegIndex(HighestAGPRReg) + 1;
- }
-
- MCPhysReg HighestSGPRReg = AMDGPU::NoRegister;
- for (MCPhysReg Reg : reverse(AMDGPU::SGPR_32RegClass.getRegisters())) {
- if (MRI.isPhysRegUsed(Reg)) {
- HighestSGPRReg = Reg;
- break;
- }
- }
-
- // We found the maximum register index. They start at 0, so add one to get
- // the number of registers.
- Info.NumVGPR = HighestVGPRReg == AMDGPU::NoRegister
- ? 0
- : TRI.getHWRegIndex(HighestVGPRReg) + 1;
- Info.NumExplicitSGPR = HighestSGPRReg == AMDGPU::NoRegister
- ? 0
- : TRI.getHWRegIndex(HighestSGPRReg) + 1;
-
+ Info.NumVGPR = TRI.getNumUsedPhysRegs(MRI, AMDGPU::VGPR_32RegClass);
+ Info.NumExplicitSGPR = TRI.getNumUsedPhysRegs(MRI, AMDGPU::SGPR_32RegClass);
+ if (ST.hasMAIInsts())
+ Info.NumAGPR = TRI.getNumUsedPhysRegs(MRI, AMDGPU::AGPR_32RegClass);
return Info;
}
diff --git a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
index 20d48aa57adbdf..d1506a50238a62 100644
--- a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
@@ -3861,3 +3861,11 @@ SIRegisterInfo::getVRegFlagsOfReg(Register Reg,
RegFlags.push_back("WWM_REG");
return RegFlags;
}
+unsigned
+SIRegisterInfo::getNumUsedPhysRegs(const MachineRegisterInfo &MRI,
+ const TargetRegisterClass &RC) const {
+ for (MCPhysReg Reg : reverse(RC.getRegisters()))
+ if (MRI.isPhysRegUsed(Reg))
+ return getHWRegIndex(Reg) + 1;
+ return 0;
+}
diff --git a/llvm/lib/Target/AMDGPU/SIRegisterInfo.h b/llvm/lib/Target/AMDGPU/SIRegisterInfo.h
index fe0b66f75bbaa2..66ab3594d66c9c 100644
--- a/llvm/lib/Target/AMDGPU/SIRegisterInfo.h
+++ b/llvm/lib/Target/AMDGPU/SIRegisterInfo.h
@@ -465,6 +465,11 @@ class SIRegisterInfo final : public AMDGPUGenRegisterInfo {
SmallVector<StringLiteral>
getVRegFlagsOfReg(Register Reg, const MachineFunction &MF) const override;
+
+ // \returns a number of registers of a given \p RC used in a function.
+ // Does not go inside function calls.
+ unsigned getNumUsedPhysRegs(const MachineRegisterInfo &MRI,
+ const TargetRegisterClass &RC) const;
};
namespace AMDGPU {
>From 25aed86a160203ca3aed845d52dbc32a309fc073 Mon Sep 17 00:00:00 2001
From: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: Wed, 16 Oct 2024 15:34:53 -0700
Subject: [PATCH 2/3] Fix the merge
---
llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 10 ----------
llvm/lib/Target/AMDGPU/SIRegisterInfo.h | 3 ---
2 files changed, 13 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
index f6d3815fe15412..8de16974a3e79b 100644
--- a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
@@ -3852,16 +3852,6 @@ SIRegisterInfo::getSubRegAlignmentNumBits(const TargetRegisterClass *RC,
return 0;
}
-SmallVector<StringLiteral>
-SIRegisterInfo::getVRegFlagsOfReg(Register Reg,
- const MachineFunction &MF) const {
- SmallVector<StringLiteral> RegFlags;
- const SIMachineFunctionInfo *FuncInfo = MF.getInfo<SIMachineFunctionInfo>();
- if (FuncInfo->checkFlag(Reg, AMDGPU::VirtRegFlag::WWM_REG))
- RegFlags.push_back("WWM_REG");
- return RegFlags;
-}
-
unsigned
SIRegisterInfo::getNumUsedPhysRegs(const MachineRegisterInfo &MRI,
const TargetRegisterClass &RC) const {
diff --git a/llvm/lib/Target/AMDGPU/SIRegisterInfo.h b/llvm/lib/Target/AMDGPU/SIRegisterInfo.h
index 66ab3594d66c9c..3bd422534518be 100644
--- a/llvm/lib/Target/AMDGPU/SIRegisterInfo.h
+++ b/llvm/lib/Target/AMDGPU/SIRegisterInfo.h
@@ -463,9 +463,6 @@ class SIRegisterInfo final : public AMDGPUGenRegisterInfo {
: std::optional<uint8_t>{};
}
- SmallVector<StringLiteral>
- getVRegFlagsOfReg(Register Reg, const MachineFunction &MF) const override;
-
// \returns a number of registers of a given \p RC used in a function.
// Does not go inside function calls.
unsigned getNumUsedPhysRegs(const MachineRegisterInfo &MRI,
>From be307bee4e8c6c711b42a09b13b335a1d4239c8e Mon Sep 17 00:00:00 2001
From: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: Wed, 16 Oct 2024 15:38:54 -0700
Subject: [PATCH 3/3] Fix the merge
---
llvm/lib/Target/AMDGPU/SIRegisterInfo.h | 5 -----
1 file changed, 5 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/SIRegisterInfo.h b/llvm/lib/Target/AMDGPU/SIRegisterInfo.h
index 3bd422534518be..e12a41371c7fd7 100644
--- a/llvm/lib/Target/AMDGPU/SIRegisterInfo.h
+++ b/llvm/lib/Target/AMDGPU/SIRegisterInfo.h
@@ -458,11 +458,6 @@ class SIRegisterInfo final : public AMDGPUGenRegisterInfo {
unsigned getSubRegAlignmentNumBits(const TargetRegisterClass *RC,
unsigned SubReg) const;
- std::optional<uint8_t> getVRegFlagValue(StringRef Name) const override {
- return Name == "WWM_REG" ? AMDGPU::VirtRegFlag::WWM_REG
- : std::optional<uint8_t>{};
- }
-
// \returns a number of registers of a given \p RC used in a function.
// Does not go inside function calls.
unsigned getNumUsedPhysRegs(const MachineRegisterInfo &MRI,
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