[llvm] [RISCV] Allow crypto features to imply dependents (PR #112659)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 16 21:28:12 PDT 2024
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@@ -750,7 +751,8 @@ def HasStdExtZvbb : Predicate<"Subtarget->hasStdExtZvbb()">,
def FeatureStdExtZvbc
: RISCVExtension<"zvbc", 1, 0,
- "'Zvbc' (Vector Carryless Multiplication)">,
+ "'Zvbc' (Vector Carryless Multiplication)",
+ [FeatureStdExtZve64x]>,
RISCVExtensionBitmask<0, 49>;
def HasStdExtZvbc : Predicate<"Subtarget->hasStdExtZvbc()">,
AssemblerPredicate<(all_of FeatureStdExtZvbc),
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workingjubilee wrote:
Thank you!
https://github.com/llvm/llvm-project/pull/112659
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