[llvm] [AMDGPU] Implement hasAndNot for scalar bitwise AND-NOT operations. (PR #112647)

[Harrison Hao via llvm-commits]

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@@ -6822,6 +6822,81 @@ static unsigned getExtOpcodeForPromotedOp(SDValue Op) {
   }
 }
 
+SDValue SITargetLowering::combineAnd(SDValue Op,
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harrisonGPU wrote:

Okay, but I think hasAndNot can use And operation when meet this scenario: `(and LHS, (or Y, ~Z))` and X86 used this way, so I try to implement it. :)

https://github.com/llvm/llvm-project/pull/112647