[llvm] [InstCombine] Set `samesign` when converting signed predicates into unsigned (PR #112642)
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Thu Oct 17 03:11:42 PDT 2024
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@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt < %s -passes=instcombine -S | FileCheck %s
+; RUN: opt < %s -passes="instcombine<no-verify-fixpoint>" -S | FileCheck %s
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nikic wrote:
What's the issue here?
https://github.com/llvm/llvm-project/pull/112642
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