[llvm] [InstCombine] Set `samesign` when converting signed predicates into unsigned (PR #112642)
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Wed Oct 16 18:04:55 PDT 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-llvm-transforms
Author: Yingwei Zheng (dtcxzyw)
<details>
<summary>Changes</summary>
Alive2: https://alive2.llvm.org/ce/z/6cqdt-
---
Full diff: https://github.com/llvm/llvm-project/pull/112642.diff
5 Files Affected:
- (modified) llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp (+5-2)
- (modified) llvm/test/Transforms/InstCombine/call-guard.ll (+1-1)
- (modified) llvm/test/Transforms/InstCombine/icmp.ll (+1-1)
- (modified) llvm/test/Transforms/InstCombine/indexed-gep-compares.ll (+1-1)
- (modified) llvm/test/Transforms/InstCombine/phi-known-bits-operand-order.ll (+2-2)
``````````diff
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
index 18a6fdcec1728e..a9c88444ba2571 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
@@ -6774,8 +6774,11 @@ Instruction *InstCombinerImpl::foldICmpUsingKnownBits(ICmpInst &I) {
// have the same sign.
if (I.isSigned() &&
((Op0Known.Zero.isNegative() && Op1Known.Zero.isNegative()) ||
- (Op0Known.One.isNegative() && Op1Known.One.isNegative())))
- return new ICmpInst(I.getUnsignedPredicate(), Op0, Op1);
+ (Op0Known.One.isNegative() && Op1Known.One.isNegative()))) {
+ ICmpInst *NewICmp = new ICmpInst(I.getUnsignedPredicate(), Op0, Op1);
+ NewICmp->setSameSign();
+ return NewICmp;
+ }
return nullptr;
}
diff --git a/llvm/test/Transforms/InstCombine/call-guard.ll b/llvm/test/Transforms/InstCombine/call-guard.ll
index 6b31c78118d0b8..bc5f319e64f7fe 100644
--- a/llvm/test/Transforms/InstCombine/call-guard.ll
+++ b/llvm/test/Transforms/InstCombine/call-guard.ll
@@ -43,7 +43,7 @@ define void @test_guard_adjacent_diff_cond2(i32 %V1, i32 %V2) {
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[V1:%.*]], [[V2:%.*]]
; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP1]], 0
; CHECK-NEXT: [[AND:%.*]] = and i32 [[V1]], 255
-; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[AND]], 129
+; CHECK-NEXT: [[C:%.*]] = icmp samesign ult i32 [[AND]], 129
; CHECK-NEXT: [[TMP3:%.*]] = and i1 [[TMP2]], [[C]]
; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[TMP3]], i32 123) [ "deopt"() ]
; CHECK-NEXT: ret void
diff --git a/llvm/test/Transforms/InstCombine/icmp.ll b/llvm/test/Transforms/InstCombine/icmp.ll
index 7cafb4885ff0ee..e44f7002438cb9 100644
--- a/llvm/test/Transforms/InstCombine/icmp.ll
+++ b/llvm/test/Transforms/InstCombine/icmp.ll
@@ -1457,7 +1457,7 @@ define <2 x i1> @test67vecinverse(<2 x i32> %x) {
define i1 @test68(i32 %x) {
; CHECK-LABEL: @test68(
; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 127
-; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[AND]], 30
+; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ugt i32 [[AND]], 30
; CHECK-NEXT: ret i1 [[CMP]]
;
%and = and i32 %x, 127
diff --git a/llvm/test/Transforms/InstCombine/indexed-gep-compares.ll b/llvm/test/Transforms/InstCombine/indexed-gep-compares.ll
index 79511cf9e666ff..1110bbc5403e49 100644
--- a/llvm/test/Transforms/InstCombine/indexed-gep-compares.ll
+++ b/llvm/test/Transforms/InstCombine/indexed-gep-compares.ll
@@ -40,7 +40,7 @@ define ptr @test1_nuw(ptr %A, i32 %Offset) {
; CHECK: bb:
; CHECK-NEXT: [[RHS_IDX:%.*]] = phi i32 [ [[RHS_ADD:%.*]], [[BB]] ], [ [[TMP_IDX]], [[ENTRY:%.*]] ]
; CHECK-NEXT: [[RHS_ADD]] = add nuw nsw i32 [[RHS_IDX]], 4
-; CHECK-NEXT: [[COND:%.*]] = icmp ugt i32 [[RHS_IDX]], 400
+; CHECK-NEXT: [[COND:%.*]] = icmp samesign ugt i32 [[RHS_IDX]], 400
; CHECK-NEXT: br i1 [[COND]], label [[BB2:%.*]], label [[BB]]
; CHECK: bb2:
; CHECK-NEXT: [[RHS_PTR:%.*]] = getelementptr inbounds nuw i8, ptr [[A:%.*]], i32 [[RHS_IDX]]
diff --git a/llvm/test/Transforms/InstCombine/phi-known-bits-operand-order.ll b/llvm/test/Transforms/InstCombine/phi-known-bits-operand-order.ll
index 6a054688753500..9ff093635ad793 100644
--- a/llvm/test/Transforms/InstCombine/phi-known-bits-operand-order.ll
+++ b/llvm/test/Transforms/InstCombine/phi-known-bits-operand-order.ll
@@ -20,7 +20,7 @@ define void @phi_recurrence_start_first() {
; CHECK-NEXT: br i1 [[COND_V2]], label [[FOR_COND11:%.*]], label [[FOR_COND26]]
; CHECK: for.cond11:
; CHECK-NEXT: [[I_1:%.*]] = phi i32 [ [[START]], [[IF_THEN]] ], [ [[STEP:%.*]], [[FOR_COND11]] ]
-; CHECK-NEXT: [[CMP13:%.*]] = icmp ult i32 [[I_1]], 100
+; CHECK-NEXT: [[CMP13:%.*]] = icmp samesign ult i32 [[I_1]], 100
; CHECK-NEXT: [[STEP]] = add nuw nsw i32 [[I_1]], 1
; CHECK-NEXT: br i1 [[CMP13]], label [[FOR_COND11]], label [[WHILE_END]]
; CHECK: for.cond26:
@@ -68,7 +68,7 @@ define void @phi_recurrence_step_first() {
; CHECK-NEXT: br i1 [[COND_V2]], label [[FOR_COND11:%.*]], label [[FOR_COND26]]
; CHECK: for.cond11:
; CHECK-NEXT: [[I_1:%.*]] = phi i32 [ [[STEP:%.*]], [[FOR_COND11]] ], [ [[START]], [[IF_THEN]] ]
-; CHECK-NEXT: [[CMP13:%.*]] = icmp ult i32 [[I_1]], 100
+; CHECK-NEXT: [[CMP13:%.*]] = icmp samesign ult i32 [[I_1]], 100
; CHECK-NEXT: [[STEP]] = add nuw nsw i32 [[I_1]], 1
; CHECK-NEXT: br i1 [[CMP13]], label [[FOR_COND11]], label [[WHILE_END]]
; CHECK: for.cond26:
``````````
</details>
https://github.com/llvm/llvm-project/pull/112642
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