[llvm] [RISCV][VLOPT] Allow propagation even when VL isn't VLMAX (PR #112228)

[Luke Lau via llvm-commits]

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@@ -759,29 +787,45 @@ bool RISCVVLOptimizer::tryReduceVL(MachineInstr &OrigMI) {
     MachineInstr &MI = *Worklist.pop_back_val();
     LLVM_DEBUG(dbgs() << "Trying to reduce VL for " << MI << "\n");
 
-    std::optional<Register> CommonVL;
+    std::optional<const MachineOperand *> CommonVL;
     bool CanReduceVL = true;
     if (isVectorRegClass(MI.getOperand(0).getReg(), MRI))
       CanReduceVL = checkUsers(CommonVL, MI);
 
     if (!CanReduceVL || !CommonVL)
       continue;
 
-    if (!CommonVL->isVirtual()) {
-      LLVM_DEBUG(
-          dbgs() << "    Abort due to new VL is not virtual register.\n");
+    const MachineOperand *CommonVLMO = *CommonVL;
+    if (!CommonVLMO->isImm() && !CommonVLMO->getReg().isVirtual()) {
+      LLVM_DEBUG(dbgs() << "    Abort because common VL is not valid.\n");
       continue;
     }
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lukel97 wrote:

Does this also work if we turn it into an assert? Or do we ever end up with a physical register VL operand?

https://github.com/llvm/llvm-project/pull/112228