[llvm] AMDGPU/GlobalISel: Run redundant_and combine in RegBankCombiner (PR #112353)

[Petar Avramovic via llvm-commits]

================
@@ -178,7 +178,7 @@ void CombinerHelper::replaceRegWith(MachineRegisterInfo &MRI, Register FromReg,
   if (MRI.constrainRegAttrs(ToReg, FromReg))
     MRI.replaceRegWith(FromReg, ToReg);
   else
-    Builder.buildCopy(ToReg, FromReg);
----------------
petar-avramovic wrote:

Seems too broken for precommit.
To even get to buildCopy MI must not be deleted.
Then buildCopy(ToReg, FromReg) results in
*** Bad machine code: Reading virtual register without a def ***

Could test it just as -run-pass=amdgpu-regbank-combiner without -verify-machineinstrs but that leaves other tests broken since I have to add redundant_and.

When I try to run in other combiner there is an infinite loop on regclass to regbank copy:
```
Try combining %4:sgpr(s32) = COPY %3:sreg_32(s32)
10: GIM_SwitchOpcode(MIs[0], [20, 256), Default=6643, JumpTable...) // Got=20
955: Begin try-block
962: GIM_CheckSimplePredicate(Predicate=14)
965: GIR_DoneWithCustomAction(FnID=6)
Changing: G_STORE %4:sgpr(s32), %0:sgpr(p1) :: (store (s32), addrspace 1)
Creating: COPY
Creating: COPY
Changed: G_STORE %4:sgpr(s32), %0:sgpr(p1) :: (store (s32), addrspace 1)
Erasing: %4:sgpr(s32) = COPY %3:sreg_32(s32)
Created: %4:sgpr(s32) = COPY %3:sreg_32(s32)
```
Any suggestions?



https://github.com/llvm/llvm-project/pull/112353