[llvm] [AMDGPU] Implement hasAndNot for scalar bitwise AND-NOT operations. (PR #112647)

[Matt Arsenault via llvm-commits]

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@@ -6822,6 +6822,81 @@ static unsigned getExtOpcodeForPromotedOp(SDValue Op) {
   }
 }
 
+SDValue SITargetLowering::combineAnd(SDValue Op,
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arsenm wrote:

You should not be implementing any new combine in this patch. The point of this is to enable the existing optimizations. If it's worth adding something else, it would be a separate PR 

https://github.com/llvm/llvm-project/pull/112647