[llvm] [AMDGPU] Disable i16 -> i32 promotion in CGP for DAGISel (PR #112334)
Pierre van Houtryve via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 15 01:43:39 PDT 2024
================
@@ -590,28 +590,30 @@ define amdgpu_kernel void @s_test_imin_sle_v4i8(ptr addrspace(1) %out, [8 x i32]
; VI-LABEL: s_test_imin_sle_v4i8:
; VI: ; %bb.0:
; VI-NEXT: s_load_dword s2, s[6:7], 0x28
-; VI-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0
; VI-NEXT: s_load_dword s3, s[6:7], 0x4c
+; VI-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0
; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_ashr_i32 s4, s2, 24
-; VI-NEXT: s_bfe_i32 s5, s2, 0x80010
-; VI-NEXT: s_bfe_i32 s6, s2, 0x80008
-; VI-NEXT: s_sext_i32_i8 s2, s2
-; VI-NEXT: s_ashr_i32 s7, s3, 24
-; VI-NEXT: s_bfe_i32 s8, s3, 0x80010
-; VI-NEXT: s_bfe_i32 s9, s3, 0x80008
+; VI-NEXT: s_ashr_i32 s6, s3, 24
----------------
Pierre-vh wrote:
@arsenm There are quite a few regressions around smin/smax, mostly due to SIGN_EXTEND_INREG I believe.
I tried to fix some of them (see TODO in SIISelLowering) but I can't get all of them. Do you have any ideas I can try?
https://github.com/llvm/llvm-project/pull/112334
More information about the llvm-commits
mailing list