The Week Of Monday 9 September 2024 Archives by author

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Starting: Mon Sep 9 00:03:35 PDT 2024
Ending: Sun Sep 15 23:58:06 PDT 2024
Messages: 5825

• [libcxx] [llvm] [libc++] Remove `get_temporary_buffer`/`return_temporary_buffer` (PR #100914)   A. Jiang via llvm-commits
• [clang] [llvm] [Clang] restrict use of attribute names reserved by the C++ standard (PR #106036)   Aaron Ballman via llvm-commits
• [llvm] [Policy] Replace "code owners" with "maintainers" (PR #107384)   Aaron Ballman via llvm-commits
• [llvm] [Policy] Replace "code owners" with "maintainers" (PR #107384)   Aaron Ballman via llvm-commits
• [llvm] [Policy] Replace "code owners" with "maintainers" (PR #107384)   Aaron Ballman via llvm-commits
• [llvm] [RL78 patch 1] Recognize RL78 in triple parsing code. (PR #108395)   Aaron Ballman via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)   Aaron Ballman via llvm-commits
• [clang] [llvm] Prefer std::getenv to ::getenv (PR #108529)   Aaron Ballman via llvm-commits
• [clang] [llvm] Prefer std::getenv to ::getenv (PR #108529)   Aaron Ballman via llvm-commits
• [clang] [llvm] Prefer std::getenv to ::getenv (PR #108529)   Aaron Ballman via llvm-commits
• [llvm] [SystemZ][z/OS] Enable lit testing for z/OS (PR #107631)   Abhina Sree via llvm-commits
• [llvm] [SystemZ][z/OS] Enable lit testing for z/OS (PR #107631)   Abhina Sree via llvm-commits
• [llvm] [SystemZ][z/OS] Enable lit testing for z/OS (PR #107631)   Abhina Sree via llvm-commits
• [clang] [llvm] [SystemZ][z/OS] Update autoconversion functions to improve support for UTF-8 (PR #98652)   Abhina Sree via llvm-commits
• [clang] [clang-tools-extra] [llvm] [SystemZ][z/OS] Propagate IsText parameter to open text files as text (PR #107906)   Abhina Sree via llvm-commits
• [clang] [llvm] [SystemZ][z/OS] Update autoconversion functions to improve support for UTF-8 (PR #98652)   Abhina Sree via llvm-commits
• [clang] [clang-tools-extra] [llvm] [SystemZ][z/OS] Propagate IsText parameter to open text files as text (PR #107906)   Abhina Sree via llvm-commits
• [clang] [clang-tools-extra] [lldb] [llvm] [SystemZ][z/OS] Propagate IsText parameter to open text files as text (PR #107906)   Abhina Sree via llvm-commits
• [clang] [llvm] [SystemZ][z/OS] Update autoconversion functions to improve support for UTF-8 (PR #98652)   Abhina Sree via llvm-commits
• [llvm] [HEXAGON] AddrModeOpt support for HVX and optimize adds (PR #106368)   Abinaya Saravanan via llvm-commits
• [llvm] [HEXAGON] AddrModeOpt support for HVX and optimize adds (PR #106368)   Abinaya Saravanan via llvm-commits
• [llvm] [AMDGPU] Add MachineVerifier check to detect illegal copies from vector register to SGPR (PR #105494)   Aditi Medhane via llvm-commits
• [llvm] [AMDGPU] Autogenerate checks for phi-vgpr-input-moveimm.mir (PR #108372)   Aditi Medhane via llvm-commits
• [llvm] [AMDGPU] Autogenerate checks for phi-vgpr-input-moveimm.mir (PR #108372)   Aditi Medhane via llvm-commits
• [llvm] [AMDGPU] Autogenerate checks for phi-vgpr-input-moveimm.mir (PR #108372)   Aditi Medhane via llvm-commits
• [llvm] [AMDGPU] Precommit and Modify `phi_moveimm_subreg_input` testcase (PR #108389)   Aditi Medhane via llvm-commits
• [llvm] [AMDGPU] Precommit and Modify `phi_moveimm_subreg_input` testcase (PR #108389)   Aditi Medhane via llvm-commits
• [llvm] [AMDGPU] Precommit and Modify `phi_moveimm_subreg_input` testcase (PR #108389)   Aditi Medhane via llvm-commits
• [llvm] [AMDGPU] Handle subregisters properly in generic operand legalizer (PR #108496)   Aditi Medhane via llvm-commits
• [llvm] Add a pass to collect dropped variable statistics (PR #102233)   Adrian Prantl via llvm-commits
• [llvm] [CoroSplit][DebugInfo] Adjust heuristic for moving DIScope of funclets (PR #108611)   Adrian Prantl via llvm-commits
• [llvm] [CoroSplit][DebugInfo] Adjust heuristic for moving DIScope of funclets (PR #108611)   Adrian Prantl via llvm-commits
• [clang] [llvm] Introduce -defer-thinlto-prelink-coro-split that skips Coro passes in ThinLTO pre-link pipeline (PR #107153)   Adrian Vogelsgesang via llvm-commits
• [clang] [llvm] Introduce -defer-thinlto-prelink-coro-split that skips Coro passes in ThinLTO pre-link pipeline (PR #107153)   Adrian Vogelsgesang via llvm-commits
• [llvm] [MLGO] Fix logging verbosity in scripts (PR #107818)   Aiden Grossman via llvm-commits
• [llvm] d5f6f30 - [MLGO] Add spaces at the end of lines in multiline string   Aiden Grossman via llvm-commits
• [llvm] [llvm-exegesis] Use MCRegister instead of unsigned to hold registers (PR #107820)   Aiden Grossman via llvm-commits
• [llvm] [llvm-exegesis] Use MCRegister instead of unsigned to hold registers (PR #107820)   Aiden Grossman via llvm-commits
• [llvm] [MLGO] Fix logging verbosity in scripts (PR #107818)   Aiden Grossman via llvm-commits
• [llvm] [llvm-exegesis] Refactor getting register number from name to LLVMState (PR #107895)   Aiden Grossman via llvm-commits
• [llvm] [MLGO] Fix logging verbosity in scripts (PR #107818)   Aiden Grossman via llvm-commits
• [llvm] [MLGO] Fix logging verbosity in scripts (PR #107818)   Aiden Grossman via llvm-commits
• [llvm] 02fff93 - [MLGO] Remove unused imports   Aiden Grossman via llvm-commits
• [llvm] [MLGO] Fix logging verbosity in scripts (PR #107818)   Aiden Grossman via llvm-commits
• [llvm] [MLGO] Fix logging verbosity in scripts (PR #107818)   Aiden Grossman via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)   Aiden Grossman via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)   Aiden Grossman via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)   Aiden Grossman via llvm-commits
• [llvm] [llvm-exegesis] Refactor getting register number from name to LLVMState (PR #107895)   Aiden Grossman via llvm-commits
• [llvm] [X86] Recognize VPXORDZrr as a zero-idiom on Znver4 (PR #108314)   Aiden Grossman via llvm-commits
• [llvm] [X86] Recognize VPXORDZrr as a zero-idiom on Znver4 (PR #108314)   Aiden Grossman via llvm-commits
• [llvm] [X86] Recognize VPXORDZrr as a zero-idiom on Znver4 (PR #108314)   Aiden Grossman via llvm-commits
• [llvm] [MCA][ResourceManager] Fix a bug in the instruction issue logic. (PR #108386)   Aiden Grossman via llvm-commits
• [llvm] workflows/commit-access-review: Use get_collaborators() function (PR #108313)   Aiden Grossman via llvm-commits
• [llvm] [X86] Complete AMD znver4 AVX512 zeroing idioms (PR #108740)   Aiden Grossman via llvm-commits
• [llvm] [TableGen] Halt !if resolution for unresolved condition (PR #107823)   Akshat Oke via llvm-commits
• [llvm] [NewPM][CodeGen] Port MachineLICM to NPM (PR #107376)   Akshat Oke via llvm-commits
• [llvm] [TableGen] Halt !if resolution for unresolved condition (PR #107823)   Akshat Oke via llvm-commits
• [llvm] [TableGen] Halt !if resolution for unresolved condition (PR #107823)   Akshat Oke via llvm-commits
• [llvm] [TableGen] Halt !if resolution for unresolved condition (PR #107823)   Akshat Oke via llvm-commits
• [llvm] [TableGen] Resolve arguments with fields in records (PR #107829)   Akshat Oke via llvm-commits
• [llvm] [TableGen] Resolve arguments with fields in records (PR #107829)   Akshat Oke via llvm-commits
• [llvm] [AMDGPU][NewPM] Port SIPeepholeSDWA pass to NPM (PR #107049)   Akshat Oke via llvm-commits
• [llvm] [TableGen] Resolve arguments with fields in records (PR #107829)   Akshat Oke via llvm-commits
• [llvm] [TableGen] Resolve arguments with fields in records (PR #107829)   Akshat Oke via llvm-commits
• [llvm] [TableGen] Resolve arguments with fields in records (PR #107829)   Akshat Oke via llvm-commits
• [llvm] Bail out jump threading on indirect branches (PR #103688)   Aleksandrs Zajakins via llvm-commits
• [clang] [llvm] Double run offloading (PR #107834)   Aleksei Romanov via llvm-commits
• [clang] [llvm] Double run offloading (PR #107834)   Aleksei Romanov via llvm-commits
• [llvm] [RISCV] Add tests for memcmp expansion (PR #107824)   Alex Bradbury via llvm-commits
• [llvm] [RISCV] Separate more of scalar FP in CC_RISCV. NFC (PR #107908)   Alex Bradbury via llvm-commits
• [llvm] [RISCV] Add 16 bit GPR sub-register for Zhinx. (PR #107446)   Alex Bradbury via llvm-commits
• [llvm] [RISCV] Add 16 bit GPR sub-register for Zhinx. (PR #107446)   Alex Bradbury via llvm-commits
• [llvm] [IR] Initial introduction of memset_pattern (PR #97583)   Alex Bradbury via llvm-commits
• [llvm] [IR] Initial introduction of memset_pattern (PR #97583)   Alex Bradbury via llvm-commits
• [llvm] [IR] Initial introduction of memset_pattern (PR #97583)   Alex Bradbury via llvm-commits
• [llvm] [IR] Initial introduction of memset_pattern (PR #97583)   Alex Bradbury via llvm-commits
• [llvm] [IR] Initial introduction of memset_pattern (PR #97583)   Alex Bradbury via llvm-commits
• [llvm] [IR] Initial introduction of memset_pattern (PR #97583)   Alex Bradbury via llvm-commits
• [llvm] [IR] Initial introduction of memset_pattern (PR #97583)   Alex Bradbury via llvm-commits
• [llvm] [IR] Initial introduction of memset_pattern (PR #97583)   Alex Bradbury via llvm-commits
• [llvm] [RISCV][doc] Add note to RISCVUsage about supported atomics ABIs (PR #103879)   Alex Bradbury via llvm-commits
• [llvm] [RISCV][doc] Add note to RISCVUsage about supported atomics ABIs (PR #103879)   Alex Bradbury via llvm-commits
• [llvm] [RISCV][doc] Add note to RISCVUsage about supported atomics ABIs (PR #103879)   Alex Bradbury via llvm-commits
• [llvm] [RISCV] Add 16 bit GPR sub-register for Zhinx. (PR #107446)   Alex Bradbury via llvm-commits
• [llvm] [LegalizeIntegerTypes] Simplify ExpandIntRes_FP_TO_XINT when operand needs to be SoftPromoted. (PR #107634)   Alex Bradbury via llvm-commits
• [llvm] [RISCV] Add additional fence for amocas when required by recent ABI change (PR #101023)   Alex Bradbury via llvm-commits
• [llvm] [RISCV] Add additional fence for amocas when required by recent ABI change (PR #101023)   Alex Bradbury via llvm-commits
• [llvm] [RISCV] Enable load clustering by default (PR #73789)   Alex Bradbury via llvm-commits
• [llvm] [NVPTX] Support copysign PTX instruction (PR #107800)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Restrict combining to properly aligned v16i8 vectors. (PR #107919)   Alex MacLean via llvm-commits
• [clang] [llvm] [NVPTX] Remove nvvm.bitcast.* intrinsics (PR #107936)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Support copysign PTX instruction (PR #107800)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Support copysign PTX instruction (PR #107800)   Alex MacLean via llvm-commits
• [clang] [llvm] [NVPTX] Remove nvvm.bitcast.* intrinsics (PR #107936)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Support copysign PTX instruction (PR #107800)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Support copysign PTX instruction (PR #107800)   Alex MacLean via llvm-commits
• [llvm] Reland "[NVPTX] Support copysign PTX instruction" (PR #108125)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Support copysign PTX instruction (PR #107800)   Alex MacLean via llvm-commits
• [llvm] Reland "[NVPTX] Support copysign PTX instruction" (PR #108125)   Alex MacLean via llvm-commits
• [llvm] Reland "[NVPTX] Support copysign PTX instruction" (PR #108125)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   Alex MacLean via llvm-commits
• [llvm] Reland "[NVPTX] Support copysign PTX instruction" (PR #108125)   Alex MacLean via llvm-commits
• [llvm] Reland "[NVPTX] Support copysign PTX instruction" (PR #108125)   Alex MacLean via llvm-commits
• [clang] [llvm] [NVPTX] Remove nvvm.bitcast.* intrinsics (PR #107936)   Alex MacLean via llvm-commits
• [clang] [llvm] [NVPTX] Remove nvvm.bitcast.* intrinsics (PR #107936)   Alex MacLean via llvm-commits
• [llvm] Reland "[NVPTX] Support copysign PTX instruction" (PR #108125)   Alex MacLean via llvm-commits
• [llvm] Reland "[NVPTX] Support copysign PTX instruction" (PR #108125)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] deprecate nvvm.rotate.* intrinsics, cleanup funnel-shift handeling (PR #107655)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] deprecate nvvm.rotate.* intrinsics, cleanup funnel-shift handeling (PR #107655)   Alex MacLean via llvm-commits
• [llvm] [llvm] Consistently respect `naked` fn attribute in `TargetFrameLowering::hasFP()` (PR #106014)   Alex Rønne Petersen via llvm-commits
• [clang] [llvm] [llvm][Triple] Add `Environment` members and parsing for glibc/musl parity. (PR #107664)   Alex Rønne Petersen via llvm-commits
• [llvm] [llvm] Ensure that soft float targets don't emit `fma()` libcalls. (PR #106615)   Alex Rønne Petersen via llvm-commits
• [llvm] [llvm] Ensure that soft float targets don't emit `fma()` libcalls. (PR #106615)   Alex Rønne Petersen via llvm-commits
• [llvm] [llvm] Consistently respect `naked` fn attribute in `TargetFrameLowering::hasFP()` (PR #106014)   Alex Rønne Petersen via llvm-commits
• [llvm] [llvm] Consistently respect `naked` fn attribute in `TargetFrameLowering::hasFP()` (PR #106014)   Alex Rønne Petersen via llvm-commits
• [llvm] [llvm] Ensure that soft float targets don't emit `fma()` libcalls. (PR #106615)   Alex Rønne Petersen via llvm-commits
• [llvm] [llvm] Consistently respect `naked` fn attribute in `TargetFrameLowering::hasFP()` (PR #106014)   Alex Rønne Petersen via llvm-commits
• [llvm] [llvm] Ensure that soft float targets don't emit `fma()` libcalls. (PR #106615)   Alex Rønne Petersen via llvm-commits
• [clang] [llvm] [SPIRV][RFC] Rework / extend support for memory scopes (PR #106429)   Alex Voicu via llvm-commits
• [clang] [llvm] [SPIRV][RFC] Rework / extend support for memory scopes (PR #106429)   Alex Voicu via llvm-commits
• [llvm] [SPIR-V] Align memory scopes with SPIR-V specification and LLVM expectations and change default mem scope value (PR #108528)   Alex Voicu via llvm-commits
• [clang] [llvm] [ValueTracking] Add dominating condition support in computeKnownBits() (PR #73662)   Alexander Kornienko via llvm-commits
• [clang] [llvm] [ValueTracking] Add dominating condition support in computeKnownBits() (PR #73662)   Alexander Kornienko via llvm-commits
• [llvm] [mlir] [MLIR] Add f6E3M2FN type (PR #105573)   Alexander Pivovarov via llvm-commits
• [llvm] [mlir] [MLIR] Add f6E3M2FN type (PR #105573)   Alexander Pivovarov via llvm-commits
• [compiler-rt] [compiler-rt] Simplify definition of uptr (PR #106155)   Alexander Richardson via llvm-commits
• [compiler-rt] [compiler-rt] Hardcode uptr/sptr typedefs on Linux Arm (PR #108105)   Alexander Richardson via llvm-commits
• [compiler-rt] [compiler-rt] Simplify definition of uptr (PR #106155)   Alexander Richardson via llvm-commits
• [llvm] [Attributor] Avoid AS-cast for function pointers (PR #65825)   Alexander Richardson via llvm-commits
• [llvm] [Attributor] Avoid AS-cast for function pointers (PR #65825)   Alexander Richardson via llvm-commits
• [llvm] added a script to update llvm-mc test file (PR #107246)   Alexander Richardson via llvm-commits
• [compiler-rt] [compiler-rt][builtins]Fix complex division for aarch64 (PR #106664)   Alexander Richardson via llvm-commits
• [compiler-rt] [compiler-rt][builtins]Fix complex division for aarch64 (PR #106664)   Alexander Shaposhnikov via llvm-commits
• [compiler-rt] [llvm] Reland "[TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling." (PR #82711)   Alexander Yermolovich via llvm-commits
• [clang] [llvm] Delete the clang-format Visual Studio plugin code (PR #108342)   Alexandre Ganea via llvm-commits
• [clang] [llvm] [AArch64] Split FeatureLS64 to LS64_ACCDATA and LS64_V. (PR #101712)   Alexandros Lamprineas via llvm-commits
• [clang] [llvm] [AArch64] Split FeatureLS64 to LS64_ACCDATA and LS64_V. (PR #101712)   Alexandros Lamprineas via llvm-commits
• [clang] [llvm] [ARM][AArch64] Split FEAT_SHA1 from FEAT_SHA256. (PR #99816)   Alexandros Lamprineas via llvm-commits
• [clang] [llvm] [ARM][AArch64] Split FEAT_SHA1 from FEAT_SHA256. (PR #99816)   Alexandros Lamprineas via llvm-commits
• [clang] [compiler-rt] [llvm] [FMV][AArch64] Unify ls64, ls64_v and ls64_accdata. (PR #108024)   Alexandros Lamprineas via llvm-commits
• [clang] [compiler-rt] [llvm] [FMV][AArch64] Remove feature sha1 from FMV. (PR #108383)   Alexandros Lamprineas via llvm-commits
• [clang] [compiler-rt] [llvm] [FMV][AArch64] Remove feature sha1 from FMV. (PR #108383)   Alexandros Lamprineas via llvm-commits
• [clang] [compiler-rt] [llvm] [FMV][AArch64] Remove feature sha1 from FMV. (PR #108383)   Alexandros Lamprineas via llvm-commits
• [clang] [compiler-rt] [llvm] [FMV][AArch64] Unify ls64, ls64_v and ls64_accdata. (PR #108024)   Alexandros Lamprineas via llvm-commits
• [llvm] [SLP] Better way to filter target-specific tests (PR #106720)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Move some of X86 tests to common directory (PR #107587)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Better way to filter target-specific tests (PR #106720)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #107273)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Vectorize gathered loads (PR #107461)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Vectorize gathered loads (PR #107461)   Alexey Bataev via llvm-commits
• [llvm] [LV]Initial support for safe distance in predicated DataWithEVL vectorization mode. (PR #102897)   Alexey Bataev via llvm-commits
• [llvm] b3d2d50 - [SLP][NFC]Reorder code for better structural complexity, NFC   Alexey Bataev via llvm-commits
• [llvm] [SLP]Vectorize gathered loads (PR #107461)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Vectorize gathered loads (PR #107461)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Vectorize gathered loads (PR #107461)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Vectorize gathered loads (PR #107461)   Alexey Bataev via llvm-commits
• [llvm] [LV]Initial support for safe distance in predicated DataWithEVL vectorization mode. (PR #102897)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Add subvector vectorization for non-load nodes (PR #108430)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #107273)   Alexey Bataev via llvm-commits
• [llvm] de0fdcb - [SLP][NFC]Add a test for incorrectly combined extracts with the buildvector   Alexey Bataev via llvm-commits
• [llvm] 5d7cf50 - [SLP]Fix PR108421: Correctly deduce VF from the masks   Alexey Bataev via llvm-commits
• [llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #107273)   Alexey Bataev via llvm-commits
• [llvm] 98b1d01 - [SLP][NFC]Test with incorrect value for phi node with reused scalars, NFC   Alexey Bataev via llvm-commits
• [llvm] c13bf6d - [SLP]Return proper value for phi vectorized node   Alexey Bataev via llvm-commits
• [llvm] [SLP]Improve/fix subvectors in gather/buildvector nodes handling (PR #104144)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #107273)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #107273)   Alexey Bataev via llvm-commits
• [llvm] 1e3536e - [SLP]Fix PR108620: Need to check, if the reduced value was transformed   Alexey Bataev via llvm-commits
• [lld] [lld] select a default eflags for hexagon (PR #108431)   Alexey Karyakin via llvm-commits
• [lld] [lld] select a default eflags for hexagon (PR #108431)   Alexey Karyakin via llvm-commits
• [llvm] [LLD] Avoid non-deterministic relocations processing. (PR #107186)   Alexey Lapshin via llvm-commits
• [llvm] [LLD] Avoid non-deterministic relocations processing. (PR #107186)   Alexey Lapshin via llvm-commits
• [llvm] [IR] Make UnaryInstruction::classof recognize FreezeInst. (PR #107944)   Alina Sbirlea via llvm-commits
• [llvm] [SandboxIR][Bench] Benchmark RUOW (PR #107456)   Alina Sbirlea via llvm-commits
• [llvm] [SandboxIR][Bench] Add tests with tracking enabled (PR #108273)   Alina Sbirlea via llvm-commits
• [llvm] [SandboxIR][Bench] SandboxIR creation (PR #108278)   Alina Sbirlea via llvm-commits
• [llvm] [SandboxIR][Bench] SandboxIR creation (PR #108278)   Alina Sbirlea via llvm-commits
• [llvm] Fix mistake in comment regarding dyn_cast_or_null (PR #108026)   Aman LaChapelle via llvm-commits
• [llvm] Fix mistake in comment regarding dyn_cast_or_null (PR #108026)   Aman LaChapelle via llvm-commits
• [llvm] [GlobalIsel] Visit ICmp (PR #105991)   Amara Emerson via llvm-commits
• [llvm] [GlobalIsel] Visit ICmp (PR #105991)   Amara Emerson via llvm-commits
• [llvm] [AArch64][GlobalISel] Perfect Shuffles (PR #106446)   Amara Emerson via llvm-commits
• [llvm] [IRTranslator] Simplify fixed vector ConstantAggregateZero handling. NFC (PR #108667)   Amara Emerson via llvm-commits
• [llvm] [IRTranslator][RISCV] Support scalable vector zeroinitializer. (PR #108666)   Amara Emerson via llvm-commits
• [llvm] [GlobalIsel] Visit ICmp (PR #105991)   Amara Emerson via llvm-commits
• [llvm] [GlobalIsel] Canonicalize G_ICMP (PR #108755)   Amara Emerson via llvm-commits
• [llvm] [GlobalIsel] Canonicalize G_ICMP (PR #108755)   Amara Emerson via llvm-commits
• [llvm] [GlobalIsel] Canonicalize G_ICMP (PR #108755)   Amara Emerson via llvm-commits
• [llvm] [GlobalIsel] Canonicalize G_ICMP (PR #108755)   Amara Emerson via llvm-commits
• [llvm] [GlobalIsel] Canonicalize G_ICMP (PR #108755)   Amara Emerson via llvm-commits
• [llvm] [GlobalIsel] Visit ICmp (PR #105991)   Amara Emerson via llvm-commits
• [llvm] [GlobalIsel] Canonicalize G_ICMP (PR #108755)   Amara Emerson via llvm-commits
• [llvm] [BOLT] Drop suffixes in parsePseudoProbe GUID assignment (PR #106243)   Amir Ayupov via llvm-commits
• [llvm] [BOLT][NFC] Rename profile-use-pseudo-probes (PR #106364)   Amir Ayupov via llvm-commits
• [llvm] [BOLT][NFC] Rename profile-use-pseudo-probes (PR #106364)   Amir Ayupov via llvm-commits
• [llvm] [BOLT] Only parse probes for profiled functions in profile-write-pseudo-probes mode (PR #106365)   Amir Ayupov via llvm-commits
• [llvm] [BOLT] Only parse probes for profiled functions in profile-write-pseudo-probes mode (PR #106365)   Amir Ayupov via llvm-commits
• [clang] [lldb] [llvm] [BOLT] Drop blocks without profile in BAT YAML (PR #107970)   Amir Ayupov via llvm-commits
• [clang] [lldb] [llvm] [BOLT] Drop blocks without profile in BAT YAML (PR #107970)   Amir Ayupov via llvm-commits
• [clang] [lldb] [llvm] [BOLT] Drop blocks without profile in BAT YAML (PR #107970)   Amir Ayupov via llvm-commits
• [llvm] [BOLT] Add pseudo probe inline tree to YAML profile (PR #107137)   Amir Ayupov via llvm-commits
• [llvm] [BOLT] Add pseudo probe inline tree to YAML profile (PR #107137)   Amir Ayupov via llvm-commits
• [llvm] [BOLT][AArch64] Do not relax ADR referencing the same fragment (PR #108673)   Amir Ayupov via llvm-commits
• [llvm] [BOLT][NFC] Make YamlProfileToFunction a DenseMap (PR #108712)   Amir Ayupov via llvm-commits
• [llvm] [BOLT][NFC] Make YamlProfileToFunction a DenseMap (PR #108712)   Amir Ayupov via llvm-commits
• [llvm] [Transform] Remove redundant condition (PR #107893)   Amr Hesham via llvm-commits
• [llvm] [Transform] Remove redundant condition (PR #107893)   Amr Hesham via llvm-commits
• [llvm] [Transform] Remove redundant condition (PR #107893)   Amr Hesham via llvm-commits
• [llvm] [LoopUnswitch] Remove redundant condition. (NFC) (PR #107893)   Amr Hesham via llvm-commits
• [llvm] [LoopUnswitch] Remove redundant condition. (NFC) (PR #107893)   Amr Hesham via llvm-commits
• [llvm] update llvm-dis header with available options (PR #108073)   Amr Hesham via llvm-commits
• [llvm] [tools][llvm-cat] Fix typo in the Input file name option (PR #108294)   Amr Hesham via llvm-commits
• [llvm] [tools][llvm-as] Fix file input extension description (PR #108295)   Amr Hesham via llvm-commits
• [llvm] [tools][llvm-as] Fix file input extension description (PR #108295)   Amr Hesham via llvm-commits
• [llvm] [LoopUnswitch] Remove redundant condition. (NFC) (PR #107893)   Amr Hesham via llvm-commits
• [llvm] [tools][llvm-as] Fix file input extension description (PR #108295)   Amr Hesham via llvm-commits
• [llvm] [tools][llvm-cat] Fix typo in the Input file name option (PR #108294)   Amr Hesham via llvm-commits
• [llvm] [InstCombine] Fold Xor with or disjoint (PR #105992)   Amr Hesham via llvm-commits
• [llvm] [PowerPC] Fix assert exposed by PR 95931 in LowerBITCAST (PR #108062)   Amy Kwan via llvm-commits
• [llvm] [PowerPC] Fix assert exposed by PR 95931 in LowerBITCAST (PR #108062)   Amy Kwan via llvm-commits
• [llvm] [PowerPC] Fix assert exposed by PR 95931 in LowerBITCAST (PR #108062)   Amy Kwan via llvm-commits
• [llvm] [PowerPC] Fix assert exposed by PR 95931 in LowerBITCAST (PR #108062)   Amy Kwan via llvm-commits
• [flang] [llvm] [Flang][OpenMP][Sema] Adding parsing and semantic support for scan directive. (PR #102792)   Anchu Rajendran S via llvm-commits
• [flang] [llvm] [Flang][OpenMP][Sema] Adding parsing and semantic support for scan directive. (PR #102792)   Anchu Rajendran S via llvm-commits
• [flang] [llvm] [Flang][OpenMP][Sema] Adding parsing and semantic support for scan directive. (PR #102792)   Anchu Rajendran S via llvm-commits
• [flang] [llvm] [Flang][OpenMP][Sema] Adding parsing and semantic support for scan directive. (PR #102792)   Anchu Rajendran S via llvm-commits
• [flang] [llvm] [Flang][OpenMP][Sema] Adding parsing and semantic support for scan directive. (PR #102792)   Anchu Rajendran S via llvm-commits
• [flang] [llvm] [Flang][OpenMP][Sema] Adding parsing and semantic support for scan directive. (PR #102792)   Anchu Rajendran S via llvm-commits
• [llvm] [X86] Recognize VPXORDZrr as a zero-idiom on Znver4 (PR #108314)   Andrea Di Biagio via llvm-commits
• [llvm] [MCA][ResourceManager] Fix a bug in the instruction issue logic. (PR #108386)   Andrea Di Biagio via llvm-commits
• [llvm] [MCA][ResourceManager] Fix a bug in the instruction issue logic. (PR #108386)   Andrea Di Biagio via llvm-commits
• [llvm] [MCA][ResourceManager] Fix a bug in the instruction issue logic. (PR #108386)   Andrea Di Biagio via llvm-commits
• [llvm] [MCA][ResourceManager] Fix a bug in the instruction issue logic. (PR #108386)   Andrea Di Biagio via llvm-commits
• [llvm] [MCA][ResourceManager] Fix a bug in the instruction issue logic. (PR #108386)   Andrea Di Biagio via llvm-commits
• [llvm] [MCA][ResourceManager] Fix a bug in the instruction issue logic. (PR #108386)   Andrea Di Biagio via llvm-commits
• [llvm] [MCA][ResourceManager] Fix a bug in the instruction issue logic. (PR #108386)   Andrea Di Biagio via llvm-commits
• [llvm] [IPSCCP] Infer attributes on arguments (PR #107114)   Andreas Jonson via llvm-commits
• [llvm] [IPSCCP] Infer attributes on arguments (PR #107114)   Andreas Jonson via llvm-commits
• [llvm] [SDAG] Handle range attribute for call instructions. (PR #108410)   Andreas Jonson via llvm-commits
• [llvm] [SDAG] Handle range attribute for call instructions. (PR #108410)   Andreas Jonson via llvm-commits
• [llvm] [ADT] Require base equality in indexed_accessor_iterator::operator==() (PR #107856)   Andrei Golubev via llvm-commits
• [llvm] [ADT] Require base equality in indexed_accessor_iterator::operator==() (PR #107856)   Andrei Golubev via llvm-commits
• [llvm] [ADT] Require base equality in indexed_accessor_iterator::operator==() (PR #107856)   Andrei Golubev via llvm-commits
• [llvm] [Xtensa] Lowering FRAMEADDR/RETURNADDR operations. (PR #107363)   Andrei Safronov via llvm-commits
• [llvm] [Xtensa] Lowering FRAMEADDR/RETURNADDR operations. (PR #107363)   Andrei Safronov via llvm-commits
• [llvm] [Xtensa] Lowering FRAMEADDR/RETURNADDR operations. (PR #107363)   Andrei Safronov via llvm-commits
• [llvm] [Xtensa] Lowering FRAMEADDR/RETURNADDR operations. (PR #107363)   Andrei Safronov via llvm-commits
• [llvm] [Xtensa] Lowering FRAMEADDR/RETURNADDR operations. (PR #107363)   Andrei Safronov via llvm-commits
• [llvm] [Xtensa] Lowering FRAMEADDR/RETURNADDR operations. (PR #107363)   Andrei Safronov via llvm-commits
• [llvm] [Xtensa] Lowering FRAMEADDR/RETURNADDR operations. (PR #107363)   Andrei Safronov via llvm-commits
• [llvm] [Xtensa] Lowering FRAMEADDR/RETURNADDR operations. (PR #107363)   Andrei Safronov via llvm-commits
• [llvm] [Xtensa] Lowering FRAMEADDR/RETURNADDR operations. (PR #107363)   Andrei Safronov via llvm-commits
• [llvm] [Xtensa] Lowering FRAMEADDR/RETURNADDR operations. (PR #107363)   Andrei Safronov via llvm-commits
• [llvm] [Xtensa] Lowering FRAMEADDR/RETURNADDR operations. (PR #107363)   Andrei Safronov via llvm-commits
• [llvm] [Xtensa] Lowering FRAMEADDR/RETURNADDR operations. (PR #107363)   Andrei Safronov via llvm-commits
• [llvm] [Xtensa] Lowering FRAMEADDR/RETURNADDR operations. (PR #107363)   Andrei Safronov via llvm-commits
• [clang] [compiler-rt] [llvm] [FMV][AArch64] Unify ls64, ls64_v and ls64_accdata. (PR #108024)   Andrew Carlotti via llvm-commits
• [llvm] fix TracePCGuard default false positive (PR #106464)   Andrew Kelley via llvm-commits
• [llvm] fix TracePCGuard default false positive (PR #106464)   Andrew Kelley via llvm-commits
• [llvm] fix TracePCGuard default false positive (PR #106464)   Andrew Kelley via llvm-commits
• [llvm] fix TracePCGuard default false positive (PR #106464)   Andrew Kelley via llvm-commits
• [llvm] [llvm-ml] Fix RIP-relative addressing for ptr operands (PR #107618)   Andrew Ng via llvm-commits
• [llvm] [llvm-ml] Fix RIP-relative addressing for ptr operands (PR #107618)   Andrew Ng via llvm-commits
• [llvm] [cmake] Set up llvm-ml as ASM_MASM tool in WinMsvc.cmake (PR #104903)   Andrew Ng via llvm-commits
• [llvm] Reland [llvm-ml] Fix RIP-relative addressing for ptr operands (PR #108061)   Andrew Ng via llvm-commits
• [llvm] Reland [llvm-ml] Fix RIP-relative addressing for ptr operands (PR #108061)   Andrew Ng via llvm-commits
• [llvm] Reland [llvm-ml] Fix RIP-relative addressing for ptr operands (PR #108061)   Andrew Ng via llvm-commits
• [clang] [llvm] [RISCV] Add Syntacore SCR7 processor definition (PR #108406)   Anton Sidorenko via llvm-commits
• [clang] [llvm] [RISCV] Add Syntacore SCR7 processor definition (PR #108406)   Anton Sidorenko via llvm-commits
• [clang] [llvm] [RISCV] Add Syntacore SCR7 processor definition (PR #108406)   Anton Sidorenko via llvm-commits
• [clang] [llvm] [Instrumentation] Move out to Utils (NFC) (PR #108532)   Antonio Frighetto via llvm-commits
• [clang] [llvm] [Instrumentation] Move out to Utils (NFC) (PR #108532)   Antonio Frighetto via llvm-commits
• [llvm] [Instrumentation] Move test coverage in Transforms (NFC) (PR #108544)   Antonio Frighetto via llvm-commits
• [llvm] [Instrumentation] Do not run sanitizers for naked functions (PR #108552)   Antonio Frighetto via llvm-commits
• [llvm] [Instrumentation] Do not run sanitizers for naked functions (PR #108552)   Antonio Frighetto via llvm-commits
• [llvm] [Instrumentation] Move test coverage in Transforms (NFC) (PR #108544)   Antonio Frighetto via llvm-commits
• [llvm] [Instrumentation] Move test coverage in Transforms (NFC) (PR #108544)   Antonio Frighetto via llvm-commits
• [llvm] [Instrumentation] Do not run sanitizers for naked functions (PR #108552)   Antonio Frighetto via llvm-commits
• [llvm] [Instrumentation] Do not run sanitizers for naked functions (PR #108552)   Antonio Frighetto via llvm-commits
• [llvm] [Instrumentation] Do not run sanitizers for naked functions (PR #108552)   Antonio Frighetto via llvm-commits
• [llvm] [Instrumentation] Do not run sanitizers for naked functions (PR #108552)   Antonio Frighetto via llvm-commits
• [llvm] [Instrumentation] Do not run sanitizers for naked functions (PR #108552)   Antonio Frighetto via llvm-commits
• [llvm] [Instrumentation] Do not run sanitizers for naked functions (PR #108552)   Antonio Frighetto via llvm-commits
• [llvm] [Instrumentation] Do not run sanitizers for naked functions (PR #108552)   Antonio Frighetto via llvm-commits
• [llvm] [Instrumentation] Do not run sanitizers for naked functions (PR #108552)   Antonio Frighetto via llvm-commits
• [llvm] [Instrumentation] Do not run sanitizers for naked functions (PR #108552)   Antonio Frighetto via llvm-commits
• [llvm] [NVPTX] Support copysign PTX instruction (PR #107800)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Convert calls to indirect when call signature mismatches function signature (PR #107644)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Restrict combining to properly aligned v16i8 vectors. (PR #107919)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Restrict combining to properly aligned v16i8 vectors. (PR #107919)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Convert calls to indirect when call signature mismatches function signature (PR #107644)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Restrict combining to properly aligned v16i8 vectors. (PR #107919)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Support copysign PTX instruction (PR #107800)   Artem Belevich via llvm-commits
• [clang] [llvm] [NVPTX] Remove nvvm.bitcast.* intrinsics (PR #107936)   Artem Belevich via llvm-commits
• [llvm] Revert "[NVPTX] Support copysign PTX instruction (#107800)" (PR #108066)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Support copysign PTX instruction (PR #107800)   Artem Belevich via llvm-commits
• [llvm] [LLVM][NVPTX] Add support for tensormap.cp_fenceproxy (PR #107555)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Improve copy avoidance during lowering. (PR #106423)   Artem Belevich via llvm-commits
• [llvm] Reland "[NVPTX] Support copysign PTX instruction" (PR #108125)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Convert calls to indirect when call signature mismatches function signature (PR #107644)   Artem Belevich via llvm-commits
• [llvm] Reland "[NVPTX] Support copysign PTX instruction" (PR #108125)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Convert calls to indirect when call signature mismatches function signature (PR #107644)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Convert calls to indirect when call signature mismatches function signature (PR #107644)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Convert calls to indirect when call signature mismatches function signature (PR #107644)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   Artem Belevich via llvm-commits
• [llvm] [LLVM][NVPTX] Add support for tensormap.cp_fenceproxy (PR #107555)   Artem Belevich via llvm-commits
• [llvm] [LLVM][NVPTX] Add support for tensormap.cp_fenceproxy (PR #107555)   Artem Belevich via llvm-commits
• [clang] [llvm] [NVPTX] Remove nvvm.bitcast.* intrinsics (PR #107936)   Artem Belevich via llvm-commits
• [llvm] [SandboxVec] Implement Pass class (PR #107617)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxVec] Implement Pass class (PR #107617)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxVec] Implement Pass class (PR #107617)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxVec] Implement Pass class (PR #107617)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxVec] Implement Pass class (PR #107617)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxVec] Implement Pass class (PR #107617)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxVec] Implement Pass class (PR #107617)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxVec] Implement Pass class (PR #107617)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxIR] PassManager (PR #107932)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxIR] PassManager (PR #107932)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxIR] PassManager (PR #107932)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxIR] PassManager (PR #107932)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxIR] Pass registry (PR #108084)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxIR] Pass registry (PR #108084)   Arthur Eubanks via llvm-commits
• [llvm] [SandboxIR] Pass registry (PR #108084)   Arthur Eubanks via llvm-commits
• [compiler-rt] [compiler-rt] Simplify definition of uptr (PR #106155)   Arthur Eubanks via llvm-commits
• [compiler-rt] [compiler-rt] Simplify definition of uptr (PR #106155)   Arthur Eubanks via llvm-commits
• [compiler-rt] [compiler-rt] Hardcode uptr/sptr typedefs on Linux Arm (PR #108105)   Arthur Eubanks via llvm-commits
• [compiler-rt] [compiler-rt] Hardcode uptr/sptr typedefs on Linux Arm (PR #108105)   Arthur Eubanks via llvm-commits
• [compiler-rt] [compiler-rt] Hardcode uptr/sptr typedefs on Linux Arm (PR #108105)   Arthur Eubanks via llvm-commits
• [compiler-rt] [compiler-rt] Hardcode uptr/sptr typedefs on Linux Arm (PR #108105)   Arthur Eubanks via llvm-commits
• [compiler-rt] [compiler-rt] Hardcode uptr/sptr typedefs on Linux Arm (PR #108105)   Arthur Eubanks via llvm-commits
• [llvm] [gn build] Port win asan runtime rules (PR #108293)   Arthur Eubanks via llvm-commits
• [clang] [compiler-rt] Reland [asan][windows] Eliminate the static asan runtime on windows (PR #107899)   Arthur Eubanks via llvm-commits
• [clang] [compiler-rt] Reland [asan][windows] Eliminate the static asan runtime on windows (PR #107899)   Arthur Eubanks via llvm-commits
• [clang] [compiler-rt] Reland [asan][windows] Eliminate the static asan runtime on windows (PR #107899)   Arthur Eubanks via llvm-commits
• [compiler-rt] [asan][windows] use __builtin_function_address to avoid problematic codegen in weak function registration (PR #108327)   Arthur Eubanks via llvm-commits
• [compiler-rt] [lsan] Fix free(NULL) interception during initialization (PR #106912)   Arthur Eubanks via llvm-commits
• [llvm] [gn build] Port win asan runtime rules (PR #108293)   Arthur Eubanks via llvm-commits
• [llvm] [gn build] Port win asan runtime rules (PR #108293)   Arthur Eubanks via llvm-commits
• [compiler-rt] [test][compiler-rt] Mark dlsym_alloc.c as unsupported on macos (PR #108439)   Arthur Eubanks via llvm-commits
• [llvm] [AMDGPU] Include unused preload kernarg in KD total SGPR count (PR #104743)   Austin Kerbow via llvm-commits
• [llvm] [AMDGPU] Support preloading hidden kernel arguments (PR #98861)   Austin Kerbow via llvm-commits
• [llvm] [AMDGPU] Support preloading hidden kernel arguments (PR #98861)   Austin Kerbow via llvm-commits
• [llvm] [AMDGPU] Support preloading hidden kernel arguments (PR #98861)   Austin Kerbow via llvm-commits
• [llvm] [AMDGPU] Support preloading hidden kernel arguments (PR #98861)   Austin Kerbow via llvm-commits
• [llvm] [WIP] [IR] Add `llvm.sincos` intrinsic (PR #107639)   Benjamin Maxwell via llvm-commits
• [llvm] [SDAG] Avoid creating redundant stack slots when lowering FSINCOS (PR #108401)   Benjamin Maxwell via llvm-commits
• [llvm] [SDAG] Avoid creating redundant stack slots when lowering FSINCOS (PR #108401)   Benjamin Maxwell via llvm-commits
• [llvm] [SDAG] Avoid creating redundant stack slots when lowering FSINCOS (PR #108401)   Benjamin Maxwell via llvm-commits
• [llvm] [SDAG] Avoid creating redundant stack slots when lowering FSINCOS (PR #108401)   Benjamin Maxwell via llvm-commits
• [llvm] [SDAG] Avoid creating redundant stack slots when lowering FSINCOS (PR #108401)   Benjamin Maxwell via llvm-commits
• [llvm] [SDAG] Avoid creating redundant stack slots when lowering FSINCOS (PR #108401)   Benjamin Maxwell via llvm-commits
• [llvm] [SDAG] Avoid creating redundant stack slots when lowering FSINCOS (PR #108401)   Benjamin Maxwell via llvm-commits
• [llvm] [SDAG] Avoid creating redundant stack slots when lowering FSINCOS (PR #108401)   Benjamin Maxwell via llvm-commits
• [llvm] [SDAG] Avoid creating redundant stack slots when lowering FSINCOS (PR #108401)   Benjamin Maxwell via llvm-commits
• [llvm] [SDAG] Avoid creating redundant stack slots when lowering FSINCOS (PR #108401)   Benjamin Maxwell via llvm-commits
• [llvm] [SDAG] Avoid creating redundant stack slots when lowering FSINCOS (PR #108401)   Benjamin Maxwell via llvm-commits
• [llvm] [SDAG] Avoid creating redundant stack slots when lowering FSINCOS (PR #108401)   Benjamin Maxwell via llvm-commits
• [llvm] [SDAG] Avoid creating redundant stack slots when lowering FSINCOS (PR #108401)   Benjamin Maxwell via llvm-commits
• [llvm] [SDAG] Avoid creating redundant stack slots when lowering FSINCOS (PR #108401)   Benjamin Maxwell via llvm-commits
• [llvm] [SDAG] Avoid creating redundant stack slots when lowering FSINCOS (PR #108401)   Benjamin Maxwell via llvm-commits
• [llvm] [TLI] Support inferring function attributes for sincos[f|l] (PR #108554)   Benjamin Maxwell via llvm-commits
• [llvm] [TLI] Support inferring function attributes for sincos[f|l] (PR #108554)   Benjamin Maxwell via llvm-commits
• [llvm] [ARM] Apply sign-return-address attribute to outlined function (PR #107877)   Benson Chu via llvm-commits
• [llvm] [ARM] Apply sign-return-address attribute to outlined function (PR #107877)   Benson Chu via llvm-commits
• [llvm] [ARM] Apply sign-return-address attribute to outlined function (PR #107877)   Benson Chu via llvm-commits
• [llvm] [DSE] Split memory intrinsics if they are dead in the middle (PR #75478)   Björn Pettersson via llvm-commits
• [llvm] [llvm][Support] Determine the max thread length on Haiku (PR #107801)   Brad Smith via llvm-commits
• [llvm] [MIPS]Initial support for MIPS16 assembly. (PR #108681)   Brad Smith via llvm-commits
• [clang] [llvm] [RISCV][VLS] Support RISCV VLS calling convention (PR #100346)   Brandon Wu via llvm-commits
• [llvm] [RISCV][MI] Support partial spill/reload for vector registers (PR #105661)   Brandon Wu via llvm-commits
• [llvm] [RISCV] Rematerialize vmv.v.x (PR #107993)   Brandon Wu via llvm-commits
• [llvm] [RISCV] Rematerialize vmv.v.x (PR #107993)   Brandon Wu via llvm-commits
• [llvm] [RISCV] Rematerialize vmv.v.x (PR #107993)   Brandon Wu via llvm-commits
• [llvm] [RISCV] Rematerialize vmv.v.x (PR #107993)   Brandon Wu via llvm-commits
• [llvm] [RISCV] Rematerialize vfmv.v.f (PR #108007)   Brandon Wu via llvm-commits
• [llvm] [RISCV] Rematerialize vmv.s.x and vfmv.s.f (PR #108012)   Brandon Wu via llvm-commits
• [clang] [llvm] [RISCV][VCIX] Add vcix_state to GNU inline assembly register set (PR #106914)   Brandon Wu via llvm-commits
• [clang] [llvm] [RISCV][VCIX] Add vcix_state to GNU inline assembly register set (PR #106914)   Brandon Wu via llvm-commits
• [clang] [llvm] [RISCV][VCIX] Add vcix_state to GNU inline assembly register set (PR #106914)   Brandon Wu via llvm-commits
• [clang] [llvm] [RISCV][VCIX] Add vcix_state to GNU inline assembly register set (PR #106914)   Brandon Wu via llvm-commits
• [llvm] [RISCV] Add documentation that Zvbc and Zvk* are supported through intrinsics. NFC (PR #108577)   Brandon Wu via llvm-commits
• [llvm] [RISCV] Add Zvfhmin to RISCVUsage.rst. NFC (PR #108574)   Brandon Wu via llvm-commits
• [llvm] [RISCV] Add documentation that Zvbc and Zvk* are supported through intrinsics. NFC (PR #108577)   Brandon Wu via llvm-commits
• [llvm] [RISCV] Add documentation that Zvbc and Zvk* are supported through intrinsics. NFC (PR #108577)   Brandon Wu via llvm-commits
• [llvm] [RISCV] Change Zvbb and Zvkb from 'Assembly Support' to Supported. (PR #108572)   Brandon Wu via llvm-commits
• [llvm] [WebAssembly] Support BUILD_VECTOR with F16x8. (PR #108117)   Brendan Dahl via llvm-commits
• [llvm] [WebAssembly] Fix lane index size for f16x8 extract_lane. (PR #108118)   Brendan Dahl via llvm-commits
• [llvm] [WebAssembly] Add load and store patterns for V8F16. (PR #108119)   Brendan Dahl via llvm-commits
• [llvm] [WebAssembly] Add load and store patterns for V8F16. (PR #108119)   Brendan Dahl via llvm-commits
• [llvm] [WebAssembly] Support BUILD_VECTOR with F16x8. (PR #108117)   Brendan Dahl via llvm-commits
• [llvm] [WebAssembly] Fix lane index size for f16x8 extract_lane. (PR #108118)   Brendan Dahl via llvm-commits
• [clang] [compiler-rt] [libcxx] [cmake] Add hexagon-linux cmake cache files (PR #98712)   Brian Cain via llvm-commits
• [lld] [lld] select a default eflags for hexagon (PR #108431)   Brian Cain via llvm-commits
• [lld] [lld] select a default eflags for hexagon (PR #108431)   Brian Cain via llvm-commits
• [lld] [lld] select a default eflags for hexagon (PR #108431)   Brian Cain via llvm-commits
• [lld] [lld] select a default eflags for hexagon (PR #108431)   Brian Cain via llvm-commits
• [clang] [compiler-rt] [libcxx] [cmake] Add hexagon-linux cmake cache files (PR #98712)   Brian Cain via llvm-commits
• [llvm] [HEXAGON] AddrModeOpt support for HVX and optimize adds (PR #106368)   Brian Cain via llvm-commits
• [llvm] [HEXAGON] AddrModeOpt support for HVX and optimize adds (PR #106368)   Brian Cain via llvm-commits
• [lld] [lld] select a default eflags for hexagon (PR #108431)   Brian Cain via llvm-commits
• [lld] [lld] select a default eflags for hexagon (PR #108431)   Brian Cain via llvm-commits
• [compiler-rt] [builtins] Fix missing main() function in float16/bfloat16 support checks (PR #104478)   Brooks Davis via llvm-commits
• [llvm] added a script to update llvm-mc test file (PR #107246)   Brox Chen via llvm-commits
• [llvm] added a script to update llvm-mc test file (PR #107246)   Brox Chen via llvm-commits
• [llvm] added a script to update llvm-mc test file (PR #107246)   Brox Chen via llvm-commits
• [llvm] added a script to update llvm-mc test file (PR #107246)   Brox Chen via llvm-commits
• [llvm] added a script to update llvm-mc test file (PR #107246)   Brox Chen via llvm-commits
• [llvm] added a script to update llvm-mc test file (PR #107246)   Brox Chen via llvm-commits
• [llvm] added a script to update llvm-mc test file (PR #107246)   Brox Chen via llvm-commits
• [llvm] added a script to update llvm-mc test file (PR #107246)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][MC] 16bit vsrc and vdst support in MC (PR #104510)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][MC] 16bit vsrc and vdst support in MC (PR #104510)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][MC] 16bit vsrc and vdst support in MC (PR #104510)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][MC] 16bit vsrc and vdst support in MC (PR #104510)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][MC] 16bit vsrc and vdst support in MC (PR #104510)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][MC] 16bit vsrc and vdst support in MC (PR #104510)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][MC] 16bit vsrc and vdst support in MC (PR #104510)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][MC] 16bit vsrc and vdst support in MC (PR #104510)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][MC] 16bit vsrc and vdst support in MC (PR #104510)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][MC] 16bit vsrc and vdst support in MC (PR #104510)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][MC] 16bit vsrc and vdst support in MC (PR #104510)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][MC] fp conversion in true/fake16 format (PR #104449)   Brox Chen via llvm-commits
• [llvm] added a script to update llvm-mc test file (PR #107246)   Brox Chen via llvm-commits
• [llvm] added a script to update llvm-mc test file (PR #107246)   Brox Chen via llvm-commits
• [llvm] Main merge true16 mc vop1 (PR #108412)   Brox Chen via llvm-commits
• [llvm] added a script to update llvm-mc test file (PR #107246)   Brox Chen via llvm-commits
• [llvm] Main merge true16 mc vop1 (PR #108412)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][MC] true16 for more VOP1 instructions (PR #108412)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][MC] true16 for more VOP1 instructions (PR #108412)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][MC] true16 for more VOP1 instructions (PR #108412)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][MC] true16 for more VOP1 instructions (PR #108412)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][MC] true16 for more VOP1 instructions (PR #108412)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][MC] true16 for more VOP1 instructions (PR #108412)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][MC] true16 for more VOP1 instructions (PR #108412)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][MC] true16 for more VOP1 instructions (PR #108412)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][MC] true16 for more VOP1 instructions (PR #108412)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][MC] true16 for more VOP1 instructions (PR #108412)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][MC] true16 for more VOP1 instructions (PR #108412)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][MC] true16 for more VOP1 instructions (PR #108412)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][MC] true16 for more VOP1 instructions (PR #108412)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][MC] true16 for more VOP1 instructions (PR #108412)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16][MC] true16 for VOP2 instructions (PR #108553)   Brox Chen via llvm-commits
• [llvm] [Offload] Introduce offload-tblgen and initial new API implementation (PR #108413)   Callum Fare via llvm-commits
• [llvm] [Offload] Introduce offload-tblgen and initial new API implementation (PR #108413)   Callum Fare via llvm-commits
• [llvm] [Offload] Introduce `offload-tblgen` (PR #88923)   Callum Fare via llvm-commits
• [llvm] [Offload] Introduce `offload-tblgen` (PR #88923)   Callum Fare via llvm-commits
• [llvm] [Offload] Introduce offload-tblgen and initial new API implementation (PR #108413)   Callum Fare via llvm-commits
• [llvm] [Offload] Introduce offload-tblgen and initial new API implementation (PR #108413)   Callum Fare via llvm-commits
• [llvm] [Offload] Introduce offload-tblgen and initial new API implementation (PR #108413)   Callum Fare via llvm-commits
• [llvm] [Offload] Introduce offload-tblgen and initial new API implementation (PR #108413)   Callum Fare via llvm-commits
• [llvm] [Offload] Introduce offload-tblgen and initial new API implementation (PR #108413)   Callum Fare via llvm-commits
• [llvm] [Offload] Introduce offload-tblgen and initial new API implementation (PR #108413)   Callum Fare via llvm-commits
• [llvm] [Offload] Introduce offload-tblgen and initial new API implementation (PR #108413)   Callum Fare via llvm-commits
• [llvm] [AMDGPU] Simplify and improve codegen for llvm.amdgcn.set.inactive (PR #107889)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Simplify and improve codegen for llvm.amdgcn.set.inactive (PR #107889)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Simplify and improve codegen for llvm.amdgcn.set.inactive (PR #107889)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Simplify and improve codegen for llvm.amdgcn.set.inactive (PR #107889)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Simplify and improve codegen for llvm.amdgcn.set.inactive (PR #107889)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Enable reordering of VMEM loads during clustering (PR #107986)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Fix selection of s_load_b96 on GFX11 (PR #108029)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Fix selection of s_load_b96 on GFX11 (PR #108029)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Simplify and improve codegen for llvm.amdgcn.set.inactive (PR #107889)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Simplify and improve codegen for llvm.amdgcn.set.inactive (PR #107889)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Simplify and improve codegen for llvm.amdgcn.set.inactive (PR #107889)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Simplify and improve codegen for llvm.amdgcn.set.inactive (PR #107889)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Simplify and improve codegen for llvm.amdgcn.set.inactive (PR #107889)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Enable reordering of VMEM loads during clustering (PR #107986)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] GCNHazardRecognizer: refactor getWaitStatesSince (NFCI) (PR #108347)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] GCNHazardRecognizer: refactor getWaitStatesSince (NFCI) (PR #108347)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] GCNHazardRecognizer: refactor getWaitStatesSince (NFCI) (PR #108347)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] GCNHazardRecognizer: refactor getWaitStatesSince (NFCI) (PR #108347)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] GCNHazardRecognizer: refactor getWaitStatesSince (NFCI) (PR #108347)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] GCNHazardRecognizer: refactor getWaitStatesSince (NFCI) (PR #108347)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] GCNHazardRecognizer: refactor getWaitStatesSince (NFCI) (PR #108347)   Carl Ritson via llvm-commits
• [clang] [compiler-rt] Reland [asan][windows] Eliminate the static asan runtime on windows (PR #107899)   Charlie Barto via llvm-commits
• [clang] [compiler-rt] Reland [asan][windows] Eliminate the static asan runtime on windows (PR #107899)   Charlie Barto via llvm-commits
• [compiler-rt] [compiler-rt] [MSVC] Detect MSVC as a compiler-id for lit. (PR #108255)   Charlie Barto via llvm-commits
• [compiler-rt] [asan][windows] use __builtin_function_address to avoid problematic codegen in weak function registration (PR #108327)   Charlie Barto via llvm-commits
• [clang] [compiler-rt] Reland [asan][windows] Eliminate the static asan runtime on windows (PR #107899)   Charlie Barto via llvm-commits
• [compiler-rt] [asan][windows] use __builtin_function_address to avoid problematic codegen in weak function registration (PR #108327)   Charlie Barto via llvm-commits
• [compiler-rt] [asan] add the new/delete code back to RTAsan_dynamic (PR #108329)   Charlie Barto via llvm-commits
• [clang] [compiler-rt] Reland [asan][windows] Eliminate the static asan runtime on windows (PR #107899)   Charlie Barto via llvm-commits
• [compiler-rt] [compiler-rt] [MSVC] Detect MSVC as a compiler-id for lit. (PR #108255)   Charlie Barto via llvm-commits
• [compiler-rt] [sanitizers] convert some errant CRLF line endings to LF (PR #108454)   Charlie Barto via llvm-commits
• [compiler-rt] [sanitizers] convert some errant CRLF line endings to LF (PR #108454)   Charlie Barto via llvm-commits
• [compiler-rt] [sanitizers] convert some errant CRLF line endings to LF (PR #108454)   Charlie Barto via llvm-commits
• [compiler-rt] [sanitizers] convert some errant CRLF line endings to LF (PR #108454)   Charlie Barto via llvm-commits
• [llvm] delete MF.verify from PPCMIPeephole pass (PR #108075)   Chen Zheng via llvm-commits
• [llvm] update P7 v4i8 load cost (PR #108261)   Chen Zheng via llvm-commits
• [compiler-rt] [compiler-rt][rtsan] Use Die instead of exit, define cf.exitcode (PR #107635)   Chris Apple via llvm-commits
• [compiler-rt] [compiler-rt][rtsan] Use Die instead of exit, define cf.exitcode (PR #107635)   Chris Apple via llvm-commits
• [compiler-rt] [compiler-rt][rtsan] Use Die instead of exit, define cf.exitcode (PR #107635)   Chris Apple via llvm-commits
• [compiler-rt] [compiler-rt][rtsan] Improve error message wording to match ASan style (PR #107620)   Chris Apple via llvm-commits
• [compiler-rt] [compiler-rt][rtsan] Use Die instead of exit, define cf.exitcode (PR #107635)   Chris Apple via llvm-commits
• [compiler-rt] [rtsan] Ensure pthread is initialized in test (PR #108040)   Chris Apple via llvm-commits
• [compiler-rt] [rtsan] Ensure pthread is initialized in test (PR #108040)   Chris Apple via llvm-commits
• [compiler-rt] [rtsan][compiler-rt] Add 64 bit file interceptors, test for _FILE_OFFSET_BITS (PR #108057)   Chris Apple via llvm-commits
• [compiler-rt] [rtsan][compiler-rt] Add 64 bit file interceptors, test for _FILE_OFFSET_BITS (PR #108057)   Chris Apple via llvm-commits
• [compiler-rt] [compiler-rt][NFC] Add preprocessor definitions for 64 bit file interceptors that were missing (PR #108059)   Chris Apple via llvm-commits
• [compiler-rt] [compiler-rt][NFC] Add preprocessor definitions for 64 bit file interceptors that were missing (PR #108059)   Chris Apple via llvm-commits
• [compiler-rt] [rtsan] Ensure pthread is initialized in test (PR #108040)   Chris Apple via llvm-commits
• [compiler-rt] [rtsan][compiler-rt] Add 64 bit file interceptors, test for _FILE_OFFSET_BITS (PR #108057)   Chris Apple via llvm-commits
• [compiler-rt] [compiler-rt][rtsan] Improve error message wording to match ASan style (PR #107620)   Chris Apple via llvm-commits
• [compiler-rt] [compiler-rt][rtsan] Improve error message wording to match ASan style (PR #107620)   Chris Apple via llvm-commits
• [compiler-rt] [rtsan] Fix va_args handling in open functions (PR #108291)   Chris Apple via llvm-commits
• [compiler-rt] [rtsan] Fix va_args handling in open functions (PR #108291)   Chris Apple via llvm-commits
• [compiler-rt] [rtsan] Fix va_args handling in open functions (PR #108291)   Chris Apple via llvm-commits
• [compiler-rt] [rtsan] Fix va_args handling in open functions (PR #108291)   Chris Apple via llvm-commits
• [compiler-rt] [rtsan] Fix va_args handling in open functions (PR #108291)   Chris Apple via llvm-commits
• [compiler-rt] [rtsan] Fix va_args handling in open functions (PR #108291)   Chris Apple via llvm-commits
• [compiler-rt] [rtsan] Fix va_args handling in open functions (PR #108291)   Chris Apple via llvm-commits
• [compiler-rt] [compiler-rt][NFC] Add preprocessor definitions for 64 bit file interceptors that were missing (PR #108059)   Chris Apple via llvm-commits
• [compiler-rt] [rtsan][compiler-rt] Add 64 bit file interceptors, test for _FILE_OFFSET_BITS (PR #108057)   Chris Apple via llvm-commits
• [compiler-rt] [rtsan] Fix comment in fcntl, fix va_args type (PR #108440)   Chris Apple via llvm-commits
• [compiler-rt] [rtsan] Fix RTTI issue, make a better c test (PR #108720)   Chris Apple via llvm-commits
• [compiler-rt] [rtsan] Fix RTTI issue, make a better c test (PR #108720)   Chris Apple via llvm-commits
• [compiler-rt] [rtsan] Fix va_args handling in open functions (PR #108291)   Chris Apple via llvm-commits
• [llvm] [DirectX] generate resource table for PSV part (PR #106607)   Chris B via llvm-commits
• [llvm] [CMake][ASAN] Add support for ADDRESS_SANITIZER_BUILD compile option (PR #83595)   Christian Ulmann via llvm-commits
• [libcxx] [llvm] [libcxx] improves diagnostics for containers with bad value types (PR #106296)   Christopher Di Bella via llvm-commits
• [libcxx] [llvm] [libcxx] improves diagnostics for containers with bad value types (PR #106296)   Christopher Di Bella via llvm-commits
• [libcxx] [llvm] [libcxx] improves diagnostics for containers with bad value types (PR #106296)   Christopher Di Bella via llvm-commits
• [libcxx] [llvm] [libcxx] improves diagnostics for containers with bad value types (PR #106296)   Christopher Di Bella via llvm-commits
• [libcxx] [llvm] [libcxx] improves diagnostics for containers with bad value types (PR #106296)   Christopher Di Bella via llvm-commits
• [compiler-rt] [scudo] Add fragmentation info for each memory group (PR #107475)   Christopher Ferris via llvm-commits
• [compiler-rt] [scudo] Fix the logic of MaxAllowedFragmentedPages (PR #107927)   Christopher Ferris via llvm-commits
• [compiler-rt] [scudo] Fix the logic of MaxAllowedFragmentedPages (PR #107927)   Christopher Ferris via llvm-commits
• [compiler-rt] [scudo] Fix the logic of MaxAllowedFragmentedPages (PR #107927)   Christopher Ferris via llvm-commits
• [compiler-rt] [scudo] Fix the logic of MaxAllowedFragmentedPages (PR #107927)   Christopher Ferris via llvm-commits
• [compiler-rt] [scudo] Fix the logic of MaxAllowedFragmentedPages (PR #107927)   Christopher Ferris via llvm-commits
• [compiler-rt] Reapply "[scudo] Fix the logic of MaxAllowedFragmentedPages" (#108130) (PR #108134)   Christopher Ferris via llvm-commits
• [compiler-rt] [scudo] Add thread-safety annotation on getMemoryGroupFragmentationIn… (PR #108277)   Christopher Ferris via llvm-commits
• [llvm] [CodeGen] Remove unused MachineBranchProbabilityInfo from MachineTraceMetrics pass(NFC). (PR #108506)   Christudasan Devadasan via llvm-commits
• [llvm] [CodeGen] Remove unused MachineBranchProbabilityInfo from MachineTraceMetrics pass(NFC). (PR #108506)   Christudasan Devadasan via llvm-commits
• [llvm] [CodeGen] Remove unused MachineBranchProbabilityInfo from MachineTraceMetrics pass(NFC). (PR #108506)   Christudasan Devadasan via llvm-commits
• [llvm] [LLVM][Coroutines] Switch CoroAnnotationElidePass to a FunctionPass (PR #107897)   Chuanqi Xu via llvm-commits
• [llvm] [llvm/llvm-project][Coroutines] Move spill related methods to a Spill utils (PR #107884)   Chuanqi Xu via llvm-commits
• [llvm] [Coroutines] Split buildCoroutineFrame into normalization and frame building (PR #108076)   Chuanqi Xu via llvm-commits
• [llvm] [Coroutines] Split buildCoroutineFrame into normalization and frame building (PR #108076)   Chuanqi Xu via llvm-commits
• [llvm] [Coroutines] Split buildCoroutineFrame into normalization and frame building (PR #108076)   Chuanqi Xu via llvm-commits
• [llvm] [Coroutines] Split buildCoroutineFrame into normalization and frame building (PR #108076)   Chuanqi Xu via llvm-commits
• [llvm] [Coroutines] Verify normalization was not missed (PR #108096)   Chuanqi Xu via llvm-commits
• [llvm] [Coroutines] Move materialization code into its own utils (PR #108240)   Chuanqi Xu via llvm-commits
• [llvm] [Coroutines] Make CoroSplit properly update CallGraph (PR #107935)   Chuanqi Xu via llvm-commits
• [llvm] [Coroutines] Make CoroSplit properly update CallGraph (PR #107935)   Chuanqi Xu via llvm-commits
• [llvm] [Coroutines] properly update CallGraph in CoroSplit (PR #107935)   Chuanqi Xu via llvm-commits
• [llvm] [Coroutines] Move Shape to its own header (PR #108242)   Chuanqi Xu via llvm-commits
• [llvm] [Coroutines] Refactor CoroShape::buildFrom for future use by ABI objects (PR #108623)   Chuanqi Xu via llvm-commits
• [llvm] [Coroutines] Refactor CoroShape::buildFrom for future use by ABI objects (PR #108623)   Chuanqi Xu via llvm-commits
• [llvm] [Coroutines] Refactor CoroShape::buildFrom for future use by ABI objects (PR #108623)   Chuanqi Xu via llvm-commits
• [llvm] [llvm-exegesis] Refactor getting register number from name to LLVMState (PR #107895)   Clement Courbet via llvm-commits
• [llvm] [DirectX] Preserve value names in DXILOpLowering. NFC (PR #108089)   Cooper Partin via llvm-commits
• [llvm] [RISCV] Separate more of scalar FP in CC_RISCV. (PR #107908)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add 16 bit GPR sub-register for Zhinx. (PR #107446)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add 16 bit GPR sub-register for Zhinx. (PR #107446)   Craig Topper via llvm-commits
• [llvm] [RISCV] Separate more of scalar FP in CC_RISCV. NFC (PR #107908)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add 16 bit GPR sub-register for Zhinx. (PR #107446)   Craig Topper via llvm-commits
• [llvm] [RISCV] Separate more of scalar FP in CC_RISCV. NFC (PR #107908)   Craig Topper via llvm-commits
• [llvm] 5537ae8 - [RISCV] Fix fneg.d/fabs.d aliasing handling for Zdinx. Add missing fmv.s/d aliases.   Craig Topper via llvm-commits
• [llvm] [LegalizeIntegerTypes] Simplify ExpandIntRes_FP_TO_XINT when operand needs to be SoftPromoted. (PR #107634)   Craig Topper via llvm-commits
• [llvm] [RISCV] Rematerialize vmv.v.x (PR #107993)   Craig Topper via llvm-commits
• [llvm] [RISCV] Rematerialize vfmv.v.f (PR #108007)   Craig Topper via llvm-commits
• [llvm] [RISCV] Rematerialize vmv.s.x and vfmv.s.f (PR #108012)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add 16 bit GPR sub-register for Zhinx. (PR #107446)   Craig Topper via llvm-commits
• [llvm] [CodeGen] Fix documentation for ISD::ATOMIC_STORE (PR #108126)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISEL] Legalize G_INSERT and G_EXTRACT for scalable vectors (PR #108220)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISEL] Legalize G_INSERT and G_EXTRACT for scalable vectors (PR #108220)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISEL] Legalize G_INSERT and G_EXTRACT for scalable vectors (PR #108220)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISEL] Legalize G_INSERT and G_EXTRACT for scalable vectors (PR #108220)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISEL] Legalize G_INSERT and G_EXTRACT for scalable vectors (PR #108220)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISEL] Legalize G_INSERT and G_EXTRACT for scalable vectors (PR #108220)   Craig Topper via llvm-commits
• [llvm] [RISCV] Expand bf16 FNEG/FABS/FCOPYSIGN (PR #108245)   Craig Topper via llvm-commits
• [llvm] [RISCV] Expand bf16 FNEG/FABS/FCOPYSIGN (PR #108245)   Craig Topper via llvm-commits
• [llvm] [RISCV] Expand bf16 vector truncstores and extloads (PR #108235)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add fixed length vector patterns for vfwmaccbf16.vv (PR #108204)   Craig Topper via llvm-commits
• [llvm] [CodeGen] Fix documentation for ISD::ATOMIC_STORE (PR #108126)   Craig Topper via llvm-commits
• [llvm] [RISCV] Generalize RISCVDAGToDAGISel::selectFPImm to handle bitcasts from int to FP. (PR #108284)   Craig Topper via llvm-commits
• [llvm] [CodeGen] Fix documentation for ISD::ATOMIC_STORE. NFC (PR #108126)   Craig Topper via llvm-commits
• [llvm] [RISCV] Lower f16/bf16 splat_vector by bitcasting to i16 instead of promoting to f16. (PR #108298)   Craig Topper via llvm-commits
• [llvm] [RISCV] Lower f16/bf16 splat_vector by bitcasting to i16 instead of promoting to f16. (PR #108298)   Craig Topper via llvm-commits
• [llvm] [RISCV] Lower f16/bf16 splat_vector by bitcasting to i16 instead of promoting to f16. (PR #108298)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add additional fence for amocas when required by recent ABI change (PR #101023)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add additional fence for amocas when required by recent ABI change (PR #101023)   Craig Topper via llvm-commits
• [llvm] [RISCV] Expand bf16 FNEG/FABS/FCOPYSIGN (PR #108245)   Craig Topper via llvm-commits
• [llvm] [RISCV] Lower f16/bf16 splat_vector by bitcasting to i16 instead of promoting to f32. (PR #108298)   Craig Topper via llvm-commits
• [llvm] [RISCV] Expand Zfa fli+fneg cases during lowering instead of during isel. (PR #108316)   Craig Topper via llvm-commits
• [llvm] [RISCV] Expand Zfa fli+fneg cases during lowering instead of during isel. (PR #108316)   Craig Topper via llvm-commits
• [llvm] [CodeGen] Fix documentation for ISD::ATOMIC_STORE. NFC (PR #108126)   Craig Topper via llvm-commits
• [llvm] [RISCV] Expand Zfa fli+fneg cases during lowering instead of during isel. (PR #108316)   Craig Topper via llvm-commits
• [llvm] [RISCV] Lower f16/bf16 splat_vector by bitcasting to i16 instead of promoting to f32. (PR #108298)   Craig Topper via llvm-commits
• [llvm] [RISCV] Generalize RISCVDAGToDAGISel::selectFPImm to handle bitcasts from int to FP. (PR #108284)   Craig Topper via llvm-commits
• [llvm] [RISCV] Restructure CC_RISCV_FastCC to reduce code duplication. (PR #107671)   Craig Topper via llvm-commits
• [llvm] [RISCV] Lower f16/bf16 splat_vector by bitcasting to i16 instead of promoting to f32. (PR #108298)   Craig Topper via llvm-commits
• [llvm] c7cf2cc - [RISCV] Remove unneeded customization of bf16 bitcast. NFC   Craig Topper via llvm-commits
• [llvm] 9c56a61 - [RISCV] Combine two hasStdExtZfhminOrZhinxmin() blocks in RISCVTargetLowering constructor. NFC   Craig Topper via llvm-commits
• [llvm] [RISCV] Add 16 bit GPR sub-register for Zhinx. (PR #107446)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add 16 bit GPR sub-register for Zhinx. (PR #107446)   Craig Topper via llvm-commits
• [llvm] [RISCV] Restructure CC_RISCV_FastCC to reduce code duplication. nFC (PR #107671)   Craig Topper via llvm-commits
• [llvm] [RISCV] Restructure CC_RISCV_FastCC to reduce code duplication. NFC (PR #107671)   Craig Topper via llvm-commits
• [llvm] [LegalizeIntegerTypes] Simplify ExpandIntRes_FP_TO_XINT when operand needs to be SoftPromoted. (PR #107634)   Craig Topper via llvm-commits
• [llvm] [RISCV] Restructure CC_RISCV_FastCC to reduce code duplication. NFC (PR #107671)   Craig Topper via llvm-commits
• [llvm] [RISCV] Lower interleave + deinterleave for zvfhmin and zvfbfmin (PR #108404)   Craig Topper via llvm-commits
• [llvm] [RISCV] Lower bf16 {S,U}INT_TO_FP, FP_TO_{S,U}INT and VP variants (PR #108338)   Craig Topper via llvm-commits
• [llvm] [RISCV] Account for zvfhmin and zvfbfmin promotion in register usage (PR #108370)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add 16 bit GPR sub-register for Zhinx. (PR #107446)   Craig Topper via llvm-commits
• [llvm] a30b1d5 - [SelectionDAG] Use Register in a few places in InstrEmitter. NFC   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Legalize G_STACKSAVE/RESTORE. (PR #108438)   Craig Topper via llvm-commits
• [llvm] 6db8292 - [RISCV] Put ADDI InstAliases together and give them explicit priorities.   Craig Topper via llvm-commits
• [llvm] f02a0d0 - [RISCV] Consistently use CHECK-EXT-F instead of CHECK-EXT-F-ON in csr-aliases.s. NFC   Craig Topper via llvm-commits
• [llvm] [RISCV] Enable floating point CSR alias mnemonics for Zfinx. (PR #108464)   Craig Topper via llvm-commits
• [llvm] [RISCV] Enable floating point CSR alias mnemonics for Zfinx. (PR #108464)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use CCValAssign::getCustomReg for fixed vector arguments/returns with RVV. (PR #108470)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use CCValAssign::getCustomReg for fixed vector arguments/returns with RVV. (PR #108470)   Craig Topper via llvm-commits
• [llvm] [RISCV] Enable floating point CSR alias mnemonics for Zfinx. (PR #108464)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Legalize G_STACKSAVE/RESTORE. (PR #108438)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV] Implement Clang Builtins for XCValu Extension in CV32E40P (PR #100684)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV] Implement Clang Builtins for XCValu Extension in CV32E40P (PR #100684)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Legalize G_STACKSAVE/RESTORE. (PR #108438)   Craig Topper via llvm-commits
• [llvm] cc40a46 - [RISCV] Increase EmitPriority on some InstAliases. NFC   Craig Topper via llvm-commits
• [llvm] [RISCV] Rename XCValu cv.slet(u) to cv.sle(). (PR #108481)   Craig Topper via llvm-commits
• [llvm] [RISCV] Rename XCValu cv.slet(u) to cv.sle(u). (PR #108481)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV] Implement Clang Builtins for XCValu Extension in CV32E40P (PR #100684)   Craig Topper via llvm-commits
• [llvm] [RISCV] Rename XCValu cv.slet(u) to cv.sle(u). (PR #108481)   Craig Topper via llvm-commits
• [llvm] [TableGen] Remove duplicate code in applyMnemonicAliases when target uses DefaultAsmParserVariant. (PR #108494)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Legalize G_STACKSAVE/RESTORE. (PR #108438)   Craig Topper via llvm-commits
• [llvm] 3285e8d - [RISCV] Remove unused HasStdExtB Predicate. NFC   Craig Topper via llvm-commits
• [llvm] 57aaf5e - [RISCV] Use MCRegister in RISCVMCInstrAnalysis. NFC   Craig Topper via llvm-commits
• [llvm] [TableGen] Remove duplicate code in applyMnemonicAliases when target uses DefaultAsmParserVariant. (PR #108494)   Craig Topper via llvm-commits
• [llvm] [TableGen] Remove duplicate code in applyMnemonicAliases when target uses DefaultAsmParserVariant. (PR #108494)   Craig Topper via llvm-commits
• [llvm] [TableGen] Remove duplicate code in applyMnemonicAliases when target uses DefaultAsmParserVariant. (PR #108494)   Craig Topper via llvm-commits
• [llvm] [X86] Use MCRegister in X86AsmParser. (PR #108509)   Craig Topper via llvm-commits
• [llvm] [RISCV] Make Zicclsm imply unaligned scalar and vector access (PR #108551)   Craig Topper via llvm-commits
• [llvm] [X86] Use MCRegister in X86AsmParser. (PR #108509)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use CCValAssign::getCustomReg for fixed vector arguments/returns with RVV. (PR #108470)   Craig Topper via llvm-commits
• [llvm] [RISCV] Change Zvbb and Zvkb from 'Assembly Support' to Supported. (PR #108572)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add Zvfhmin to RISCVUsage.rst. NFC (PR #108574)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add documentation that Zvk* are supported through intrinsics. NFC (PR #108577)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add documentation that Zvk* are supported through intrinsics. NFC (PR #108577)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add documentation that Zvbc and Zvk* are supported through intrinsics. NFC (PR #108577)   Craig Topper via llvm-commits
• [llvm] [RISCV][docs] GP Relaxation and Small Data Limit (PR #108592)   Craig Topper via llvm-commits
• [llvm] [RISCV] Change Zvbb and Zvkb from 'Assembly Support' to Supported. (PR #108572)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add Zvfhmin to RISCVUsage.rst. NFC (PR #108574)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add documentation that Zvbc and Zvk* are supported through intrinsics. NFC (PR #108577)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add 16 bit GPR sub-register for Zhinx. (PR #107446)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add documentation that Zvbc and Zvk* are supported through intrinsics. NFC (PR #108577)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add documentation that Zvbc and Zvk* are supported through intrinsics. NFC (PR #108577)   Craig Topper via llvm-commits
• [llvm] [IRTranslator][RISCV] Support scalable vector zeroinitializer. (PR #108666)   Craig Topper via llvm-commits
• [llvm] [IRTranslator] Simplify fixed vector ConstantAggregateZero handling. NFC (PR #108667)   Craig Topper via llvm-commits
• [llvm] [IRTranslator] Simplify fixed vector ConstantAggregateZero handling. NFC (PR #108667)   Craig Topper via llvm-commits
• [llvm] [X86] Use MCRegister in more places. NFC (PR #108682)   Craig Topper via llvm-commits
• [llvm] f78a48c - [MC] Use std::optional<MCRegisters> for values returned by MCRegisterInfo::getLLVMRegNum. NFC   Craig Topper via llvm-commits
• [llvm] 55ec015 - [RISCV][Docs] Correct vector crypto note link spelling. NFC   Craig Topper via llvm-commits
• [llvm] [IRTranslator][RISCV] Support scalable vector zeroinitializer. (PR #108666)   Craig Topper via llvm-commits
• [llvm] [X86] Use MCRegister in more places. NFC (PR #108682)   Craig Topper via llvm-commits
• [llvm] a578558 - [ARM] Replace a hardcoded 14 used as an MCRegister index with ARM::LR.   Craig Topper via llvm-commits
• [llvm] [RISCV][Docs] Remove Zvbb, Zvbc and Zvk* from experimental C intrinsics section of RISCVUsage.rst. NFC (PR #108718)   Craig Topper via llvm-commits
• [llvm] [IRTranslator][RISCV] Support scalable vector zeroinitializer. (PR #108666)   Craig Topper via llvm-commits
• [llvm] f427028 - [ARM] Use MCRegister in more places. NFC   Craig Topper via llvm-commits
• [llvm] a9e05a3 - [ARM] Use MCRegister for ARMTargetStreamer::emitRegSave. NFC   Craig Topper via llvm-commits
• [llvm] [RISCV] Add 32 bit GPR sub-register for Zfinx. (PR #108336)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add 32 bit GPR sub-register for Zfinx. (PR #108336)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add 16 bit GPR sub-register for Zhinx. (PR #107446)   Craig Topper via llvm-commits
• [llvm] cebc130 - [RISCV] Remove unneeded check for NoRegister from RISCVInstPrinter::printRegReg. NFC   Craig Topper via llvm-commits
• [llvm] 508e734 - [CodeGen] Use DenseMapInfo<Register> to implement DenseMapInfo<TargetInstrInfo::RegSubRegPair>. NFC   Craig Topper via llvm-commits
• [llvm] 2f48178 - [VirtRegMap] Use Register for Virt2ShapeMap key. NFC   Craig Topper via llvm-commits
• [llvm] 2395379 - [VirtRegMap] Remove unnecessary calls to Register::id() accessing IndexMaps.   Craig Topper via llvm-commits
• [llvm] e523f4e - [VirtRegMap] Store Register in Virt2SplitMap. NFC   Craig Topper via llvm-commits
• [llvm] [VirtRegMap] Store MCRegister in Virt2PhysMap. (PR #108775)   Craig Topper via llvm-commits
• [llvm] [VirtRegMap] Store MCRegister in Virt2PhysMap. (PR #108775)   Craig Topper via llvm-commits
• [llvm] [VirtRegMap] Store MCRegister in Virt2PhysMap. (PR #108775)   Craig Topper via llvm-commits
• [llvm] 76b54df - [StackSlotColoring] Use Register for isLoadFromStackSlot/isStoreToStackSlot result. NFC   Craig Topper via llvm-commits
• [llvm] [VirtRegMap] Store MCRegister in Virt2PhysMap. (PR #108775)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Use libcalls for rint, nearbyint, trunc, and round intrinsics. (PR #108779)   Craig Topper via llvm-commits
• [llvm] [VirtRegMap] Remove unused MAX_STACK_SLOT. NFC (PR #108781)   Craig Topper via llvm-commits
• [llvm] 46f7cb3 - [CodeGen] Use Register::id() instead of implicit cast to unsigned in Register.h. NFC   Craig Topper via llvm-commits
• [clang] [llvm] [HLSL] Implement elementwise popcount (PR #108121)   Damyan Pepper via llvm-commits
• [llvm] Fix bazel build past ca49739 (PR #108694)   Danial Klimkin via llvm-commits
• [llvm] Fix bazel build past ca49739 (PR #108694)   Danial Klimkin via llvm-commits
• [llvm] [DebugInfo] Add fast path for parsing DW_TAG_compile_unit abbrevs (PR #108757)   Daniel Bertalan via llvm-commits
• [llvm] [DebugInfo] Add fast path for parsing DW_TAG_compile_unit abbrevs (PR #108757)   Daniel Bertalan via llvm-commits
• [llvm] [DebugInfo] Add fast path for parsing DW_TAG_compile_unit abbrevs (PR #108757)   Daniel Bertalan via llvm-commits
• [clang] [lld] [llvm] [clang][MIPS] Add support for mipsel-windows-* targets (PR #107744)   Daniel Paoliello via llvm-commits
• [llvm] Don't rely on undefined behavior to store how a `User` object's allocation is laid out (PR #105714)   Daniel Paoliello via llvm-commits
• [llvm] Don't rely on undefined behavior to store how a `User` object's allocation is laid out (PR #105714)   Daniel Paoliello via llvm-commits
• [llvm] Don't rely on undefined behavior to store how a `User` object's allocation is laid out (PR #105714)   Daniel Paoliello via llvm-commits
• [llvm] Don't rely on undefined behavior to store how a `User` object's allocation is laid out (PR #105714)   Daniel Paoliello via llvm-commits
• [llvm] Don't rely on undefined behavior to store how a `User` object's allocation is laid out (PR #105714)   Daniel Paoliello via llvm-commits
• [llvm] Don't rely on undefined behavior to store how a `User` object's allocation is laid out (PR #105714)   Daniel Paoliello via llvm-commits
• [llvm] Don't rely on undefined behavior to store how a `User` object's allocation is laid out (PR #105714)   Daniel Paoliello via llvm-commits
• [compiler-rt] [Fuzzer] Passthrough zlib CMake paths into the test (PR #107926)   Daniel Thornburgh via llvm-commits
• [llvm] [llvm-debuginfod-find] Enable multicall driver (PR #108082)   Daniel Thornburgh via llvm-commits
• [llvm] [llvm-debuginfod-find] Enable multicall driver (PR #108082)   Daniel Thornburgh via llvm-commits
• [lld] [llvm] [mlir] [polly] [NFC] Add explicit #include llvm-config.h where its macros are used, last part. (PR #107615)   Daniil Fukalov via llvm-commits
• [lld] [llvm] [mlir] [polly] [NFC] Add explicit #include llvm-config.h where its macros are used, last part. (PR #107615)   Daniil Fukalov via llvm-commits
• [llvm] [NFC] Add explicit #include config.h where its macros are used. (PR #108077)   Daniil Fukalov via llvm-commits
• [llvm] [NFC] Add explicit #include config.h where its macros are used. (PR #108077)   Daniil Fukalov via llvm-commits
• [llvm] [PAC][CodeGen][ELF][AArch64] Support signed GOT (PR #105798)   Daniil Kovalev via llvm-commits
• [llvm] [PAC][CodeGen][ELF][AArch64] Support signed GOT (PR #105798)   Daniil Kovalev via llvm-commits
• [llvm] [PAC][CodeGen][ELF][AArch64] Support signed GOT (PR #105798)   Daniil Kovalev via llvm-commits
• [llvm] [ADT] Require base equality in indexed_accessor_iterator::operator==() (PR #107856)   David Blaikie via llvm-commits
• [llvm] [ADT] Require base equality in indexed_accessor_iterator::operator==() (PR #107856)   David Blaikie via llvm-commits
• [lldb] [llvm] lldb simplified template names rebuild without clang ast (PR #90008)   David Blaikie via llvm-commits
• [llvm] [llvm-dwarfdump] Rename manaully-generate-unit-index. (PR #108399)   David Blaikie via llvm-commits
• [llvm] [llvm-dwarfdump] Rename manaully-generate-unit-index. (PR #108399)   David Blaikie via llvm-commits
• [llvm] [mlir] eliminating g++ warnings (PR #105520)   David Blaikie via llvm-commits
• [llvm] [DebugInfo][DWARF] Set is_stmt on first non-line-0 instruction in BB (PR #105524)   David Blaikie via llvm-commits
• [llvm] [llvm][Support] Add support for thread naming for Haiku (PR #107646)   David CARLIER via llvm-commits
• [compiler-rt] [compiler-rt] Implements DumpAllRegisters for windows intel archs. (PR #108688)   David CARLIER via llvm-commits
• [compiler-rt] [compiler-rt] Implements DumpAllRegisters for windows intel archs. (PR #108688)   David CARLIER via llvm-commits
• [llvm] [AArch64][GlobalISel] Prefer to use Vector Truncate (PR #105692)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Prefer to use Vector Truncate (PR #105692)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Prefer to use Vector Truncate (PR #105692)   David Green via llvm-commits
• [llvm] [VectorCombine] Add type shrinking and zext propagation for fixed-width vector types (PR #104606)   David Green via llvm-commits
• [llvm] [VectorCombine] Add type shrinking and zext propagation for fixed-width vector types (PR #104606)   David Green via llvm-commits
• [llvm] [VectorCombine] Add type shrinking and zext propagation for fixed-width vector types (PR #104606)   David Green via llvm-commits
• [llvm] [VectorCombine] Add type shrinking and zext propagation for fixed-width vector types (PR #104606)   David Green via llvm-commits
• [llvm] [ARM] Fix VBICimm and VORRimm generation under Big endian. (PR #107813)   David Green via llvm-commits
• [llvm] 95831f0 - [ARM] Add a default unreachable case to AddrModeToString. NFC   David Green via llvm-commits
• [llvm] [InstCombine] Fold fmod to frem if we know it does not set errno. (PR #107912)   David Green via llvm-commits
• [llvm] [InstCombine] Fold fmod to frem if we know it does not set errno. (PR #107912)   David Green via llvm-commits
• [llvm] [AArch64][SLP] Add NFC test cases for floating point reductions (PR #106507)   David Green via llvm-commits
• [llvm] [AArch64][SLP] Add NFC test cases for floating point reductions (PR #106507)   David Green via llvm-commits
• [llvm] cd0e867 - [AArch64] Update and cleanup arm64-vector-imm.ll test. NFC   David Green via llvm-commits
• [llvm] 3001617 - [AArch64] Add tests for scalar_to_vector(load) and extend load into zero tests. NFC   David Green via llvm-commits
• [llvm] [AArch64][SLP] Add NFC test cases for floating point reductions (PR #106507)   David Green via llvm-commits
• [llvm] [AArch64] Extend and rewrite load zero and load undef patterns (PR #108185)   David Green via llvm-commits
• [llvm] [LV] Vectorize Epilogues for loops with small VF but high IC (PR #108190)   David Green via llvm-commits
• [llvm] 5c7957d - [AArch64] Allow i16->f64 uitofp tbl shuffles   David Green via llvm-commits
• [llvm] [AArch64] Initial sched model for Neoverse N3 (PR #106371)   David Green via llvm-commits
• [llvm] [AArch64] Initial sched model for Neoverse N3 (PR #106371)   David Green via llvm-commits
• [llvm] [AArch64] Initial sched model for Neoverse N3 (PR #106371)   David Green via llvm-commits
• [llvm] [AArch64] Initial sched model for Neoverse N3 (PR #106371)   David Green via llvm-commits
• [llvm] [AArch64] Initial sched model for Neoverse N3 (PR #106371)   David Green via llvm-commits
• [llvm] [AArch64] Initial sched model for Neoverse N3 (PR #106371)   David Green via llvm-commits
• [llvm] [AArch64] Initial sched model for Neoverse N3 (PR #106371)   David Green via llvm-commits
• [llvm] [AArch64] Initial sched model for Neoverse N3 (PR #106371)   David Green via llvm-commits
• [llvm] [AArch64] Initial sched model for Neoverse N3 (PR #106371)   David Green via llvm-commits
• [llvm] 1642f64 - [AArch64] Replace _Ncyc_ with _Nc_ in Neoverse scheduling models.   David Green via llvm-commits
• [llvm] [ARM] Fix VBICimm and VORRimm generation under Big endian. (PR #107813)   David Green via llvm-commits
• [llvm] [AArch64] Extend and rewrite load zero and load undef patterns (PR #108185)   David Green via llvm-commits
• [llvm] [AArch64][SLP] Add NFC test cases for floating point reductions (PR #106507)   David Green via llvm-commits
• [llvm] [AArch64][SLP] Add NFC test cases for floating point reductions (PR #106507)   David Green via llvm-commits
• [llvm] [AArch64][SLP] Add NFC test cases for floating point reductions (PR #106507)   David Green via llvm-commits
• [llvm] [AArch64] Fix sched model of Neoverse N2 (PR #106376)   David Green via llvm-commits
• [llvm] [InstCombine] Canonicalize non-i8 gep of mul to i8 (PR #96606)   David Green via llvm-commits
• [llvm] [GlobalISel][AArch64] Add G_FPTOSI_SAT/G_FPTOUI_SAT (PR #96297)   David Green via llvm-commits
• [llvm] [GlobalISel][AArch64] Add G_FPTOSI_SAT/G_FPTOUI_SAT (PR #96297)   David Green via llvm-commits
• [llvm] ad3ad15 - [InstCombine] Test for fmod -> frem folding. NFC   David Green via llvm-commits
• [llvm] [InstCombine] Pass DomTree and DomTreeCacheto LibCallSimplifier (PR #108446)   David Green via llvm-commits
• [llvm] [InstCombine] Fold fmod to frem if we know it does not set errno. (PR #107912)   David Green via llvm-commits
• [llvm] [InstCombine] Fold fmod to frem if we know it does not set errno. (PR #107912)   David Green via llvm-commits
• [llvm] [InstCombine] Fold fmod to frem if we know it does not set errno. (PR #107912)   David Green via llvm-commits
• [llvm] [InstCombine] Pass DomTree and DomTreeCacheto LibCallSimplifier (PR #108446)   David Green via llvm-commits
• [llvm] [InstCombine] Fold fmod to frem if we know it does not set errno. (PR #107912)   David Green via llvm-commits
• [llvm] [ARM] Fix VBICimm and VORRimm generation under Big endian. (PR #107813)   David Green via llvm-commits
• [llvm] [ARM] Fix VBICimm and VORRimm generation under Big endian. (PR #107813)   David Green via llvm-commits
• [llvm] [DAG] Fold trunc(srl(extract_elt(vec,c1),c2)) -> extract_elt(bitcast(vec),c3) (PR #107987)   David Green via llvm-commits
• [llvm] 7582308 - [AArch64][GISel] Scalarize i128 vector shifts.   David Green via llvm-commits
• [llvm] 3a4b30e - [AArch64][GISel] Scalarize i128 ICmp and Select.   David Green via llvm-commits
• [llvm] [ctx_prof] Insert the ctx prof flattener after the module inliner (PR #107499)   David Li via llvm-commits
• [llvm] [Transforms] Vectorizing Mem2Reg Pass (PR #107688)   David Li via llvm-commits
• [llvm] [Transforms] Vectorizing Mem2Reg Pass (PR #107688)   David Li via llvm-commits
• [llvm] [Transforms] Vectorizing Mem2Reg Pass (PR #107688)   David Li via llvm-commits
• [llvm] [ctx_prof] Fix checks in `PGOCtxprofFlattening` (PR #108467)   David Li via llvm-commits
• [llvm] [ctx_prof] Fix checks in `PGOCtxprofFlattening` (PR #108467)   David Li via llvm-commits
• [llvm] [ctx_prof] Fix checks in `PGOCtxprofFlattening` (PR #108467)   David Li via llvm-commits
• [llvm] 1211d97 - [X86] Use SWAR techniques for some vector i8 shifts   David Majnemer via llvm-commits
• [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)   David Sherwood via llvm-commits
• [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)   David Sherwood via llvm-commits
• [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)   David Sherwood via llvm-commits
• [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)   David Sherwood via llvm-commits
• [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)   David Sherwood via llvm-commits
• [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)   David Sherwood via llvm-commits
• [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)   David Sherwood via llvm-commits
• [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)   David Sherwood via llvm-commits
• [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)   David Sherwood via llvm-commits
• [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)   David Sherwood via llvm-commits
• [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)   David Sherwood via llvm-commits
• [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)   David Sherwood via llvm-commits
• [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)   David Sherwood via llvm-commits
• [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)   David Sherwood via llvm-commits
• [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)   David Sherwood via llvm-commits
• [llvm] [NFC][Analysis] Add more SCEV tests for ptr inductions (PR #108210)   David Sherwood via llvm-commits
• [llvm] [LoopVectorize] Use new getUniqueLatchExitBlock routine (PR #108231)   David Sherwood via llvm-commits
• [llvm] [LoopVectorize] Use new getUniqueLatchExitBlock routine (PR #108231)   David Sherwood via llvm-commits
• [llvm] [LoopVectorize] Add support for vectorisation of more early exit loops (PR #88385)   David Sherwood via llvm-commits
• [llvm] [NFC][Analysis] Add more SCEV tests for ptr inductions (PR #108210)   David Sherwood via llvm-commits
• [llvm] [NFC][Analysis] Add more SCEV tests for ptr inductions (PR #108210)   David Sherwood via llvm-commits
• [llvm] [NFC][Analysis] Add more SCEV tests for ptr inductions (PR #108210)   David Sherwood via llvm-commits
• [llvm] [NFC][LoopVectorize] Avoid passing ScalarEvolution to VPlanTransforms::optimize (PR #108380)   David Sherwood via llvm-commits
• [llvm] [NFC][Analysis] Add more SCEV tests for ptr inductions (PR #108210)   David Sherwood via llvm-commits
• [llvm] [NFC][Analysis] Add more SCEV tests for ptr inductions (PR #108210)   David Sherwood via llvm-commits
• [llvm] [NFC][Analysis] Add more SCEV tests for ptr inductions (PR #108210)   David Sherwood via llvm-commits
• [llvm] [NFC][Analysis] Add more SCEV tests for ptr inductions (PR #108210)   David Sherwood via llvm-commits
• [llvm] [NFC][LoopVectorize] Avoid passing ScalarEvolution to VPlanTransforms::optimize (PR #108380)   David Sherwood via llvm-commits
• [llvm] [NFC][Analysis] Add more SCEV tests for ptr inductions (PR #108210)   David Sherwood via llvm-commits
• [llvm] [NFC][Analysis] Add more SCEV tests for ptr inductions (PR #108210)   David Sherwood via llvm-commits
• [llvm] [NFC][LoopVectorize] Avoid passing ScalarEvolution to VPlanTransforms::optimize (PR #108380)   David Sherwood via llvm-commits
• [llvm] [NFC][LoopVectorize] Dont pass LLVMContext to VPTypeAnalysis constructor (PR #108540)   David Sherwood via llvm-commits
• [llvm] [NFC][LoopVectorize] Rename variable in replaceVPBBWithIRVPBB (PR #108543)   David Sherwood via llvm-commits
• [llvm] [LoopVectorize] Add initial support to VPRegionBlock for multiple successors (PR #108563)   David Sherwood via llvm-commits
• [llvm] [VPlan] Add initial CFG simplification, removing BranchOnCond true. (PR #106748)   David Sherwood via llvm-commits
• [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)   David Sherwood via llvm-commits
• [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)   David Sherwood via llvm-commits
• [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)   David Sherwood via llvm-commits
• [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)   David Sherwood via llvm-commits
• [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)   David Sherwood via llvm-commits
• [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)   David Sherwood via llvm-commits
• [llvm] [hurd] Fix accessing f_type field of statvfs (PR #71851)   David Spickett via llvm-commits
• [llvm] [llvm][Docs] Update guide to include ``pip install lit`` (PR #106526)   David Spickett via llvm-commits
• [llvm] [llvm][Docs] Update guide to include ``pip install lit`` (PR #106526)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)   David Spickett via llvm-commits
• [llvm] [llvm][Docs] Improve the formatting of the Common Problems section (PR #108522)   David Spickett via llvm-commits
• [llvm] [llvm][Docs] Improve the formatting of the Common Problems section (PR #108522)   David Spickett via llvm-commits
• [llvm] [llvm][docs] Document how to get admin permissions for a worker (PR #108561)   David Spickett via llvm-commits
• [llvm] [llvm][docs] Document how to get admin permissions for a worker (PR #108561)   David Spickett via llvm-commits
• [llvm] [llvm][docs] Improve the formatting of the Common Problems section (PR #108522)   David Spickett via llvm-commits
• [llvm] [llvm][docs] Document how to get admin permissions for a worker (PR #108561)   David Spickett via llvm-commits
• [lld] [lld][WebAssembly] Fix used of uninitialized stack data with -wasm64 (PR #107780)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] Misc. refactoring in AsmTypeCheck (NFC) (PR #107978)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] Misc. refactoring in AsmTypeCheck (NFC) (PR #107978)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] Misc. refactoring in AsmTypeCheck (NFC) (PR #107978)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] Add a colon to type error message (PR #107980)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] Add assembly support for final EH proposal (PR #107917)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] Add assembly support for final EH proposal (PR #107917)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] Add assembly support for final EH proposal (PR #107917)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] Add assembly support for final EH proposal (PR #107917)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] Add assembly support for final EH proposal (PR #107917)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] Add assembly support for final EH proposal (PR #107917)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] Add assembly support for final EH proposal (PR #107917)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] Fix lane index size for f16x8 extract_lane. (PR #108118)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] Add load and store patterns for V8F16. (PR #108119)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] Support BUILD_VECTOR with F16x8. (PR #108117)   Derek Schuff via llvm-commits
• [lld] [lld][WebAssembly] Reject shared libraries when `-static`/`-Bstatic` is used (PR #108263)   Derek Schuff via llvm-commits
• [lld] [lld][WebAssembly] -r: force -Bstatic (PR #108264)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] Create separate file for EH assembly tests (PR #108472)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] Add type checking for 'throw' (PR #108641)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] Add more EH assembly test cases (PR #108654)   Derek Schuff via llvm-commits
• [llvm] [GlobalIsel] update inline-memset.mir test (PR #107874)   Dhruv Chawla via llvm-commits
• [llvm] [GlobalIsel][NFC] update inline-memset.mir test (PR #107874)   Dhruv Chawla via llvm-commits
• [llvm] [AArch64][GlobalISel] Implement selectVaStartAAPCS (PR #106979)   Dhruv Chawla via llvm-commits
• [llvm] [GlobalIsel] Visit ICmp (PR #105991)   Dhruv Chawla via llvm-commits
• [clang] [lldb] [llvm] Extending LLDB to work on AIX (PR #102601)   Dhruv Srivastava via llvm-commits
• [clang] [lldb] [llvm] Extending LLDB to work on AIX (PR #102601)   Dhruv Srivastava via llvm-commits
• [llvm] [amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic (PR #105822)   Diana Picus via llvm-commits
• [llvm] [amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic (PR #105822)   Diana Picus via llvm-commits
• [llvm] [amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic (PR #105822)   Diana Picus via llvm-commits
• [llvm] [amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic (PR #105822)   Diana Picus via llvm-commits
• [llvm] [amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic (PR #105822)   Diana Picus via llvm-commits
• [llvm] [amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic (PR #105822)   Diana Picus via llvm-commits
• [llvm] Revert "[amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic" (PR #108054)   Diana Picus via llvm-commits
• [llvm] Reland "[amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic" (#108054)" (PR #108173)   Diana Picus via llvm-commits
• [llvm] Reland "[amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic" (#108054)" (PR #108173)   Diana Picus via llvm-commits
• [llvm] AMDGPU: Remove flat/global fmin/fmax intrinsics (PR #105642)   Diana Picus via llvm-commits
• [llvm] Revert "Reland "[amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic" (#108054)"" (PR #108341)   Diana Picus via llvm-commits
• [llvm] Revert "Reland "[amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic" (#108054)"" (PR #108341)   Diana Picus via llvm-commits
• [llvm] Reland "[amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic" (PR #108512)   Diana Picus via llvm-commits
• [llvm] Reland "[amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic" (PR #108512)   Diana Picus via llvm-commits
• [llvm] Reland "[amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic" (PR #108512)   Diana Picus via llvm-commits
• [llvm] [mlir] [MLIR] Add f6E3M2FN type (PR #105573)   Diego Caballero via llvm-commits
• [llvm] [mlir] [MLIR] Add f6E3M2FN type (PR #105573)   Diego Caballero via llvm-commits
• [llvm] [llvm-objcopy][ELF] Disable huge section offset (PR #97036)   Djordje Todorovic via llvm-commits
• [llvm] [llvm-objcopy][ELF] Disable huge section offset (PR #97036)   Djordje Todorovic via llvm-commits
• [llvm] [llvm-objcopy][ELF] Disable huge section offset (PR #97036)   Djordje Todorovic via llvm-commits
• [llvm] [llvm-objcopy][ELF] Disable huge section offset (PR #97036)   Djordje Todorovic via llvm-commits
• [llvm] [llvm-objcopy][ELF] Disable huge section offset (PR #97036)   Djordje Todorovic via llvm-commits
• [llvm] [llvm-objcopy][ELF] Disable huge section offset (PR #97036)   Djordje Todorovic via llvm-commits
• [llvm] [llvm-objcopy][ELF] Disable huge section offset (PR #97036)   Djordje Todorovic via llvm-commits
• [llvm] [llvm-objcopy][ELF] Disable huge section offset (PR #97036)   Djordje Todorovic via llvm-commits
• [llvm] [DLCov 1/5] Add CMake option to enable enhanced line number coverage tracking (PR #107278)   Djordje Todorovic via llvm-commits
• [llvm] [llvm-objcopy][ELF] Disable huge section offset (PR #97036)   Djordje Todorovic via llvm-commits
• [llvm] [llvm-objcopy][ELF] Disable huge section offset (PR #97036)   Djordje Todorovic via llvm-commits
• [llvm] [llvm-objcopy][ELF] Disable huge section offset (PR #97036)   Djordje Todorovic via llvm-commits
• [llvm] [llvm-objcopy][ELF] Disable huge section offset (PR #97036)   Djordje Todorovic via llvm-commits
• [llvm] [llvm-objcopy][ELF] Disable huge section offset (PR #97036)   Djordje Todorovic via llvm-commits
• [llvm] [llvm-objcopy][ELF] Disable huge section offset (PR #97036)   Djordje Todorovic via llvm-commits
• [clang] [llvm] [SPIRV][RFC] Rework / extend support for memory scopes (PR #106429)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Expose an API call to initialize SPIRV target and translate input LLVM IR module to SPIR-V (PR #107216)   Dmitry Sidorov via llvm-commits
• [clang] [llvm] [SPIRV][RFC] Rework / extend support for memory scopes (PR #106429)   Dmitry Sidorov via llvm-commits
• [clang] [llvm] [SPIRV][RFC] Rework / extend support for memory scopes (PR #106429)   Dmitry Sidorov via llvm-commits
• [clang] [llvm] [SPIRV][RFC] Rework / extend support for memory scopes (PR #106429)   Dmitry Sidorov via llvm-commits
• [clang] [llvm] [SPIRV][RFC] Rework / extend support for memory scopes (PR #106429)   Dmitry Sidorov via llvm-commits
• [clang] [llvm] [SPIRV][RFC] Rework / extend support for memory scopes (PR #106429)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Emit DebugTypeBasic for NonSemantic DI (PR #106980)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Emit DebugTypeBasic for NonSemantic DI (PR #106980)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Emit DebugTypeBasic for NonSemantic DI (PR #106980)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Emit DebugTypeBasic for NonSemantic DI (PR #106980)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Emit DebugTypeBasic for NonSemantic DI (PR #106980)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Emit DebugTypeBasic for NonSemantic DI (PR #106980)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Emit DebugTypeBasic for NonSemantic DI (PR #106980)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Emit DebugTypeBasic for NonSemantic DI (PR #106980)   Dmitry Sidorov via llvm-commits
• [llvm] [MIR] Allow overriding isSSA, noPhis, noVRegs in MIR input (PR #108546)   Dominik Montada via llvm-commits
• [polly] fix(polly/**.py): fix comparison to True/False (PR #94042)   Eisuke Kawashima via llvm-commits
• [llvm] fix(llvm/**.py): fix comparison to True/False (PR #94040)   Eisuke Kawashima via llvm-commits
• [polly] fix(polly/**.py): fix comparison to None (PR #94021)   Eisuke Kawashima via llvm-commits
• [llvm] fix(cross-project-tests/**.py): fix comparison to None (PR #94016)   Eisuke Kawashima via llvm-commits
• [compiler-rt] fix(compiler-rt/**.py): fix comparison to None (PR #94015)   Eisuke Kawashima via llvm-commits
• [clang] [lld] [llvm] [clang][MIPS] Add support for mipsel-windows-* targets (PR #107744)   Eli Friedman via llvm-commits
• [clang] [llvm] [ARM] Save floating point registers and status registers with save_fp function attribute (PR #89654)   Eli Friedman via llvm-commits
• [llvm] [llvm][ARM]Add ARM widen strings pass (PR #107120)   Eli Friedman via llvm-commits
• [llvm] [llvm][ARM]Add ARM widen strings pass (PR #107120)   Eli Friedman via llvm-commits
• [llvm] [llvm][ARM]Add ARM widen strings pass (PR #107120)   Eli Friedman via llvm-commits
• [llvm] [llvm][ARM]Add ARM widen strings pass (PR #107120)   Eli Friedman via llvm-commits
• [llvm] Add target-byteorder for cases where endian in target triple is what matters (PR #107915)   Eli Friedman via llvm-commits
• [llvm] Add target-byteorder for cases where endian in target triple is what matters (PR #107915)   Eli Friedman via llvm-commits
• [llvm] Add target-byteorder for cases where endian in target triple is what matters (PR #107915)   Eli Friedman via llvm-commits
• [llvm] [llvm][ARM]Add ARM widen strings pass (PR #107120)   Eli Friedman via llvm-commits
• [llvm] [InitUndef] Enable the InitUndef pass on AArch64 (PR #108353)   Eli Friedman via llvm-commits
• [clang] [compiler-rt] [llvm] [FMV][AArch64] Remove feature sha1 from FMV. (PR #108383)   Eli Friedman via llvm-commits
• [llvm] [NFC][Analysis] Add more SCEV tests for ptr inductions (PR #108210)   Eli Friedman via llvm-commits
• [llvm] [NFC][Analysis] Add more SCEV tests for ptr inductions (PR #108210)   Eli Friedman via llvm-commits
• [llvm] [CGData][MachineOutliner] Global Outlining (PR #90074)   Ellis Hoag via llvm-commits
• [llvm] Attempt to fix [CGData][MachineOutliner] Global Outlining (#90074) (PR #108037)   Ellis Hoag via llvm-commits
• [lld] [CGData] LLD for MachO (PR #90166)   Ellis Hoag via llvm-commits
• [lld] [CGData] LLD for MachO (PR #90166)   Ellis Hoag via llvm-commits
• [lld] [CGData] LLD for MachO (PR #90166)   Ellis Hoag via llvm-commits
• [lld] [CGData] LLD for MachO (PR #90166)   Ellis Hoag via llvm-commits
• [lld] [CGData] LLD for MachO (PR #90166)   Ellis Hoag via llvm-commits
• [lld] [CGData] LLD for MachO (PR #90166)   Ellis Hoag via llvm-commits
• [llvm] [SLP] Move some of X86 tests to common directory (PR #107587)   Elvina Yakubova via llvm-commits
• [llvm] [SLP] Move some of X86 tests to common directory (PR #107587)   Elvina Yakubova via llvm-commits
• [llvm] [SLP] Move some of X86 tests to common directory (PR #107587)   Elvina Yakubova via llvm-commits
• [llvm] [SLP] Better way to filter target-specific tests (PR #106720)   Elvina Yakubova via llvm-commits
• [llvm] [RISCV][TTI] Add vp.cmp intrinsic cost with functionalOPC. (PR #107504)   Elvis Wang via llvm-commits
• [llvm] [RISCV][TTI] Add vp.cmp intrinsic cost with functionalOPC. (PR #107504)   Elvis Wang via llvm-commits
• [llvm] [RISCV][TTI] Add vp.cmp intrinsic cost with functionalOPC. (PR #107504)   Elvis Wang via llvm-commits
• [llvm] [VPlan] Implement VPReductionRecipe::computeCost(). NFC (PR #107790)   Elvis Wang via llvm-commits
• [llvm] [RISCV][TTI] Add vp.cmp intrinsic cost with functionalOPC. (PR #107504)   Elvis Wang via llvm-commits
• [llvm] [LV][VPlan] Add initial support for CSA vectorization (PR #106560)   Elvis Wang via llvm-commits
• [llvm] [LV][VPlan] Add initial support for CSA vectorization (PR #106560)   Elvis Wang via llvm-commits
• [llvm] [LV][VPlan] Add initial support for CSA vectorization (PR #106560)   Elvis Wang via llvm-commits
• [llvm] [LV][VPlan] Add initial support for CSA vectorization (PR #106560)   Elvis Wang via llvm-commits
• [llvm] [LV][VPlan] Add initial support for CSA vectorization (PR #106560)   Elvis Wang via llvm-commits
• [llvm] [LV][VPlan] Add initial support for CSA vectorization (PR #106560)   Elvis Wang via llvm-commits
• [llvm] [LV][VPlan] Add initial support for CSA vectorization (PR #106560)   Elvis Wang via llvm-commits
• [llvm] [llvm-ml] Fix RIP-relative addressing for ptr operands (PR #107618)   Eric Astor via llvm-commits
• [llvm] [llvm-ml] Fix RIP-relative addressing for ptr operands (PR #107618)   Eric Astor via llvm-commits
• [llvm] [llvm-ml] Fix RIP-relative addressing for ptr operands (PR #107618)   Eric Astor via llvm-commits
• [llvm] [llvm-ml] Fix RIP-relative addressing for ptr operands (PR #107618)   Eric Astor via llvm-commits
• [llvm] [llvm-ml] Fix RIP-relative addressing for ptr operands (PR #107618)   Eric Astor via llvm-commits
• [llvm] [llvm-ml] Fix RIP-relative addressing for ptr operands (PR #107618)   Eric Astor via llvm-commits
• [llvm] Reland [llvm-ml] Fix RIP-relative addressing for ptr operands (PR #108061)   Eric Astor via llvm-commits
• [compiler-rt] [llvm] [AArch64] Implement INIT/ADJUST_TRAMPOLINE (PR #70267)   Erik Schnetter via llvm-commits
• [llvm] [X86][GlobalISel] Enable scalar versions of G_UITOFP and G_FPTOUI (PR #100079)   Evgenii Kudriashov via llvm-commits
• [llvm] [X86][GlobalISel] Enable scalar versions of G_UITOFP and G_FPTOUI (PR #100079)   Evgenii Kudriashov via llvm-commits
• [llvm] [X86][GlobalISel] Enable scalar versions of G_UITOFP and G_FPTOUI (PR #100079)   Evgenii Kudriashov via llvm-commits
• [llvm] [X86][GlobalISel] Enable scalar versions of G_UITOFP and G_FPTOUI (PR #100079)   Evgenii Kudriashov via llvm-commits
• [llvm] [CodeGen] Enhance inline asm constraint diagnostics (PR #101354)   Evgenii Kudriashov via llvm-commits
• [llvm] [CodeGen] Enhance inline asm constraint diagnostics (PR #101354)   Evgenii Kudriashov via llvm-commits
• [llvm] [ADT][NFC] Clang-format DenseMap and DenseSet (PR #108162)   Fangrui Song via llvm-commits
• [lld] [lld] select a default eflags for hexagon (PR #108431)   Fangrui Song via llvm-commits
• [lld] [lld] select a default eflags for hexagon (PR #108431)   Fangrui Song via llvm-commits
• [lld] [lld][WebAssembly] -r: force -Bstatic (PR #108264)   Fangrui Song via llvm-commits
• [lld] [LLD][RISCV] Error on PCREL_LO referencing other Section (PR #107558)   Fangrui Song via llvm-commits
• [lld] [LLD][RISCV] Error on PCREL_LO referencing other Section (PR #107558)   Fangrui Song via llvm-commits
• [clang] [lld] [llvm] Deprecate the `-fbasic-block-sections=labels` option. (PR #107494)   Fangrui Song via llvm-commits
• [clang] [lld] [llvm] Deprecate the `-fbasic-block-sections=labels` option. (PR #107494)   Fangrui Song via llvm-commits
• [clang] [lld] [llvm] Deprecate the `-fbasic-block-sections=labels` option. (PR #107494)   Fangrui Song via llvm-commits
• [clang] [lld] [llvm] Deprecate the `-fbasic-block-sections=labels` option. (PR #107494)   Fangrui Song via llvm-commits
• [llvm] [Policy] Replace "code owners" with "maintainers" (PR #107384)   Fangrui Song via llvm-commits
• [lld] [ELF][WASM] Update datalayout strings to latest version (PR #107276)   Fangrui Song via llvm-commits
• [llvm] [RISCV][docs] GP Relaxation and Small Data Limit (PR #108592)   Fangrui Song via llvm-commits
• [llvm] [RISCV][docs] GP Relaxation and Small Data Limit (PR #108592)   Fangrui Song via llvm-commits
• [llvm] [RISCV][docs] GP Relaxation and Small Data Limit (PR #108592)   Fangrui Song via llvm-commits
• [llvm] [ADT] Remove DenseMap::{getOrInsertDefault,FindAndConstruct} (PR #108678)   Fangrui Song via llvm-commits
• [lld] 40e8e4d - [ELF] Move partitions into ctx. NFC   Fangrui Song via llvm-commits
• [lld] 1cd0752 - [ELF] Rename unique_saver to uniqueSaver. NFC   Fangrui Song via llvm-commits
• [lld] 2531b46 - [ELF] Move InStruct into Ctx. NFC   Fangrui Song via llvm-commits
• [lld] e88b7ff - [ELF] Move InStruct into Ctx. NFC   Fangrui Song via llvm-commits
• [llvm] [SPIRV] Add sign intrinsic part 1 (PR #101987)   Farzon Lotfi via llvm-commits
• [llvm] [SPIRV] Add sign intrinsic part 1 (PR #101987)   Farzon Lotfi via llvm-commits
• [llvm] [SPIRV] Add sign intrinsic part 1 (PR #101987)   Farzon Lotfi via llvm-commits
• [llvm] [SPIRV] Add sign intrinsic part 1 (PR #101987)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [clang][hlsl] Add atan2 intrinsic part 1 (PR #107923)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [clang][hlsl] Add atan2 intrinsic part 1 (PR #107923)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [clang][hlsl] Add atan2 intrinsic part 1 (PR #107923)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [clang][hlsl] Add atan2 intrinsic part 1 (PR #107923)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL] Implement elementwise popcount (PR #108121)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL] Implement elementwise popcount (PR #108121)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL] Implement elementwise popcount (PR #108121)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL] Implement elementwise popcount (PR #108121)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL] Implement elementwise popcount (PR #108121)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL] Implement elementwise popcount (PR #108121)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL] Implement elementwise popcount (PR #108121)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add step builtins and step HLSL function to DirectX and SPIR-V backend (PR #106471)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add step builtins and step HLSL function to DirectX and SPIR-V backend (PR #106471)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add step builtins and step HLSL function to DirectX and SPIR-V backend (PR #106471)   Farzon Lotfi via llvm-commits
• [llvm] [LegacyPM][DirectX] Add legacy scalarizer back for use in the DirectX backend (PR #107427)   Farzon Lotfi via llvm-commits
• [llvm] [LegacyPM][DirectX] Add legacy scalarizer back for use in the DirectX backend (PR #107427)   Farzon Lotfi via llvm-commits
• [llvm] [LegacyPM][DirectX] Add legacy scalarizer back for use in the DirectX backend (PR #107427)   Farzon Lotfi via llvm-commits
• [llvm] [LegacyPM][DirectX] Add legacy scalarizer back for use in the DirectX backend (PR #107427)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL] Implement elementwise popcount (PR #108121)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL] Implement elementwise popcount (PR #108121)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL] Implement elementwise popcount (PR #108121)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL] Implement elementwise popcount (PR #108121)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL] Implement elementwise popcount (PR #108121)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL] Implement elementwise popcount (PR #108121)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL] Implement elementwise popcount (PR #108121)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL] Implement elementwise popcount (PR #108121)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL] Implement elementwise popcount (PR #108121)   Farzon Lotfi via llvm-commits
• [llvm] [DirectX] fix fail test (PR #108468)   Farzon Lotfi via llvm-commits
• [llvm] [DirectX] Remove rcp dx intrinsic (PR #108626)   Farzon Lotfi via llvm-commits
• [llvm] [DirectX] Remove rcp dx intrinsic (PR #108626)   Farzon Lotfi via llvm-commits
• [llvm] [NFC][DirectX] Remove rcp dx intrinsic (PR #108626)   Farzon Lotfi via llvm-commits
• [llvm] [NFC][DirectX] Remove rcp dx intrinsic (PR #108626)   Farzon Lotfi via llvm-commits
• [llvm] [Scalarizer][DirectX] Add support for scalarization of Target intrinsics (PR #108776)   Farzon Lotfi via llvm-commits
• [llvm] [Scalarizer][DirectX] Add support for scalarization of Target intrinsics (PR #108776)   Farzon Lotfi via llvm-commits
• [llvm] [NVPTX] Improve copy avoidance during lowering. (PR #106423)   Fei Peng via llvm-commits
• [llvm] Add DIExpression::foldConstantMath to CoroSplit (PR #107933)   Felipe de Azevedo Piovezan via llvm-commits
• [llvm] Add DIExpression::foldConstantMath to CoroSplit (PR #107933)   Felipe de Azevedo Piovezan via llvm-commits
• [llvm] [CoroSplit][DebugInfo] Adjust heuristic for moving DIScope of funclets (PR #108611)   Felipe de Azevedo Piovezan via llvm-commits
• [llvm] [CoroSplit][DebugInfo] Adjust heuristic for moving DIScope of funclets (PR #108611)   Felipe de Azevedo Piovezan via llvm-commits
• [llvm] [CoroSplit][DebugInfo] Adjust heuristic for moving DIScope of funclets (PR #108611)   Felipe de Azevedo Piovezan via llvm-commits
• [llvm] [AArch64] Add costs for FP conversions with v3f32. (PR #107303)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Add costs for FP conversions with v3f32. (PR #107303)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Add costs for FP conversions with v3f32. (PR #107303)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Add costs for FP conversions with v3f32. (PR #107303)   Florian Hahn via llvm-commits
• [llvm] e25eb14 - [ConstraintElim] Add tests for loops with chained header conditions.   Florian Hahn via llvm-commits
• [llvm] aa158bf - [LV] Update tests to replace some code with loop varying instructions.   Florian Hahn via llvm-commits
• [llvm] 1a5a1e9 - [VPlan] Assert that VFxUF is always used.   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)   Florian Hahn via llvm-commits
• [llvm] [test-suite] Document the LLVM test-suite benchmark apps (PR #105843)   Florian Hahn via llvm-commits
• [llvm] [LV]Initial support for safe distance in predicated DataWithEVL vectorization mode. (PR #102897)   Florian Hahn via llvm-commits
• [llvm] [BasicTTI] Use getTypeLegalizationCost to generalize vector cast cost. (PR #107303)   Florian Hahn via llvm-commits
• [llvm] [BasicTTI] Use getTypeLegalizationCost to generalize vector cast cost. (PR #107303)   Florian Hahn via llvm-commits
• [llvm] [IPSCCP] Infer attributes on arguments (PR #107114)   Florian Hahn via llvm-commits
• [llvm] [Transform] Remove redundant condition (PR #107893)   Florian Hahn via llvm-commits
• [llvm] [Transform] Remove redundant condition (PR #107893)   Florian Hahn via llvm-commits
• [llvm] [Transform] Remove redundant condition (PR #107893)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial loop-invariant code motion transform. (PR #107894)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial VPScalarEvolution, use to get trip count SCEV (NFC) (PR #94464)   Florian Hahn via llvm-commits
• [llvm] [SimplifyCFG] Preserve common TBAA metadata when hoisting instructions. (PR #97158)   Florian Hahn via llvm-commits
• [llvm] [SimplifyCFG] Preserve common TBAA metadata when hoisting instructions. (PR #97158)   Florian Hahn via llvm-commits
• [llvm] 3403438 - [VPlan] Consistently use VTC for vector trip count in vplan-printing.ll.   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   Florian Hahn via llvm-commits
• [llvm] f58312e - [ConstraintElim] Add tests with exiting latch.   Florian Hahn via llvm-commits
• [llvm] [ConstraintElim] Generalize IV logic to chain of exiting blocks. (PR #108031)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorize] Amend check for IV increments in collectUsersInEntryB… (PR #108020)   Florian Hahn via llvm-commits
• [llvm] [ConstraintElim] Generalize IV logic to chain of exiting blocks. (PR #108031)   Florian Hahn via llvm-commits
• [llvm] [ConstraintElim] Generalize IV logic to chain of exiting blocks. (PR #108031)   Florian Hahn via llvm-commits
• [llvm] [ConstraintElim] Generalize IV logic to chain of exiting blocks. (PR #108031)   Florian Hahn via llvm-commits
• [llvm] [LV]Initial support for safe distance in predicated DataWithEVL vectorization mode. (PR #102897)   Florian Hahn via llvm-commits
• [llvm] e3c537f - [VPlan] Consider non-header phis in planContainsAdditionalSimp.   Florian Hahn via llvm-commits
• [llvm] [LoopDeletion] Unblock loop deletion with `llvm.experimental.noalias.scope.decl` (PR #108144)   Florian Hahn via llvm-commits
• [llvm] [LV] Reuse VPReplicateRecipe to handle scalar stores in exit block. (PR #106342)   Florian Hahn via llvm-commits
• [llvm] [LV] Reuse VPReplicateRecipe to handle scalar stores in exit block. (PR #106342)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial CFG simplification, removing BranchOnCond true. (PR #106748)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial CFG simplification, removing BranchOnCond true. (PR #106748)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial CFG simplification, removing BranchOnCond true. (PR #106748)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   Florian Hahn via llvm-commits
• [llvm] [VPlan][NFC] Fix the value name of VECTOR_GEP (PR #107544)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize histogram operations (PR #99851)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize histogram operations (PR #99851)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize histogram operations (PR #99851)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize histogram operations (PR #99851)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize histogram operations (PR #99851)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Set MaxInterleaving to 4 for Neoverse V2 (PR #100385)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize Epilogues for loops with small VF but high IC (PR #108190)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize Epilogues for loops with small VF but high IC (PR #108190)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize Epilogues for loops with small VF but high IC (PR #108190)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize Epilogues for loops with small VF but high IC (PR #108190)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize Epilogues for loops with small VF but high IC (PR #108190)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorize] Amend check for IV increments in collectUsersInEntryB… (PR #108020)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorize] Amend check for IV increments in collectUsersInEntryB… (PR #108020)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorize] Amend check for IV increments in collectUsersInEntryB… (PR #108020)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorize] Amend check for IV increments in collectUsersInEntryB… (PR #108020)   Florian Hahn via llvm-commits
• [llvm] 1741b9c - [LV] Generalize check lines for interleave group costs.   Florian Hahn via llvm-commits
• [llvm] ea83e1c - [LV] Assign cost to all interleave members when not interleaving.   Florian Hahn via llvm-commits
• [llvm] ed41497 - [LAA] Also reset CanUseDiffCheck in RTPointerChecking::reset().   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use pointer to member 0 as VPInterleaveRecipe's pointer arg. (PR #106431)   Florian Hahn via llvm-commits
• [llvm] [NFC][Analysis] Add more SCEV tests for ptr inductions (PR #108210)   Florian Hahn via llvm-commits
• [llvm] [NFC][Analysis] Add more SCEV tests for ptr inductions (PR #108210)   Florian Hahn via llvm-commits
• [llvm] [NFC][Analysis] Add more SCEV tests for ptr inductions (PR #108210)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Remove loop region in optimizeForVFAndUF. (PR #108378)   Florian Hahn via llvm-commits
• [llvm] [LoopUnswitch] Remove redundant condition. (NFC) (PR #107893)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Implementation of onlyFirstLaneUsed for VPLiveOut class (PR #93513)   Florian Hahn via llvm-commits
• [llvm] [WIP][LV] Ignore some costs when loop gets fully unrolled (PR #106699)   Florian Hahn via llvm-commits
• [llvm] LoopSimplify: strip unused pass dependencies (NFC) (PR #107379)   Florian Hahn via llvm-commits
• [llvm] 71cb781 - [LV] Remove stale completeLoopSkeleton (NFCI).   Florian Hahn via llvm-commits
• [llvm] 08d294d - [VPlan] Simplify VPBuilder insert point when adding users in exit block.   Florian Hahn via llvm-commits
• [llvm] [NFC][Analysis] Add more SCEV tests for ptr inductions (PR #108210)   Florian Hahn via llvm-commits
• [llvm] [NFC][Analysis] Add more SCEV tests for ptr inductions (PR #108210)   Florian Hahn via llvm-commits
• [llvm] [NFC][Analysis] Add more SCEV tests for ptr inductions (PR #108210)   Florian Hahn via llvm-commits
• [llvm] [NFC][LoopVectorize] Avoid passing ScalarEvolution to VPlanTransforms::optimize (PR #108380)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)   Florian Hahn via llvm-commits
• [llvm] 76fd69b - [VPlan] Simplify VPBuilder insert point when live outs for FORs.   Florian Hahn via llvm-commits
• [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)   Florian Hahn via llvm-commits
• [llvm] LV: clamp VF with TC only when scalar epilogue is needed (PR #91253)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)   Florian Hahn via llvm-commits
• [llvm] [LV] Rewrite UDiv A, B -> UDiv A, UMax(B, 1) in trip counts if needed. (PR #92177)   Florian Hahn via llvm-commits
• [llvm] LV: clamp VF with TC only when scalar epilogue is needed (PR #91253)   Florian Hahn via llvm-commits
• [llvm] VPlan/Builder: inline VPBuilder::createICmp (NFC) (PR #105650)   Florian Hahn via llvm-commits
• [llvm] [NFC][LoopVectorize] Dont pass LLVMContext to VPTypeAnalysis constructor (PR #108540)   Florian Hahn via llvm-commits
• [llvm] [ValueTracking] AllowEphemerals for alignment assumptions. (PR #108632)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   Florian Hahn via llvm-commits
• [llvm] cfe3f5f - [VPlan] Remove unneeded ExitBB variable after f0c5caa814.   Florian Hahn via llvm-commits
• [llvm] f66509b - [VPlan] Clarify comment for replaceVPBBWithIRVPBB and add assert (NFCI).   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   Florian Hahn via llvm-commits
• [llvm] 012dbec - [VPlan] Handle ForceTargetInstructionCost in during precomputeCosts.   Florian Hahn via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   Florian Hahn via llvm-commits
• [llvm] 6749f2b - [LV] Add pointer induction test variant with inbounds, remove TODO.   Florian Hahn via llvm-commits
• [llvm] [SCEV] Add predicate in SolveLinEq to ensure B is a multiple of A. (PR #108777)   Florian Hahn via llvm-commits
• [llvm] [NFC][Analysis] Add more SCEV tests for ptr inductions (PR #108210)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Add predicate in SolveLinEq to ensure B is a multiple of A. (PR #108777)   Florian Hahn via llvm-commits
• [clang] [compiler-rt] [UBSan] Diagnose assumption violation (PR #104741)   Florian Mayer via llvm-commits
• [compiler-rt] [compiler-rt][rtsan] Use Die instead of exit, define cf.exitcode (PR #107635)   Florian Mayer via llvm-commits
• [compiler-rt] [compiler-rt][rtsan] Use Die instead of exit, define cf.exitcode (PR #107635)   Florian Mayer via llvm-commits
• [compiler-rt] [compiler-rt][rtsan] Use Die instead of exit, define cf.exitcode (PR #107635)   Florian Mayer via llvm-commits
• [compiler-rt] [compiler-rt][rtsan] Improve error message wording to match ASan style (PR #107620)   Florian Mayer via llvm-commits
• [compiler-rt] [NFC][sanitizer] Extract GetDTLSRange (PR #107934)   Florian Mayer via llvm-commits
• [compiler-rt] [NFC][sanitizer] Extract GetDTLSRange (PR #107934)   Florian Mayer via llvm-commits
• [compiler-rt] [sanitizer] Add CHECKs to validate calculated TLS range (PR #107941)   Florian Mayer via llvm-commits
• [llvm] [HWASan] optimize AttrInfer fix for selective HWASan (PR #108111)   Florian Mayer via llvm-commits
• [compiler-rt] Revert "[sanitizer] Add CHECKs to validate calculated TLS range" (PR #108112)   Florian Mayer via llvm-commits
• [llvm] [HWASan] optimize AttrInfer fix for selective HWASan (PR #108111)   Florian Mayer via llvm-commits
• [llvm] [HWASan] optimize AttrInfer fix for selective HWASan (PR #108111)   Florian Mayer via llvm-commits
• [llvm] [SLP]Improve/fix subvectors in gather/buildvector nodes handling (PR #104144)   Florian Mayer via llvm-commits
• [llvm] [Instrumentation] Do not run sanitizers for naked functions (PR #108552)   Florian Mayer via llvm-commits
• [llvm] [SLP]Improve/fix subvectors in gather/buildvector nodes handling (PR #104144)   Florian Mayer via llvm-commits
• [llvm] [Instrumentation] Do not run sanitizers for naked functions (PR #108552)   Florian Mayer via llvm-commits
• [llvm] [Instrumentation] Do not run sanitizers for naked functions (PR #108552)   Florian Mayer via llvm-commits
• [compiler-rt] [sanitizers] convert some errant CRLF line endings to LF (PR #108454)   Florian Mayer via llvm-commits
• [llvm] [CodeGen] Fix InstructionCount remarks for MI bundles (PR #107621)   Francis Visoiu Mistrih via llvm-commits
• [llvm] [CodeGen] Fix InstructionCount remarks for MI bundles (PR #107621)   Francis Visoiu Mistrih via llvm-commits
• [llvm] [mlir] eliminating g++ warnings (PR #105520)   Frank Schlimbach via llvm-commits
• [llvm] [mlir] eliminating g++ warnings (PR #105520)   Frank Schlimbach via llvm-commits
• [llvm] [mlir] eliminating g++ warnings (PR #105520)   Frank Schlimbach via llvm-commits
• [llvm] [mlir] eliminating g++ warnings (PR #105520)   Frank Schlimbach via llvm-commits
• [llvm] [AMDGPU] Fix leak and self-assignment in copy assignment operator (PR #107847)   Fraser Cormack via llvm-commits
• [llvm] [AMDGPU] Fix leak and self-assignment in copy assignment operator (PR #107847)   Fraser Cormack via llvm-commits
• [llvm] [AMDGPU] Fix leak and self-assignment in copy assignment operator (PR #107847)   Fraser Cormack via llvm-commits
• [llvm] [AMDGPU] Remove dead code in SIISelLowering (NFC) (PR #108198)   Fraser Cormack via llvm-commits
• [llvm] [LLVM][NVPTX] Add support for tensormap.cp_fenceproxy (PR #107555)   Gautam Chakrabarti via llvm-commits
• [llvm] [AMDGPU][MC] Implement fft and rotate modes for ds_swizzle_b32 (PR #108064)   Georg Lehmann via llvm-commits
• [llvm] [AMDGPU][MC] Implement fft and rotate modes for ds_swizzle_b32 (PR #108064)   Georg Lehmann via llvm-commits
• [llvm] [AMDGPU] Assert no bad shift operations will happen (PR #108416)   Georgi Mirazchiyski via llvm-commits
• [llvm] [AMDGPU] Assert no bad shift operations will happen (PR #108416)   Georgi Mirazchiyski via llvm-commits
• [llvm] [AMDGPU] Assert no bad shift operations will happen (PR #108416)   Georgi Mirazchiyski via llvm-commits
• [llvm] [AMDGPU] Assert no bad shift operations will happen (PR #108416)   Georgi Mirazchiyski via llvm-commits
• [llvm] [AMDGPU] Assert no bad shift operations will happen (PR #108416)   Georgi Mirazchiyski via llvm-commits
• [llvm] [AMDGPU] Assert no bad shift operations will happen (PR #108416)   Georgi Mirazchiyski via llvm-commits
• [llvm] [AMDGPU] Default-initialize uninitialized class member variables (PR #108428)   Georgi Mirazchiyski via llvm-commits
• [llvm] [NFC][AMDGPU] Assert no bad shift operations will happen (PR #108416)   Georgi Mirazchiyski via llvm-commits
• [llvm] AMDGPU: Remove global/flat atomic fadd intrinics (PR #97051)   Gheorghe-Teodor Bercea via llvm-commits
• [llvm] AMDGPU: Remove flat/global fmin/fmax intrinsics (PR #105642)   Gheorghe-Teodor Bercea via llvm-commits
• [llvm] AMDGPU: Remove flat/global fmin/fmax intrinsics (PR #105642)   Gheorghe-Teodor Bercea via llvm-commits
• [llvm] AMDGPU: Remove flat/global fmin/fmax intrinsics (PR #105642)   Gheorghe-Teodor Bercea via llvm-commits
• [llvm] AMDGPU: Remove flat/global fmin/fmax intrinsics (PR #105642)   Gheorghe-Teodor Bercea via llvm-commits
• [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)   Graham Hunter via llvm-commits
• [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)   Graham Hunter via llvm-commits
• [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)   Graham Hunter via llvm-commits
• [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)   Graham Hunter via llvm-commits
• [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)   Graham Hunter via llvm-commits
• [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)   Graham Hunter via llvm-commits
• [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)   Graham Hunter via llvm-commits
• [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)   Graham Hunter via llvm-commits
• [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)   Graham Hunter via llvm-commits
• [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)   Graham Hunter via llvm-commits
• [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)   Graham Hunter via llvm-commits
• [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)   Graham Hunter via llvm-commits
• [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)   Graham Hunter via llvm-commits
• [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)   Graham Hunter via llvm-commits
• [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)   Graham Hunter via llvm-commits
• [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)   Graham Hunter via llvm-commits
• [llvm] [LV] Vectorize histogram operations (PR #99851)   Graham Hunter via llvm-commits
• [llvm] [LV] Vectorize histogram operations (PR #99851)   Graham Hunter via llvm-commits
• [llvm] [LV] Vectorize histogram operations (PR #99851)   Graham Hunter via llvm-commits
• [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)   Graham Hunter via llvm-commits
• [llvm] [SPIRV] Add sign intrinsic part 1 (PR #101987)   Greg Roth via llvm-commits
• [llvm] [SPIRV] Add sign intrinsic part 1 (PR #101987)   Greg Roth via llvm-commits
• [llvm] [SPIRV] Add sign intrinsic part 1 (PR #101987)   Greg Roth via llvm-commits
• [llvm] [SPIRV] Add sign intrinsic part 1 (PR #101987)   Greg Roth via llvm-commits
• [llvm] [VectorCombine] Add foldShuffleOfIntrinsics. (PR #106502)   Han-Kuan Chen via llvm-commits
• [llvm] [VectorCombine] Add foldShuffleOfIntrinsics. (PR #106502)   Han-Kuan Chen via llvm-commits
• [llvm] [VectorCombine] Add foldShuffleOfIntrinsics. (PR #106502)   Han-Kuan Chen via llvm-commits
• [llvm] [VectorCombine] Add foldShuffleOfIntrinsics. (PR #106502)   Han-Kuan Chen via llvm-commits
• [llvm] [VectorCombine] Add foldShuffleOfIntrinsics. (PR #106502)   Han-Kuan Chen via llvm-commits
• [llvm] [VectorCombine] Add foldShuffleOfIntrinsics. (PR #106502)   Han-Kuan Chen via llvm-commits
• [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)   Haopeng Liu via llvm-commits
• [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)   Haopeng Liu via llvm-commits
• [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)   Haopeng Liu via llvm-commits
• [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)   Haopeng Liu via llvm-commits
• [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)   Haopeng Liu via llvm-commits
• [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)   Haopeng Liu via llvm-commits
• [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)   Haopeng Liu via llvm-commits
• [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)   Haopeng Liu via llvm-commits
• [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)   Haopeng Liu via llvm-commits
• [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)   Haopeng Liu via llvm-commits
• [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)   Haopeng Liu via llvm-commits
• [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)   Haopeng Liu via llvm-commits
• [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)   Haopeng Liu via llvm-commits
• [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)   Haopeng Liu via llvm-commits
• [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)   Haopeng Liu via llvm-commits
• [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)   Haopeng Liu via llvm-commits
• [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)   Haopeng Liu via llvm-commits
• [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)   Haopeng Liu via llvm-commits
• [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)   Haopeng Liu via llvm-commits
• [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)   Haopeng Liu via llvm-commits
• [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)   Haopeng Liu via llvm-commits
• [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)   Haopeng Liu via llvm-commits
• [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)   Haopeng Liu via llvm-commits
• [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)   Haopeng Liu via llvm-commits
• [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)   Haopeng Liu via llvm-commits
• [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)   Haopeng Liu via llvm-commits
• [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)   Haopeng Liu via llvm-commits
• [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)   Haopeng Liu via llvm-commits
• [llvm] [RFC] IR: Define noalias.addrspace metadata (PR #102461)   Harald van Dijk via llvm-commits
• [llvm] [LoopVectorize] Amend check for IV increments in collectUsersInEntryB… (PR #108020)   Hari Limaye via llvm-commits
• [llvm] [LoopVectorize] Amend check for IV increments in collectUsersInEntryB… (PR #108020)   Hari Limaye via llvm-commits
• [llvm] [LoopVectorize] Amend check for IV increments in collectUsersInEntryB… (PR #108020)   Hari Limaye via llvm-commits
• [llvm] [LoopVectorize] Amend check for IV increments in collectUsersInEntryB… (PR #108020)   Hari Limaye via llvm-commits
• [llvm] [LV] Amend check for IV increments in collectUsersInEntryBlock (PR #108020)   Hari Limaye via llvm-commits
• [llvm] [LV] Amend check for IV increments in collectUsersInEntryBlock (PR #108020)   Hari Limaye via llvm-commits
• [llvm] [LV] Amend check for IV increments in collectUsersInEntryBlock (PR #108020)   Hari Limaye via llvm-commits
• [llvm] [LV] Amend check for IV increments in collectUsersInEntryBlock (PR #108020)   Hari Limaye via llvm-commits
• [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)   Hassnaa Hamdi via llvm-commits
• [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)   Hassnaa Hamdi via llvm-commits
• [llvm] [WebAssembly] Add assembly support for final EH proposal (PR #107917)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Add assembly support for final EH proposal (PR #107917)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Misc. refactoring in AsmTypeCheck (NFC) (PR #107978)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Add a colon to type error message (PR #107980)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Add a colon to type error message (PR #107980)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Misc. refactoring in AsmTypeCheck (NFC) (PR #107978)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Misc. refactoring in AsmTypeCheck (NFC) (PR #107978)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Misc. refactoring in AsmTypeCheck (NFC) (PR #107978)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Add assembly support for final EH proposal (PR #107917)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Add assembly support for final EH proposal (PR #107917)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Add assembly support for final EH proposal (PR #107917)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Misc. refactoring in AsmTypeCheck (NFC) (PR #107978)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Add assembly support for final EH proposal (PR #107917)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Add assembly support for final EH proposal (PR #107917)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Add assembly support for final EH proposal (PR #107917)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Add assembly support for final EH proposal (PR #107917)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Misc. refactoring in AsmTypeCheck (NFC) (PR #107978)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Add assembly support for final EH proposal (PR #107917)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Add assembly support for final EH proposal (PR #107917)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Add assembly support for final EH proposal (PR #107917)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Add assembly support for final EH proposal (PR #107917)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Add assembly support for final EH proposal (PR #107917)   Heejin Ahn via llvm-commits
• [llvm] [EH] Create separate file for EH assembly tests (PR #108472)   Heejin Ahn via llvm-commits
• [llvm] [EH] Create separate file for EH assembly tests (PR #108472)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Create separate file for EH assembly tests (PR #108472)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Create separate file for EH assembly tests (PR #108472)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Create separate file for EH assembly tests (PR #108472)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Create separate file for EH assembly tests (PR #108472)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Add type checking for 'throw' (PR #108641)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Add more EH assembly test cases (PR #108654)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Add type checking for 'throw' (PR #108641)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Support assembly parsing for new EH (PR #108668)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Support assembly parsing for new EH (PR #108668)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Add more EH assembly test cases (PR #108654)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Support assembly parsing for new EH (PR #108668)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Fix br type checking (PR #108746)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Support assembly parsing for new EH (PR #108668)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Fix br type checking (PR #108746)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Support assembly parsing for new EH (PR #108668)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Support assembly parsing for new EH (PR #108668)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Rename eh-assembly.s to -legacy.s (PR #108747)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Fix br type checking (PR #108746)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Fix br type checking (PR #108746)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Fix .functype directives in tests (PR #108748)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Add indentations to annotations.s (PR #108790)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Add indentations to annotations.s (PR #108790)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Add indentations to annotations.s (PR #108790)   Heejin Ahn via llvm-commits
• [clang] [llvm] [DirectX] Add DirectXTargetCodeGenInfo (PR #104856)   Helena Kotas via llvm-commits
• [clang] [llvm] [DirectX] Add DirectXTargetCodeGenInfo (PR #104856)   Helena Kotas via llvm-commits
• [clang] [llvm] [DirectX] Add DirectXTargetCodeGenInfo (PR #104856)   Helena Kotas via llvm-commits
• [clang] [llvm] [DirectX] Add DirectXTargetCodeGenInfo (PR #104856)   Helena Kotas via llvm-commits
• [clang] [llvm] [DirectX] Add DirectXTargetCodeGenInfo (PR #104856)   Helena Kotas via llvm-commits
• [clang] [llvm] [DirectX] Add DirectXTargetCodeGenInfo (PR #104856)   Helena Kotas via llvm-commits
• [llvm] [DirectX] Implement typedBufferLoad_checkbit (PR #108087)   Helena Kotas via llvm-commits
• [llvm] [llvm-lit] Process ANSI color codes in test output when formatting (PR #106776)   Henrik G. Olsson via llvm-commits
• [clang] [llvm] [Utils] add --update-tests flag to llvm-lit (PR #97369)   Henrik G. Olsson via llvm-commits
• [clang] [llvm] [Utils] add --update-tests flag to llvm-lit (PR #97369)   Henrik G. Olsson via llvm-commits
• [llvm] [llvm-lit] Process ANSI color codes in test output when formatting (PR #106776)   Henrik G. Olsson via llvm-commits
• [llvm] Revert "[llvm-lit] Process ANSI color codes in test output when formatting" (PR #108104)   Henrik G. Olsson via llvm-commits
• [llvm] Revert "[llvm-lit] Process ANSI color codes in test output when formatting" (PR #108104)   Henrik G. Olsson via llvm-commits
• [llvm] [llvm-lit] Process ANSI color codes in test output when formatting (PR #106776)   Henrik G. Olsson via llvm-commits
• [llvm] Reland "[llvm-lit] Process ANSI color codes in test output when forma… (PR #108107)   Henrik G. Olsson via llvm-commits
• [llvm] Reland "[llvm-lit] Process ANSI color codes in test output when forma… (PR #108107)   Henrik G. Olsson via llvm-commits
• [llvm] Reland "[llvm-lit] Process ANSI color codes in test output when forma… (PR #108107)   Henrik G. Olsson via llvm-commits
• [clang] [llvm] [Utils] Add new --update-tests flag to llvm-lit (PR #108425)   Henrik G. Olsson via llvm-commits
• [clang] [llvm] [Utils] Add new --update-tests flag to llvm-lit (PR #108425)   Henrik G. Olsson via llvm-commits
• [clang] [llvm] [Utils] Add new --update-tests flag to llvm-lit (PR #108425)   Henrik G. Olsson via llvm-commits
• [clang] [llvm] [Utils] Add new --update-tests flag to llvm-lit (PR #108425)   Henrik G. Olsson via llvm-commits
• [clang] [llvm] [Utils] Add new --update-tests flag to llvm-lit (PR #108425)   Henrik G. Olsson via llvm-commits
• [llvm] [Transforms] LoopIdiomRecognize recognize strlen8 (PR #107733)   Henry Jiang via llvm-commits
• [llvm] [Transforms] LoopIdiomRecognize recognize strlen8 (PR #107733)   Henry Jiang via llvm-commits
• [libcxx] [llvm] [libc++][CI] Update to Clang-20 (PR #108761)   Hristo Hristov via llvm-commits
• [libcxx] [llvm] [libc++][CI] Update to Clang-20 (PR #108761)   Hristo Hristov via llvm-commits
• [libcxx] [llvm] [libc++][CI] Update to Clang-20 (PR #108761)   Hristo Hristov via llvm-commits
• [libcxx] [llvm] [libc++][CI] Update to Clang-20 (PR #108761)   Hristo Hristov via llvm-commits
• [libcxx] [llvm] [libc++][CI] Update to Clang-20 (PR #108761)   Hristo Hristov via llvm-commits
• [libcxx] [llvm] [libc++][CI] Update to Clang-20 (PR #108761)   Hristo Hristov via llvm-commits
• [libcxx] [llvm] [libc++][CI] Update to Clang-20 (PR #108761)   Hristo Hristov via llvm-commits
• [libcxx] [llvm] [libc++][CI] Update to Clang-20 (PR #108761)   Hristo Hristov via llvm-commits
• [libcxx] [llvm] [libc++][CI] Upgrade compiler HEAD version to Clang-20 (PR #108761)   Hristo Hristov via llvm-commits
• [libcxx] [llvm] [libc++][CI] Upgrade compiler HEAD version to Clang-20 (PR #108761)   Hristo Hristov via llvm-commits
• [llvm] [VectorCombine] Add type shrinking and zext propagation for fixed-width vector types (PR #104606)   Igor Kirillov via llvm-commits
• [llvm] [VectorCombine] Fix trunc generated between PHINodes (PR #108228)   Igor Kirillov via llvm-commits
• [llvm] [VectorCombine] Add type shrinking and zext propagation for fixed-width vector types (PR #104606)   Igor Kirillov via llvm-commits
• [llvm] [VectorCombine] Fix trunc generated between PHINodes (PR #108228)   Igor Kirillov via llvm-commits
• [llvm] [VectorCombine] Refactor Insertion Point setting in shrinkType (PR #108398)   Igor Kirillov via llvm-commits
• [llvm] [VectorCombine] Fix trunc generated between PHINodes (PR #108228)   Igor Kirillov via llvm-commits
• [llvm] [WIP][LV] Ignore some costs when loop gets fully unrolled (PR #106699)   Igor Kirillov via llvm-commits
• [llvm] [VectorCombine] Refactor Insertion Point setting in shrinkType (PR #108398)   Igor Kirillov via llvm-commits
• [lld] [lld][elf] Warn if '*' pattern is used multiple times in version scripts (PR #102669)   Igor Kudrin via llvm-commits
• [llvm] [HEXAGON] AddrModeOpt support for HVX and optimize adds (PR #106368)   Ikhlas Ajbar via llvm-commits
• [llvm] [HEXAGON] AddrModeOpt support for HVX and optimize adds (PR #106368)   Ikhlas Ajbar via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle] Set `InConstraintExpr` to `true` when demangling a c… (PR #107385)   Ilya Biryukov via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle] Set `InConstraintExpr` to `true` when demangling a constraint expression (PR #107385)   Ilya Biryukov via llvm-commits
• [clang] [clang-tools-extra] [llvm] [Clang] Add __type_list_dedup builtin to deduplicate types in template arguments (PR #106730)   Ilya Biryukov via llvm-commits
• [clang] [clang-tools-extra] [llvm] [Clang] Add __type_list_dedup builtin to deduplicate types in template arguments (PR #106730)   Ilya Biryukov via llvm-commits
• [clang] [clang-tools-extra] [llvm] [Clang] Add __type_list_dedup builtin to deduplicate types in template arguments (PR #106730)   Ilya Biryukov via llvm-commits
• [clang] [clang-tools-extra] [llvm] [Clang] Add __type_list_dedup builtin to deduplicate types in template arguments (PR #106730)   Ilya Biryukov via llvm-commits
• [clang] [clang-tools-extra] [llvm] [Clang] Add __type_list_dedup builtin to deduplicate types in template arguments (PR #106730)   Ilya Biryukov via llvm-commits
• [clang] [clang-tools-extra] [llvm] [Clang] Add __type_list_dedup builtin to deduplicate types in template arguments (PR #106730)   Ilya Biryukov via llvm-commits
• [clang] [clang-tools-extra] [llvm] [Clang] Add __type_list_dedup builtin to deduplicate types in template arguments (PR #106730)   Ilya Biryukov via llvm-commits
• [clang] [clang-tools-extra] [llvm] [Clang] Add __type_list_dedup builtin to deduplicate types in template arguments (PR #106730)   Ilya Biryukov via llvm-commits
• [clang] [clang-tools-extra] [llvm] [Clang] Add __type_list_dedup builtin to deduplicate types in template arguments (PR #106730)   Ilya Biryukov via llvm-commits
• [llvm] added a script to update llvm-mc test file (PR #107246)   Ivan Kosarev via llvm-commits
• [llvm] added a script to update llvm-mc test file (PR #107246)   Ivan Kosarev via llvm-commits
• [llvm] added a script to update llvm-mc test file (PR #107246)   Ivan Kosarev via llvm-commits
• [llvm] [dsymutil] Fix whitespace issues and typo in HelpText. (PR #108310)   J. Ryan Stinnett via llvm-commits
• [lld] [LLD][COFF][NFC] Create import thunks in ImportFile::parse. (PR #107929)   Jacek Caban via llvm-commits
• [lld] [LLD][COFF][NFC] Create import thunks in ImportFile::parse. (PR #107929)   Jacek Caban via llvm-commits
• [lld] [LLD][COFF] Add support for ARM64EC import call thunks. (PR #107931)   Jacek Caban via llvm-commits
• [lld] [LLD][COFF] Add support for ARM64EC import call thunks. (PR #107931)   Jacek Caban via llvm-commits
• [lld] [LLD][COFF] Add support for ARM64EC import call thunks. (PR #107931)   Jacek Caban via llvm-commits
• [lld] [LLD][COFF][NFC] Create import thunks in ImportFile::parse. (PR #107929)   Jacek Caban via llvm-commits
• [lld] [LLD][COFF][NFC] Create import thunks in ImportFile::parse. (PR #107929)   Jacek Caban via llvm-commits
• [lld] [LLD][COFF] Add support for ARM64EC import call thunks. (PR #107931)   Jacek Caban via llvm-commits
• [lld] [LLD][COFF] Add support for ARM64EC import call thunks. (PR #107931)   Jacek Caban via llvm-commits
• [lld] [LLD][COFF] Add support for ARM64EC import call thunks. (PR #107931)   Jacek Caban via llvm-commits
• [lld] [LLD][COFF] Add support for ARM64EC import call thunks. (PR #107931)   Jacek Caban via llvm-commits
• [lld] [LLD][COFF] Add support for ARM64EC import call thunks. (PR #107931)   Jacek Caban via llvm-commits
• [lld] [LLD][COFF][NFC] Create import thunks in ImportFile::parse. (PR #107929)   Jacek Caban via llvm-commits
• [lld] [LLD][COFF] Add support for ARM64EC import call thunks. (PR #107931)   Jacek Caban via llvm-commits
• [lld] [LLD][COFF] Add support for ARM64EC import call thunks. (PR #107931)   Jacek Caban via llvm-commits
• [lld] [LLD][COFF] Add support for ARM64EC auxiliary IAT (PR #108304)   Jacek Caban via llvm-commits
• [lld] [LLD][COFF] Add support for ARM64EC import call thunks. (PR #107931)   Jacek Caban via llvm-commits
• [lld] 7c82b56 - [LLD][COFF] Define importThunkARM64EC as uint8_t array to fix big-endian hosts.   Jacek Caban via llvm-commits
• [lld] [LLD][COFF] Add support for ARM64EC auxiliary IAT (PR #108304)   Jacek Caban via llvm-commits
• [lld] [LLD][COFF] Add support for ARM64EC auxiliary IAT (PR #108304)   Jacek Caban via llvm-commits
• [lld] [LLD][COFF] Add support for ARM64EC auxiliary IAT (PR #108304)   Jacek Caban via llvm-commits
• [lld] [LLD][COFF] Add support for ARM64EC auxiliary IAT (PR #108304)   Jacek Caban via llvm-commits
• [lld] [LLD][COFF] Add support for ARM64EC auxiliary IAT (PR #108304)   Jacek Caban via llvm-commits
• [lld] [LLD][COFF][NFC] Store live flag in ImportThunkChunk. (PR #108459)   Jacek Caban via llvm-commits
• [lld] [LLD][COFF] Add Support for ARM64EC Import Thunks (PR #108460)   Jacek Caban via llvm-commits
• [lld] [LLD][COFF] Add Support for ARM64EC Import Thunks (PR #108460)   Jacek Caban via llvm-commits
• [lld] [LLD][COFF][NFC] Store live flag in ImportThunkChunk. (PR #108459)   Jacek Caban via llvm-commits
• [lld] [LLD][COFF][NFC] Store live flag in ImportThunkChunk. (PR #108459)   Jacek Caban via llvm-commits
• [lld] [LLD][COFF] Add Support for ARM64EC Import Thunks (PR #108460)   Jacek Caban via llvm-commits
• [lld] [LLD][COFF] Add Support for ARM64EC Import Thunks (PR #108460)   Jacek Caban via llvm-commits
• [lld] [LLD][COFF] Add Support for ARM64EC Import Thunks (PR #108460)   Jacek Caban via llvm-commits
• [lld] [LLD][COFF] Redirect __imp_ Symbols to __imp_aux_ on ARM64EC for x64 sections (PR #108608)   Jacek Caban via llvm-commits
• [lld] [LLD][COFF] Add Support for auxiliary IAT copy (PR #108610)   Jacek Caban via llvm-commits
• [lld] [LLD][COFF] Add Support for auxiliary IAT copy (PR #108610)   Jacek Caban via llvm-commits
• [lld] [LLD][COFF] Redirect __imp_ Symbols to __imp_aux_ on ARM64EC for x64 sections (PR #108608)   Jacek Caban via llvm-commits
• [llvm] [InitUndef] Don't use largest super class (PR #107885)   Jack Styles via llvm-commits
• [llvm] [InitUndef] Enable the InitUndef pass on all targets (PR #108353)   Jack Styles via llvm-commits
• [llvm] [CMake] Use old DynamicLibrary symbol behavior on AIX for now (PR #108692)   Jake Egan via llvm-commits
• [llvm] [ADT][NFC] Clang-format DenseMap and DenseSet (PR #108162)   Jakub Kuderski via llvm-commits
• [llvm] [mlir] [ADT] Make DenseMap/DenseSet more resilient agains OOM situations (PR #107251)   Jakub Kuderski via llvm-commits
• [llvm] [ADT][NFC] Constexpr-ify if in DenseMap::clear (PR #108243)   Jakub Kuderski via llvm-commits
• [llvm] [ADT][NFC] Refactor/optimize DenseMap::copyFrom (PR #108377)   Jakub Kuderski via llvm-commits
• [llvm] [mlir] [MLIR][ROCDL] Add dynamically legal ops to LowerGpuOpsToROCDLOpsPass (PR #108302)   Jakub Kuderski via llvm-commits
• [llvm] [mlir] [MLIR][ROCDL] Add dynamically legal ops to LowerGpuOpsToROCDLOpsPass (PR #108302)   Jakub Kuderski via llvm-commits
• [llvm] [mlir] [MLIR][ROCDL] Add dynamically legal ops to LowerGpuOpsToROCDLOpsPass (PR #108302)   Jakub Kuderski via llvm-commits
• [llvm] It is really the byte order of the target that matters (PR #107915)   James Henderson via llvm-commits
• [llvm] It is really the byte order of the target that matters (PR #107915)   James Henderson via llvm-commits
• [llvm] It is really the byte order of the target that matters (PR #107915)   James Henderson via llvm-commits
• [llvm] It is really the byte order of the target that matters (PR #107915)   James Henderson via llvm-commits
• [llvm] Add target-byteorder for cases where endian in target triple is what matters (PR #107915)   James Henderson via llvm-commits
• [llvm] Add target-byteorder for cases where endian in target triple is what matters (PR #107915)   James Henderson via llvm-commits
• [llvm] Add target-byteorder for cases where endian in target triple is what matters (PR #107915)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][ELF] Disable huge section offset (PR #97036)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][ELF] Disable huge section offset (PR #97036)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][ELF] Disable huge section offset (PR #97036)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][ELF] Disable huge section offset (PR #97036)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][ELF] Disable huge section offset (PR #97036)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][ELF] Disable huge section offset (PR #97036)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][ELF] Disable huge section offset (PR #97036)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][ELF] Disable huge section offset (PR #97036)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][ELF] Disable huge section offset (PR #97036)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][ELF] Disable huge section offset (PR #97036)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][ELF] Disable huge section offset (PR #97036)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][ELF] Disable huge section offset (PR #97036)   James Henderson via llvm-commits
• [llvm] [Policy] Replace "code owners" with "maintainers" (PR #107384)   James Henderson via llvm-commits
• [llvm] [Policy] Replace "code owners" with "maintainers" (PR #107384)   James Henderson via llvm-commits
• [clang] [lld] [llvm] Deprecate the `-fbasic-block-sections=labels` option. (PR #107494)   James Henderson via llvm-commits
• [llvm] [Policy] Replace "code owners" with "maintainers" (PR #107384)   James Henderson via llvm-commits
• [llvm] [llvm-size] Avoid unneeded uses of 'raw_string_ostream::str' (NFC) (PR #108490)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][ELF] Disable huge section offset (PR #97036)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][ELF] Disable huge section offset (PR #97036)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][ELF] Disable huge section offset (PR #97036)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][ELF] Disable huge section offset (PR #97036)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][ELF] Disable huge section offset (PR #97036)   James Henderson via llvm-commits
• [llvm] [llvm]Add a simple Telemetry framework (PR #102323)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][ELF] Disable huge section offset (PR #97036)   James Henderson via llvm-commits
• [llvm] [Policy] Replace "code owners" with "maintainers" (PR #107384)   James Henderson via llvm-commits
• [llvm] [llvm]Add a simple Telemetry framework (PR #102323)   James Henderson via llvm-commits
• [clang] [llvm] [Offload] Provide a kernel library useable by the offload runtime (PR #104168)   Jan Patrick Lehr via llvm-commits
• [clang] [llvm] [Offload] Provide a kernel library useable by the offload runtime (PR #104168)   Jan Patrick Lehr via llvm-commits
• [clang] [llvm] [Offload] Provide a kernel library useable by the offload runtime (PR #104168)   Jan Patrick Lehr via llvm-commits
• [llvm] [LLVM][Option] Refactor option name comparison (PR #108219)   Jan Svoboda via llvm-commits
• [llvm] [LLVM][Option] Refactor option name comparison (PR #108219)   Jan Svoboda via llvm-commits
• [llvm] [LLVM][Option] Refactor option name comparison (PR #108219)   Jan Svoboda via llvm-commits
• [llvm] [LLVM][Option] Refactor option name comparison (PR #108219)   Jan Svoboda via llvm-commits
• [llvm] [LLVM][Option] Refactor option name comparison (PR #108219)   Jan Svoboda via llvm-commits
• [llvm] [LLVM][Option] Refactor option name comparison (PR #108219)   Jan Svoboda via llvm-commits
• [llvm] [LLVM][Option] Refactor option name comparison (PR #108219)   Jan Svoboda via llvm-commits
• [llvm] [LLVM][Option] Refactor option name comparison (PR #108219)   Jan Svoboda via llvm-commits
• [lld] [llvm] Re-apply "[NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF" (PR #107792)   Jan Voung via llvm-commits
• [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)   Jan Voung via llvm-commits
• [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)   Jan Voung via llvm-commits
• [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)   Jan Voung via llvm-commits
• [llvm] [M68k] allow 16-bit registers for MOVE to/from CCR (PR #107591)   Janis Heims via llvm-commits
• [lldb] [llvm] [lldb] Change lldb's breakpoint detection behavior [WIP] (PR #105594)   Jason Molenda via llvm-commits
• [llvm] [Dexter] Adapt to upcoming lldb stepping behavior (PR #108127)   Jason Molenda via llvm-commits
• [llvm] [Dexter] Adapt to upcoming lldb stepping behavior (PR #108127)   Jason Molenda via llvm-commits
• [llvm] [Dexter] Adapt to upcoming lldb stepping behavior (PR #108127)   Jason Molenda via llvm-commits
• [llvm] [Dexter] Adapt to upcoming lldb stepping behavior (PR #108127)   Jason Molenda via llvm-commits
• [lldb] [llvm] [lldb] Change lldb's breakpoint detection behavior [WIP] (PR #105594)   Jason Molenda via llvm-commits
• [lldb] [llvm] [lldb] Change lldb's breakpoint detection behavior [WIP] (PR #105594)   Jason Molenda via llvm-commits
• [lldb] [llvm] [lldb] Change lldb's breakpoint detection behavior [WIP] (PR #105594)   Jason Molenda via llvm-commits
• [lldb] [llvm] [lldb] Change lldb's breakpoint detection behavior [WIP] (PR #105594)   Jason Molenda via llvm-commits
• [lldb] [llvm] [lldb] Change lldb's breakpoint detection behavior [WIP] (PR #105594)   Jason Molenda via llvm-commits
• [lldb] [llvm] [lldb] Change lldb's breakpoint detection behavior [WIP] (PR #105594)   Jason Molenda via llvm-commits
• [llvm] [AMDGPU] Simplify and improve codegen for llvm.amdgcn.set.inactive (PR #107889)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Simplify and improve codegen for llvm.amdgcn.set.inactive (PR #107889)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Simplify and improve codegen for llvm.amdgcn.set.inactive (PR #107889)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Simplify and improve codegen for llvm.amdgcn.set.inactive (PR #107889)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Simplify and improve codegen for llvm.amdgcn.set.inactive (PR #107889)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Simplify and improve codegen for llvm.amdgcn.set.inactive (PR #107889)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Simplify and improve codegen for llvm.amdgcn.set.inactive (PR #107889)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Simplify and improve codegen for llvm.amdgcn.set.inactive (PR #107889)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Simplify and improve codegen for llvm.amdgcn.set.inactive (PR #107889)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Simplify and improve codegen for llvm.amdgcn.set.inactive (PR #107889)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Simplify and improve codegen for llvm.amdgcn.set.inactive (PR #107889)   Jay Foad via llvm-commits
• [llvm] 306b08c - [AMDGPU] Remove unused SITargetLowering::isMemOpUniform   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix selection of s_load_b96 on GFX11 (PR #108029)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix selection of s_load_b96 on GFX11 (PR #108029)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix selection of s_load_b96 on GFX11 (PR #108029)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix selection of s_load_b96 on GFX11 (PR #108029)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix selection of s_load_b96 on GFX11 (PR #108029)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Simplify and improve codegen for llvm.amdgcn.set.inactive (PR #107889)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Simplify and improve codegen for llvm.amdgcn.set.inactive (PR #107889)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Simplify and improve codegen for llvm.amdgcn.set.inactive (PR #107889)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Simplify and improve codegen for llvm.amdgcn.set.inactive (PR #107889)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Shrink a live interval instead of recomputing it. NFCI. (PR #108171)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Simplify and improve codegen for llvm.amdgcn.set.inactive (PR #107889)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][True16][MC] 16bit vsrc and vdst support in MC (PR #104510)   Jay Foad via llvm-commits
• [llvm] 935b9f6 - [AMDGPU] Make use of multiclass inheritance. NFC.   Jay Foad via llvm-commits
• [llvm] [AMDGPU][True16][MC] 16bit vsrc and vdst support in MC (PR #104510)   Jay Foad via llvm-commits
• [llvm] [SDAG] Simplify divergence verification (PR #108182)   Jay Foad via llvm-commits
• [llvm] [SDAG] Simplify divergence verification (PR #108182)   Jay Foad via llvm-commits
• [llvm] [SDAG] Simplify divergence verification (PR #108182)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Simplify and improve codegen for llvm.amdgcn.set.inactive (PR #107889)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Simplify and improve codegen for llvm.amdgcn.set.inactive (PR #107889)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Simplify and improve codegen for llvm.amdgcn.set.inactive (PR #107889)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Make more use of getWaveMaskRegClass. NFC. (PR #108186)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix selection of s_load_b96 on GFX11 (PR #108029)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Remove dead code in SIISelLowering (NFC) (PR #108198)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Use std::optional in InstCombine of amdgcn_fmed3. NFC. (PR #108223)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Use std::optional in InstCombine of amdgcn_fmed3. NFC. (PR #108223)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Use std::optional in InstCombine of amdgcn_fmed3. NFC. (PR #108223)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Use std::optional in InstCombine of amdgcn_fmed3. NFC. (PR #108223)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Use std::optional in InstCombine of amdgcn_fmed3. NFC. (PR #108223)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Use std::optional in InstCombine of amdgcn_fmed3. NFC. (PR #108223)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Shrink a live interval instead of recomputing it. NFCI. (PR #108171)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Make more use of getWaveMaskRegClass. NFC. (PR #108186)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Simplify and improve codegen for llvm.amdgcn.set.inactive (PR #107889)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Use std::optional in InstCombine of amdgcn_fmed3. NFC. (PR #108223)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Simplify API of matchFPExtFromF16. NFC. (PR #108223)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fold llvm.amdgcn.cvt.pkrtz when either operand is fpext (PR #108237)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][True16][MC] 16bit vsrc and vdst support in MC (PR #104510)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Simplify API of matchFPExtFromF16. NFC. (PR #108223)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Simplify and improve codegen for llvm.amdgcn.set.inactive (PR #107889)   Jay Foad via llvm-commits
• [llvm] [GlobalIsel] Combine zext of trunc (episode II) (PR #108305)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fold llvm.amdgcn.cvt.pkrtz when either operand is fpext (PR #108237)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fold llvm.amdgcn.cvt.pkrtz when either operand is fpext (PR #108237)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Avoid unneeded waitcounts before spill stores (PR #108303)   Jay Foad via llvm-commits
• [llvm] [GlobalIsel] Combine zext of trunc (episode II) (PR #108305)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] GCNHazardRecognizer: refactor getWaitStatesSince (NFCI) (PR #108347)   Jay Foad via llvm-commits
• [llvm] [InitUndef] Enable the InitUndef pass on all targets (PR #108353)   Jay Foad via llvm-commits
• [llvm] [InitUndef] Enable the InitUndef pass on all targets (PR #108353)   Jay Foad via llvm-commits
• [llvm] [InitUndef] Enable the InitUndef pass on all targets (PR #108353)   Jay Foad via llvm-commits
• [llvm] SelectionDAG: Support nofpclass (PR #108350)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix selection of s_load_b96 on GFX11 (PR #108029)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix selection of s_load_b96 on GFX11 (PR #108029)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] GCNHazardRecognizer: refactor getWaitStatesSince (NFCI) (PR #108347)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] GCNHazardRecognizer: refactor getWaitStatesSince (NFCI) (PR #108347)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] GCNHazardRecognizer: refactor getWaitStatesSince (NFCI) (PR #108347)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] GCNHazardRecognizer: refactor getWaitStatesSince (NFCI) (PR #108347)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] GCNHazardRecognizer: refactor getWaitStatesSince (NFCI) (PR #108347)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] GCNHazardRecognizer: refactor getWaitStatesSince (NFCI) (PR #108347)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] GCNHazardRecognizer: refactor getWaitStatesSince (NFCI) (PR #108347)   Jay Foad via llvm-commits
• [llvm] SelectionDAG: Support nofpclass (PR #108350)   Jay Foad via llvm-commits
• [llvm] Reland "[amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic" (PR #108512)   Jay Foad via llvm-commits
• [llvm] [GlobalIsel] Combine zext of trunc (episode II) (PR #108305)   Jay Foad via llvm-commits
• [llvm] [SDAG] Simplify divergence verification. NFC. (PR #108182)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Optionally Use GCNRPTrackers during scheduling (PR #93090)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] NFC: Provide RPTracker interface for external iterators (PR #93088)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Optionally Use GCNRPTrackers during scheduling (PR #93090)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Optionally Use GCNRPTrackers during scheduling (PR #93090)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Optionally Use GCNRPTrackers during scheduling (PR #93090)   Jeffrey Byrnes via llvm-commits
• [llvm] [DWARF] Emit a minimal line-table for totally empty functions (PR #107267)   Jeremy Morse via llvm-commits
• [llvm] [DWARF] Emit a worst-case prologue_end flag for pathological inputs (PR #107849)   Jeremy Morse via llvm-commits
• [llvm] Add myself as the PS4/PS5 code owner (PR #108002)   Jeremy Morse via llvm-commits
• [llvm] [LiveDebugValues] Avoid repeated hash lookups (NFC) (PR #108484)   Jeremy Morse via llvm-commits
• [llvm] [DebugInfo] Enable deprecation of iterator-insertion methods (PR #102608)   Jeremy Morse via llvm-commits
• [llvm] [DebugInfo] Enable deprecation of iterator-insertion methods (PR #102608)   Jeremy Morse via llvm-commits
• [llvm] [DebugInfo] Enable deprecation of iterator-insertion methods (PR #102608)   Jeremy Morse via llvm-commits
• [llvm] [MIPS]Initial support for MIPS16 assembly. (PR #108681)   Jesse D via llvm-commits
• [llvm] [RISCV] Don't outline pcrel_lo when the function has a section prefix (PR #107943)   Jessica Clarke via llvm-commits
• [clang] [llvm] [RISCV][VCIX] Add vcix_state to GNU inline assembly register set (PR #106914)   Jessica Clarke via llvm-commits
• [clang] [llvm] [RISCV] Implement Clang Builtins for XCValu Extension in CV32E40P (PR #100684)   Jessica Clarke via llvm-commits
• [clang] [lld] [llvm] [mlir] [IR] Introduce `T<address space>` to `DataLayout` to represent flat address space if a target supports it (PR #108786)   Jessica Clarke via llvm-commits
• [llvm] [RISCV] Account for zvfhmin and zvfbfmin promotion in register usage (PR #108370)   Jianjian Guan via llvm-commits
• [llvm] [AMDGPU][True16][MC] true16 for more VOP1 instructions (PR #108412)   Joe Nash via llvm-commits
• [llvm] [AMDGPU][True16][MC] true16 for more VOP1 instructions (PR #108412)   Joe Nash via llvm-commits
• [llvm] [AMDGPU][True16][MC] true16 for more VOP1 instructions (PR #108412)   Joe Nash via llvm-commits
• [llvm] [AMDGPU][True16][MC] true16 for more VOP1 instructions (PR #108412)   Joe Nash via llvm-commits
• [llvm] [AMDGPU][True16][MC] true16 for more VOP1 instructions (PR #108412)   Joe Nash via llvm-commits
• [llvm] [Attributor] Keep track of reached returns in AAPointerInfo (PR #107479)   Johannes Doerfert via llvm-commits
• [llvm] [Attributor] Avoid AS-cast for function pointers (PR #65825)   Johannes Doerfert via llvm-commits
• [llvm] [Attributor] Avoid AS-cast for function pointers (PR #65825)   Johannes Doerfert via llvm-commits
• [llvm] [Attributor] Avoid AS-cast for function pointers (PR #65825)   Johannes Doerfert via llvm-commits
• [llvm] [NFC][Attributor] Use unsigned integer for address space tracking (PR #108447)   Johannes Doerfert via llvm-commits
• [llvm] [NFC][Attributor] Use unsigned integer for address space tracking (PR #108447)   Johannes Doerfert via llvm-commits
• [llvm] [AMDGPU][LTO] Introduce AMDGPUCloneModuleLDS (PR #89683)   Jon Chesterfield via llvm-commits
• [clang] [compiler-rt] [llvm] [FMV][AArch64] Unify ls64, ls64_v and ls64_accdata. (PR #108024)   Jon Roelofs via llvm-commits
• [clang] [compiler-rt] [llvm] [FMV][AArch64] Unify ls64, ls64_v and ls64_accdata. (PR #108024)   Jon Roelofs via llvm-commits
• [clang] [compiler-rt] [llvm] [FMV][AArch64] Unify ls64, ls64_v and ls64_accdata. (PR #108024)   Jon Roelofs via llvm-commits
• [clang] [compiler-rt] [llvm] [FMV][AArch64] Remove feature sha1 from FMV. (PR #108383)   Jon Roelofs via llvm-commits
• [clang] [compiler-rt] [llvm] [FMV][AArch64] Unify ls64, ls64_v and ls64_accdata. (PR #108024)   Jon Roelofs via llvm-commits
• [llvm] [dsymutil] Fix whitespace issues and typo in HelpText. (PR #108310)   Jonas Devlieghere via llvm-commits
• [llvm] Fix for logic in combineExtract() (PR #108208)   Jonas Paulsson via llvm-commits
• [llvm] [SystemZ] Remove high inlining threshold multiplier. (PR #106058)   Jonas Paulsson via llvm-commits
• [llvm] [SystemZ] Remove high inlining threshold multiplier. (PR #106058)   Jonas Paulsson via llvm-commits
• [llvm] Fix for logic in combineExtract() (PR #108208)   Jonas Paulsson via llvm-commits
• [llvm] Fix for logic in combineExtract() (PR #108208)   Jonas Paulsson via llvm-commits
• [llvm] Fix for logic in combineExtract() (PR #108208)   Jonas Paulsson via llvm-commits
• [clang] [llvm] target ABI: improve call parameters extensions handling (PR #100757)   Jonas Paulsson via llvm-commits
• [clang] [llvm] target ABI: improve call parameters extensions handling (PR #100757)   Jonas Paulsson via llvm-commits
• [llvm] [RISCV] Don't outline pcrel_lo when the function has a section prefix (PR #107943)   Jonathon Penix via llvm-commits
• [llvm] [RISCV] Don't outline pcrel_lo when the function has a section prefix (PR #107943)   Jonathon Penix via llvm-commits
• [llvm] [RISCV] Don't outline pcrel_lo when the function has a section prefix (PR #107943)   Jonathon Penix via llvm-commits
• [llvm] [RISCV] Don't outline pcrel_lo when the function has a section prefix (PR #107943)   Jonathon Penix via llvm-commits
• [llvm] [RISCV] Don't outline pcrel_lo when the function has a section prefix (PR #107943)   Jonathon Penix via llvm-commits
• [llvm] [RISCV] Don't outline pcrel_lo when the function has a section prefix (PR #107943)   Jonathon Penix via llvm-commits
• [llvm] [bazel][libc][NFC] Add missing layering deps (PR #107947)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][libc][NFC] Add missing layering deps (PR #107947)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][libc][NFC] Add missing dep for standalone compile (PR #107957)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][libc][NFC] Add missing dep for standalone compile (PR #107957)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel] Add CGData targets/deps (PR #108070)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel] Add CGData targets/deps (PR #108070)   Jordan Rupprecht via llvm-commits
• [llvm] [Bazel] Fix build break for SandboxVectorizer (PR #108638)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][NFC] Use globs to make `Vectorize` less brittle (PR #108644)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][NFC] Use globs to make `Vectorize` less brittle (PR #108644)   Jordan Rupprecht via llvm-commits
• [llvm] [IR] Make UnaryInstruction::classof recognize FreezeInst. (PR #107944)   Jorge Gorbe Moya via llvm-commits
• [llvm] [IR] Make UnaryInstruction::classof recognize FreezeInst. (PR #107944)   Jorge Gorbe Moya via llvm-commits
• [llvm] [IR] Make UnaryInstruction::classof recognize FreezeInst. (PR #107944)   Jorge Gorbe Moya via llvm-commits
• [llvm] [SandboxIR] Fix base class of FenceInst. Verify instructions when building a BB in debug mode. (PR #108078)   Jorge Gorbe Moya via llvm-commits
• [llvm] [SandboxIR] Fix base class of FenceInst. Verify instructions when building a BB in debug mode. (PR #108078)   Jorge Gorbe Moya via llvm-commits
• [llvm] [SandboxIR] Fix base class of FenceInst. Verify instructions when building a BB in debug mode. (PR #108078)   Jorge Gorbe Moya via llvm-commits
• [llvm] [SandboxIR] Add remaining SelectInst methods and track swapValues() (PR #108114)   Jorge Gorbe Moya via llvm-commits
• [llvm] [SandboxIR] Add remaining SelectInst methods and track swapValues() (PR #108114)   Jorge Gorbe Moya via llvm-commits
• [llvm] [SandboxIR] Add remaining SelectInst methods and track swapValues() (PR #108114)   Jorge Gorbe Moya via llvm-commits
• [llvm] [SandboxIR] Add remaining SelectInst methods and track swapValues() (PR #108114)   Jorge Gorbe Moya via llvm-commits
• [llvm] [SandboxIR] Add remaining SelectInst methods and track swapValues() (PR #108114)   Jorge Gorbe Moya via llvm-commits
• [llvm] [SandboxIR] Implement GlobalObject (PR #108604)   Jorge Gorbe Moya via llvm-commits
• [llvm] [LTO] Fix a use-after-free in legacy LTO C APIs (PR #107896)   Joseph Huber via llvm-commits
• [llvm] [Offload] Introduce offload-tblgen and initial new API implementation (PR #108413)   Joseph Huber via llvm-commits
• [llvm] [Offload] Introduce offload-tblgen and initial new API implementation (PR #108413)   Joseph Huber via llvm-commits
• [llvm] [Offload] Introduce offload-tblgen and initial new API implementation (PR #108413)   Joseph Huber via llvm-commits
• [llvm] [Offload] Introduce offload-tblgen and initial new API implementation (PR #108413)   Joseph Huber via llvm-commits
• [llvm] [Offload] Introduce offload-tblgen and initial new API implementation (PR #108413)   Joseph Huber via llvm-commits
• [llvm] [Offload] Introduce offload-tblgen and initial new API implementation (PR #108413)   Joseph Huber via llvm-commits
• [llvm] [Offload] Introduce offload-tblgen and initial new API implementation (PR #108413)   Joseph Huber via llvm-commits
• [llvm] [Offload] Introduce offload-tblgen and initial new API implementation (PR #108413)   Joseph Huber via llvm-commits
• [llvm] [Offload] Introduce offload-tblgen and initial new API implementation (PR #108413)   Joseph Huber via llvm-commits
• [llvm] [Offload] Introduce offload-tblgen and initial new API implementation (PR #108413)   Joseph Huber via llvm-commits
• [llvm] [Offload] Introduce offload-tblgen and initial new API implementation (PR #108413)   Joseph Huber via llvm-commits
• [llvm] [OpenMP] Fix redefining `stdint.h` types (PR #108607)   Joseph Huber via llvm-commits
• [llvm] [OpenMP] Fix redefining `stdint.h` types (PR #108607)   Joseph Huber via llvm-commits
• [llvm] [OpenMP] Fix redefining `stdint.h` types (PR #108607)   Joseph Huber via llvm-commits
• [llvm] [OpenMP] Fix redefining `stdint.h` types (PR #108607)   Joseph Huber via llvm-commits
• [llvm] [OpenMP] Fix redefining `stdint.h` types (PR #108607)   Joseph Huber via llvm-commits
• [compiler-rt] [scudo] Update secondary cache time-based release logic. (PR #107507)   Joshua Baehring via llvm-commits
• [compiler-rt] [scudo] Update secondary cache time-based release logic. (PR #107507)   Joshua Baehring via llvm-commits
• [compiler-rt] [scudo] Update secondary cache time-based release logic. (PR #107507)   Joshua Baehring via llvm-commits
• [compiler-rt] [scudo] Update secondary cache time-based release logic. (PR #107507)   Joshua Baehring via llvm-commits
• [compiler-rt] [scudo] Update secondary cache time-based release logic. (PR #107507)   Joshua Baehring via llvm-commits
• [compiler-rt] [scudo] Update secondary cache release ordering. (PR #104079)   Joshua Baehring via llvm-commits
• [compiler-rt] [scudo] Update secondary cache time-based release logic. (PR #107507)   Joshua Baehring via llvm-commits
• [compiler-rt] [scudo] Update secondary cache time-based release logic. (PR #107507)   Joshua Baehring via llvm-commits
• [compiler-rt] [scudo] Update secondary cache time-based release logic. (PR #107507)   Joshua Baehring via llvm-commits
• [compiler-rt] [scudo] Update secondary cache time-based release logic. (PR #107507)   Joshua Baehring via llvm-commits
• [compiler-rt] [scudo] Update secondary cache time-based release logic. (PR #107507)   Joshua Baehring via llvm-commits
• [compiler-rt] [scudo] Update secondary cache time-based release logic. (PR #107507)   Joshua Baehring via llvm-commits
• [compiler-rt] [scudo] Update secondary cache time-based release logic. (PR #107507)   Joshua Baehring via llvm-commits
• [compiler-rt] [scudo] Update secondary cache time-based release logic. (PR #107507)   Joshua Baehring via llvm-commits
• [compiler-rt] [scudo] Update secondary cache time-based release logic. (PR #107507)   Joshua Baehring via llvm-commits
• [compiler-rt] [scudo] Update secondary cache time-based release logic. (PR #107507)   Joshua Baehring via llvm-commits
• [compiler-rt] [scudo] Update secondary cache time-based release logic. (PR #107507)   Joshua Baehring via llvm-commits
• [compiler-rt] [scudo] Update secondary cache time-based release logic. (PR #107507)   Joshua Baehring via llvm-commits
• [compiler-rt] [scudo] Update secondary cache time-based release logic. (PR #107507)   Joshua Baehring via llvm-commits
• [compiler-rt] [scudo] Update secondary cache time-based release logic. (PR #107507)   Joshua Baehring via llvm-commits
• [compiler-rt] [scudo] Update error handling for secondary cache entry count (PR #95595)   Joshua Baehring via llvm-commits
• [compiler-rt] [scudo] Update secondary cache time-based release logic (PR #107507)   Joshua Baehring via llvm-commits
• [clang] [llvm] Add step builtins and step HLSL function to DirectX and SPIR-V backend (PR #106471)   Joshua Batista via llvm-commits
• [clang] [llvm] Add step builtins and step HLSL function to DirectX and SPIR-V backend (PR #106471)   Joshua Batista via llvm-commits
• [clang] [llvm] Add step builtins and step HLSL function to DirectX and SPIR-V backend (PR #106471)   Joshua Batista via llvm-commits
• [clang] [llvm] Add step builtins and step HLSL function to DirectX and SPIR-V backend (PR #106471)   Joshua Batista via llvm-commits
• [llvm] [AMDGPU] Fix leak and self-assignment in copy assignment operator (PR #107847)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][EarlyIfConverter] Turn SSAIfConv into a local variable (PR #107390)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][EarlyIfConverter] Turn SSAIfConv into a local variable (PR #107390)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][EarlyIfConverter] Turn SSAIfConv into a local variable (PR #107390)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][EarlyIfConverter] Replace boolean Preadicate for a class (PR #108519)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][EarlyIfConverter] Replace boolean Predicate for a class (PR #108519)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][EarlyIfConverter] Replace boolean Predicate for a class (PR #108519)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [LV] Vectorize Epilogues for loops with small VF but high IC (PR #108190)   Julian Nagele via llvm-commits
• [llvm] [LV] Vectorize Epilogues for loops with small VF but high IC (PR #108190)   Julian Nagele via llvm-commits
• [llvm] [LV] Vectorize Epilogues for loops with small VF but high IC (PR #108190)   Julian Nagele via llvm-commits
• [llvm] [LV] Vectorize Epilogues for loops with small VF but high IC (PR #108190)   Julian Nagele via llvm-commits
• [llvm] [LV] Vectorize Epilogues for loops with small VF but high IC (PR #108190)   Julian Nagele via llvm-commits
• [llvm] [LV] Vectorize Epilogues for loops with small VF but high IC (PR #108190)   Julian Nagele via llvm-commits
• [llvm] [LV] Vectorize Epilogues for loops with small VF but high IC (PR #108190)   Julian Nagele via llvm-commits
• [llvm] [LV] Vectorize Epilogues for loops with small VF but high IC (PR #108190)   Julian Nagele via llvm-commits
• [clang-tools-extra] [llvm] [clangd] Add CodeAction to swap operands to binary operators (PR #78999)   Julian Schmidt via llvm-commits
• [clang-tools-extra] [llvm] [clangd] Add CodeAction to swap operands to binary operators (PR #78999)   Julian Schmidt via llvm-commits
• [clang-tools-extra] [llvm] [clangd] Add CodeAction to swap operands to binary operators (PR #78999)   Julian Schmidt via llvm-commits
• [clang-tools-extra] [llvm] [clangd] Add CodeAction to swap operands to binary operators (PR #78999)   Julian Schmidt via llvm-commits
• [clang-tools-extra] [llvm] [clangd] Add CodeAction to swap operands to binary operators (PR #78999)   Julian Schmidt via llvm-commits
• [clang-tools-extra] [llvm] [clangd] Add CodeAction to swap operands to binary operators (PR #78999)   Julian Schmidt via llvm-commits
• [clang-tools-extra] [llvm] [clangd] Add CodeAction to swap operands to binary operators (PR #78999)   Julian Schmidt via llvm-commits
• [clang-tools-extra] [llvm] [clangd] Add CodeAction to swap operands to binary operators (PR #78999)   Julian Schmidt via llvm-commits
• [clang-tools-extra] [llvm] [clangd] Add CodeAction to swap operands to binary operators (PR #78999)   Julian Schmidt via llvm-commits
• [clang-tools-extra] [llvm] [clangd] Add CodeAction to swap operands to binary operators (PR #78999)   Julian Schmidt via llvm-commits
• [clang-tools-extra] [llvm] [clangd] Add CodeAction to swap operands to binary operators (PR #78999)   Julian Schmidt via llvm-commits
• [llvm] [AMDGPU][MC] Implement fft and rotate modes for ds_swizzle_b32 (PR #108064)   Jun Wang via llvm-commits
• [llvm] [AMDGPU][MC] Disallow null as saddr in flat instructions (PR #101730)   Jun Wang via llvm-commits
• [llvm] [AMDGPU][MC] Implement fft and rotate modes for ds_swizzle_b32 (PR #108064)   Jun Wang via llvm-commits
• [llvm] [AMDGPU][MC] Implement fft and rotate modes for ds_swizzle_b32 (PR #108064)   Jun Wang via llvm-commits
• [llvm] [AMDGPU][MC] Implement fft and rotate modes for ds_swizzle_b32 (PR #108064)   Jun Wang via llvm-commits
• [llvm] [AMDGPU][MC] Implement fft and rotate modes for ds_swizzle_b32 (PR #108064)   Jun Wang via llvm-commits
• [llvm] [AMDGPU][MC] Implement fft and rotate modes for ds_swizzle_b32 (PR #108064)   Jun Wang via llvm-commits
• [llvm] [AMDGPU][MC] Implement fft and rotate modes for ds_swizzle_b32 (PR #108064)   Jun Wang via llvm-commits
• [llvm] [AMDGPU][MC] Implement fft and rotate modes for ds_swizzle_b32 (PR #108064)   Jun Wang via llvm-commits
• [llvm] [AMDGPU][MC] Implement fft and rotate modes for ds_swizzle_b32 (PR #108064)   Jun Wang via llvm-commits
• [llvm] [AMDGPU][MC] Implement fft and rotate modes for ds_swizzle_b32 (PR #108064)   Jun Wang via llvm-commits
• [llvm] [AMDGPU][MC] Implement fft and rotate modes for ds_swizzle_b32 (PR #108064)   Jun Wang via llvm-commits
• [llvm] [DirectX] Lower `@llvm.dx.typedBufferLoad` to DXIL ops (PR #104252)   Justin Bogner via llvm-commits
• [llvm] [DirectX] Lower `@llvm.dx.typedBufferLoad` to DXIL ops (PR #104252)   Justin Bogner via llvm-commits
• [clang] [llvm] [DirectX] Add DirectXTargetCodeGenInfo (PR #104856)   Justin Bogner via llvm-commits
• [clang] [llvm] [DirectX] Add DirectXTargetCodeGenInfo (PR #104856)   Justin Bogner via llvm-commits
• [clang] [llvm] [DirectX] Add DirectXTargetCodeGenInfo (PR #104856)   Justin Bogner via llvm-commits
• [llvm] [DirectX] Lower `@llvm.dx.typedBufferStore` to DXIL ops (PR #104253)   Justin Bogner via llvm-commits
• [llvm] [DirectX] Lower `@llvm.dx.typedBufferStore` to DXIL ops (PR #104253)   Justin Bogner via llvm-commits
• [llvm] [DirectX] Implement typedBufferLoad_checkbit (PR #108087)   Justin Bogner via llvm-commits
• [llvm] [DirectX] Preserve value names in DXILOpLowering. NFC (PR #108089)   Justin Bogner via llvm-commits
• [llvm] [DirectX] Implement typedBufferLoad_checkbit (PR #108087)   Justin Bogner via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   Justin Bogner via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   Justin Bogner via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   Justin Bogner via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   Justin Bogner via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   Justin Bogner via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   Justin Bogner via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   Justin Bogner via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   Justin Bogner via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   Justin Bogner via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   Justin Bogner via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   Justin Bogner via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   Justin Bogner via llvm-commits
• [llvm] [DirectX] Implement typedBufferLoad_checkbit (PR #108087)   Justin Bogner via llvm-commits
• [llvm] [DirectX] Preserve value names in DXILOpLowering. NFC (PR #108089)   Justin Bogner via llvm-commits
• [llvm] [DirectX] Implement typedBufferLoad_checkbit (PR #108087)   Justin Bogner via llvm-commits
• [llvm] [DirectX] Preserve value names in DXILOpLowering. NFC (PR #108089)   Justin Bogner via llvm-commits
• [llvm] [DirectX] Preserve value names in DXILOpLowering. NFC (PR #108089)   Justin Bogner via llvm-commits
• [llvm] [DirectX] Preserve value names in DXILOpLowering. NFC (PR #108089)   Justin Bogner via llvm-commits
• [llvm] [DirectX] fix fail test (PR #108468)   Justin Bogner via llvm-commits
• [llvm] [DirectX] fix fail test (PR #108468)   Justin Bogner via llvm-commits
• [llvm] [NFC][DirectX] Remove rcp dx intrinsic (PR #108626)   Justin Bogner via llvm-commits
• [clang] [llvm] [NVPTX] Remove nvvm.bitcast.* intrinsics (PR #107936)   Justin Fargnoli via llvm-commits
• [clang] [llvm] [LLVM] Add IRNormalizer Pass (PR #68176)   Justin Fargnoli via llvm-commits
• [llvm] [NVPTX] deprecate nvvm.rotate.* intrinsics, cleanup funnel-shift handeling (PR #107655)   Justin Lebar via llvm-commits
• [llvm] [llvm][Support] Determine the max thread length on Haiku (PR #107801)   Jérôme Duval via llvm-commits
• [llvm] [hurd] Fix accessing f_type field of statvfs (PR #71851)   Kazu Hirata via llvm-commits
• [llvm] [NFC][TableGen] DirectiveEmitter code cleanup (PR #107775)   Kazu Hirata via llvm-commits
• [llvm] [Analysis] Avoid repeated hash lookups (NFC) (PR #107794)   Kazu Hirata via llvm-commits
• [llvm] [Float2Int] Avoid repeated hash lookups (NFC) (PR #107795)   Kazu Hirata via llvm-commits
• [llvm] [IPO] Avoid repeated hash lookups (NFC) (PR #107796)   Kazu Hirata via llvm-commits
• [llvm] [StructurizeCFG] Avoid repeated hash lookups (NFC) (PR #107797)   Kazu Hirata via llvm-commits
• [llvm] [LTO] Simplify calculateCallGraphRoot (NFC) (PR #107765)   Kazu Hirata via llvm-commits
• [llvm] [NFC][TableGen] DirectiveEmitter code cleanup (PR #107775)   Kazu Hirata via llvm-commits
• [llvm] [TableGen] Change CGIOperandList::OperandInfo::Rec to const pointer (PR #107858)   Kazu Hirata via llvm-commits
• [llvm] 34e3007 - [ARM] Fix a warning   Kazu Hirata via llvm-commits
• [llvm] [LTO][NFC] Fix forward declaration (PR #107902)   Kazu Hirata via llvm-commits
• [llvm] [mlir] [ADT] Make DenseMap/DenseSet more resilient agains OOM situations (PR #107251)   Kazu Hirata via llvm-commits
• [llvm] [LTO] Remove unused includes (NFC) (PR #108110)   Kazu Hirata via llvm-commits
• [llvm] [LTO] Remove unused includes (NFC) (PR #108110)   Kazu Hirata via llvm-commits
• [llvm] [TableGen] Avoid repeated hash lookps (NFC) (PR #108138)   Kazu Hirata via llvm-commits
• [llvm] [TableGen] Avoid repeated hash lookups (NFC) (PR #108138)   Kazu Hirata via llvm-commits
• [llvm] [ADT][NFC] Clang-format DenseMap and DenseSet (PR #108162)   Kazu Hirata via llvm-commits
• [llvm] [ADT][NFC] Constexpr-ify if in DenseMap::clear (PR #108243)   Kazu Hirata via llvm-commits
• [llvm] [ctx_prof] Relax the "profile use" case around `PGOOpt` (PR #108265)   Kazu Hirata via llvm-commits
• [llvm] [ADT][NFC] Remove unused parameter from DenseMap::InsertIntoBucketImpl (PR #108382)   Kazu Hirata via llvm-commits
• [llvm] [ADT][NFC] Refactor/optimize DenseMap::copyFrom (PR #108377)   Kazu Hirata via llvm-commits
• [llvm] [ADT][NFC] Refactor/optimize DenseMap::copyFrom (PR #108377)   Kazu Hirata via llvm-commits
• [llvm] [IRSim] Avoid repeated hash lookups (NFC) (PR #108483)   Kazu Hirata via llvm-commits
• [llvm] [LiveDebugValues] Avoid repeated hash lookups (NFC) (PR #108484)   Kazu Hirata via llvm-commits
• [llvm] [IR] Avoid repeated hash lookups (NFC) (PR #108485)   Kazu Hirata via llvm-commits
• [llvm] [DebugInfo] Avoid repeated hash lookups (NFC) (PR #108486)   Kazu Hirata via llvm-commits
• [llvm] [DebugInfo] Avoid repeated hash lookups (NFC) (PR #108486)   Kazu Hirata via llvm-commits
• [llvm] [IR] Avoid repeated hash lookups (NFC) (PR #108485)   Kazu Hirata via llvm-commits
• [llvm] [CodeGen] Use DenseMap::operator[] (NFC) (PR #108489)   Kazu Hirata via llvm-commits
• [llvm] [CodeGen] Use DenseMap::operator[] (NFC) (PR #108489)   Kazu Hirata via llvm-commits
• [llvm] [LiveDebugValues] Avoid repeated hash lookups (NFC) (PR #108484)   Kazu Hirata via llvm-commits
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• [compiler-rt] 3e04ad4 - [ORC-RT] Remove double underscore from the orc_rt namespace.   Lang Hames via llvm-commits
• [compiler-rt] 462251b - [ORC-RT] Replace FnTag arg of WrapperFunction::call with generic dispatch arg.   Lang Hames via llvm-commits
• [compiler-rt] 9b67c99 - [ORC-RT] Fix typo in 462251b80b7.   Lang Hames via llvm-commits
• [compiler-rt] 69f8923 - Re-apply "[ORC-RT] Replace FnTag arg of WrapperFunction::call..." with fixes.   Lang Hames via llvm-commits
• [compiler-rt] [llvm] [ORC][Runtime] Enhancing ELF Platform with Push-Request Model for Initializers (PR #102846)   Lang Hames via llvm-commits
• [compiler-rt] [llvm] [ORC][Runtime] Add `dlupdate` for MachO (PR #97441)   Lang Hames via llvm-commits
• [llvm] 5e80fc8 - [opt] Fix opt for LLVM_ENABLE_EXPORTED_SYMBOLS_IN_EXECUTABLES=Off.   Lang Hames via llvm-commits
• [llvm] 2e18f63 - Fix some unit tests for LLVM_ENABLE_EXPORTED_SYMBOLS_IN_EXECUTABLES=Off.   Lang Hames via llvm-commits
• [llvm] 35a0fd5 - Fix some another unit test for LLVM_ENABLE_EXPORTED_SYMBOLS_IN_EXECUTABLES=Off.   Lang Hames via llvm-commits
• [llvm] [x86] Add lowering for `@llvm.experimental.vector.compress` (PR #104904)   Lawrence Benson via llvm-commits
• [llvm] [AArch64] Extend custom lowering for SVE types in `@llvm.experimental.vector.compress` (PR #105515)   Lawrence Benson via llvm-commits
• [llvm] [x86] Add lowering for `@llvm.experimental.vector.compress` (PR #104904)   Lawrence Benson via llvm-commits
• [llvm] [PowerPC] Fix assert exposed by PR 95931 in LowerBITCAST (PR #108062)   Lei Huang via llvm-commits
• [llvm] [PowerPC] Fix assert exposed by PR 95931 in LowerBITCAST (PR #108062)   Lei Huang via llvm-commits
• [llvm] [NFC] Update function names in MCTargetAsmParser.h (PR #108643)   Lei Huang via llvm-commits
• [llvm] [NFC] Update function names in MCTargetAsmParser.h (PR #108643)   Lei Huang via llvm-commits
• [llvm] [ARM] Fix VBICimm and VORRimm generation under Big endian. (PR #107813)   Longsheng Mou via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle] Set `InConstraintExpr` to `true` when demangling a constraint expression (PR #107385)   Louis Dionne via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle] Set `InConstraintExpr` to `true` when demangling a constraint expression (PR #107385)   Louis Dionne via llvm-commits
• [libcxx] [libcxxabi] [libunwind] [llvm] [runtimes] Probe for -nostdlib++ and -nostdinc++ with the C compiler (PR #108357)   Louis Dionne via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle] Add template name to the substituions list during demangling (PR #108538)   Louis Dionne via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle] Add template name to the substituions list during demangling (PR #108538)   Louis Dionne via llvm-commits
• [llvm] [LoongArch][ISel] Check the number of sign bits in `PatGprGpr_32` (PR #107432)   Lu Weining via llvm-commits
• [llvm] [LoongArch] Codegen for concat_vectors with LASX (PR #107523)   Lu Weining via llvm-commits
• [clang] [llvm] [llvm][Triple] Add `Environment` members and parsing for glibc/musl parity. (PR #107664)   Lu Weining via llvm-commits
• [llvm] [LoongArch] Eliminate the redundant sign extension of division (PR #107971)   Lu Weining via llvm-commits
• [llvm] [LoongArch] Implement Statepoint lowering (PR #108212)   Lu Weining via llvm-commits
• [llvm] [loongarch][DAG][FREEZE] Fix crash when FREEZE a half(f16) type on loongarch (PR #107791)   Lu Weining via llvm-commits
• [llvm] [LoongArch] Implement Statepoint lowering (PR #108212)   Lu Weining via llvm-commits
• [llvm] [loongarch][DAG][FREEZE] Fix crash when FREEZE a half(f16) type on loongarch (PR #107791)   Lu Weining via llvm-commits
• [compiler-rt] [LoongArch][sanitizer] Fix SC_ADDRERR_{RD,WR} missing in the musl environment (PR #108557)   Lu Weining via llvm-commits
• [llvm] [RISCV] Move vmerge same mask peephole to RISCVVectorPeephole (PR #106108)   Luke Lau via llvm-commits
• [llvm] [RISCV] Fix same mask vmerge peephole discarding false operand (PR #107827)   Luke Lau via llvm-commits
• [llvm] [RISCV] Move vmerge same mask peephole to RISCVVectorPeephole (PR #106108)   Luke Lau via llvm-commits
• [llvm] [RISCV] Move vmerge same mask peephole to RISCVVectorPeephole (PR #106108)   Luke Lau via llvm-commits
• [llvm] [RISCV] Fix same mask vmerge peephole discarding false operand (PR #107827)   Luke Lau via llvm-commits
• [llvm] [InitUndef] Don't use largest super class (PR #107885)   Luke Lau via llvm-commits
• [llvm] [RISCV] Add tests for memcmp expansion (PR #107824)   Luke Lau via llvm-commits
• [llvm] [InitUndef] Don't use largest super class (PR #107885)   Luke Lau via llvm-commits
• [llvm] [InitUndef] Don't use largest super class (PR #107885)   Luke Lau via llvm-commits
• [llvm] [InitUndef] Don't use largest super class (PR #107885)   Luke Lau via llvm-commits
• [llvm] b71d88c - [RISCV] Constrain passthru regclass in vmerge -> vmv peephole   Luke Lau via llvm-commits
• [llvm] 7ba6768 - Revert "[RISCV] Update V0Defs after moving Src in peepholes (#107359)"   Luke Lau via llvm-commits
• [llvm] [RISCV] Rematerialize vmv.v.x (PR #107993)   Luke Lau via llvm-commits
• [llvm] [RISCV] Rematerialize vfmv.v.f (PR #108007)   Luke Lau via llvm-commits
• [llvm] [RISCV] Rematerialize vmv.s.x and vfmv.s.f (PR #108012)   Luke Lau via llvm-commits
• [llvm] [RISCV] Rematerialize vmv.v.x (PR #107993)   Luke Lau via llvm-commits
• [llvm] [RISCV] Add reductions to list of roots in tryToReduceVL (PR #107595)   Luke Lau via llvm-commits
• [llvm] [RISCV] Rematerialize vmv.v.x (PR #107993)   Luke Lau via llvm-commits
• [llvm] [RISCV] Rematerialize vfmv.v.f (PR #108007)   Luke Lau via llvm-commits
• [llvm] [RISCV] Rematerialize vfmv.v.f (PR #108007)   Luke Lau via llvm-commits
• [llvm] [RISCV] Rematerialize vmv.s.x and vfmv.s.f (PR #108012)   Luke Lau via llvm-commits
• [llvm] [RISCV] Rematerialize vmv.s.x and vfmv.s.f (PR #108012)   Luke Lau via llvm-commits
• [llvm] [RISCV] Expand mul X, C where C=2^N*(3, 5, 9)*(3, 5, 9) (PR #108100)   Luke Lau via llvm-commits
• [llvm] [RISCV] Add fixed length vector patterns for vfwmaccbf16.vv (PR #108204)   Luke Lau via llvm-commits
• [llvm] [RISCV] Add fixed length vector patterns for vfwmaccbf16.vv (PR #108204)   Luke Lau via llvm-commits
• [llvm] [RISCV] Expand bf16 vector truncstores and extloads (PR #108235)   Luke Lau via llvm-commits
• [llvm] 30fbfe5 - [RISCV] Reorder zvfbfmin operation actions to match zvfhmin. NFC   Luke Lau via llvm-commits
• [llvm] [RISCV] Expand bf16 FNEG/FABS/FCOPYSIGN (PR #108245)   Luke Lau via llvm-commits
• [llvm] [RISCV] Expand bf16 FNEG/FABS/FCOPYSIGN (PR #108245)   Luke Lau via llvm-commits
• [llvm] [RISCV] Lower f16/bf16 splat_vector by bitcasting to i16 instead of promoting to f16. (PR #108298)   Luke Lau via llvm-commits
• [llvm] [RISCV] Lower f16/bf16 splat_vector by bitcasting to i16 instead of promoting to f16. (PR #108298)   Luke Lau via llvm-commits
• [llvm] [RISCV] Lower f16/bf16 splat_vector by bitcasting to i16 instead of promoting to f16. (PR #108298)   Luke Lau via llvm-commits
• [llvm] [RISCV] Lower f16/bf16 splat_vector by bitcasting to i16 instead of promoting to f16. (PR #108298)   Luke Lau via llvm-commits
• [llvm] [RISCV] Lower f16/bf16 splat_vector by bitcasting to i16 instead of promoting to f16. (PR #108298)   Luke Lau via llvm-commits
• [llvm] [RISCV] Expand bf16 FNEG/FABS/FCOPYSIGN (PR #108245)   Luke Lau via llvm-commits
• [llvm] [InitUndef] Only compute DeadLaneDetector if subreg liveness enabled (NFC) (PR #108279)   Luke Lau via llvm-commits
• [llvm] [RISCV] Lower bf16 {S,U}INT_TO_FP, FP_TO_{S,U}INT and VP variants (PR #108338)   Luke Lau via llvm-commits
• [llvm] ecf260e - [RISCV] Merge bf16 tests into respective tests. NFC   Luke Lau via llvm-commits
• [llvm] 89c10e2 - [RISCV] Add zvfhmin cost model test coverage. NFC   Luke Lau via llvm-commits
• [llvm] [RISCV] Handle zvfhmin promotion to f32 in half arith costs (PR #108361)   Luke Lau via llvm-commits
• [llvm] [RISCV] Account for zvfhmin and zvfbfmin promotion in register usage (PR #108370)   Luke Lau via llvm-commits
• [llvm] [RISCV] Account for zvfhmin and zvfbfmin promotion in register usage (PR #108370)   Luke Lau via llvm-commits
• [llvm] [RISCV] Lower interleave + deinterleave for zvfhmin and zvfbfmin (PR #108404)   Luke Lau via llvm-commits
• [llvm] [RISCV] Lower interleave + deinterleave for zvfhmin and zvfbfmin (PR #108404)   Luke Lau via llvm-commits
• [llvm] [RISCV] Lower bf16 {S,U}INT_TO_FP, FP_TO_{S,U}INT and VP variants (PR #108338)   Luke Lau via llvm-commits
• [llvm] [RISCV] Add Zvfhmin to RISCVUsage.rst. NFC (PR #108574)   Luke Lau via llvm-commits
• [llvm] [RISCV] Introduce VLOptimizer pass (PR #108640)   Luke Lau via llvm-commits
• [llvm] [RISCV] Introduce VLOptimizer pass (PR #108640)   Luke Lau via llvm-commits
• [llvm] [RISCV] Split fp rounding ops with zvfhmin nxv32f16 (PR #108765)   Luke Lau via llvm-commits
• [llvm] [RISCV] Split fp rounding ops with zvfhmin nxv32f16 (PR #108765)   Luke Lau via llvm-commits
• [llvm] LCA: migrate from DA to LAA; fix cost computation (PR #107691)   Madhur Amilkanthwar via llvm-commits
• [llvm] [AArch64] Extend and rewrite load zero and load undef patterns (PR #108185)   Madhur Amilkanthwar via llvm-commits
• [llvm] [LoopPeel] Added support for cases where PhiAnalyzer contains Induction PHI (PR #94900)   Madhur Amilkanthwar via llvm-commits
• [llvm] [AArch64][CostModel] Reduce the cost of fadd reduction with fast flag (PR #108791)   Madhur Amilkanthwar via llvm-commits
• [llvm] [AArch64][CostModel] Reduce the cost of fadd reduction with fast flag (PR #108791)   Madhur Amilkanthwar via llvm-commits
• [llvm] [AArch64][CostModel] Reduce the cost of fadd reduction with fast flag (PR #108791)   Madhur Amilkanthwar via llvm-commits
• [llvm] [BOLT][AArch64] Do not relax ADR referencing the same fragment (PR #108673)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT][AArch64] Do not relax ADR referencing the same fragment (PR #108673)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT] X86: add .iplt support (PR #106513)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT] Add .iplt support to x86 (PR #106513)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT] Fix order of R_*_IRELATIVE in .rela.plt (PR #106515)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT] Fix order of R_*_IRELATIVE in .rela.plt (PR #106515)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT] Fix order of R_*_IRELATIVE in .rela.plt (PR #106515)   Maksim Panchenko via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)   Malay Sanghi via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)   Malay Sanghi via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)   Malay Sanghi via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)   Malay Sanghi via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)   Malay Sanghi via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)   Malay Sanghi via llvm-commits
• [llvm] [mlir] [ADT] Make DenseMap/DenseSet more resilient agains OOM situations (PR #107251)   Marc Auberer via llvm-commits
• [llvm] [mlir] [ADT] Make DenseMap/DenseSet more resilient agains OOM situations (PR #107251)   Marc Auberer via llvm-commits
• [llvm] [mlir] [ADT] Make DenseMap/DenseSet more resilient agains OOM situations (PR #107251)   Marc Auberer via llvm-commits
• [llvm] [mlir] [ADT] Make DenseMap/DenseSet more resilient agains OOM situations (PR #107251)   Marc Auberer via llvm-commits
• [llvm] [mlir] [ADT] Make DenseMap/DenseSet more resilient agains OOM situations (PR #107251)   Marc Auberer via llvm-commits
• [llvm] [ADT] Clang-format DenseMap and DenseSet (PR #108162)   Marc Auberer via llvm-commits
• [llvm] [mlir] [ADT] Make DenseMap/DenseSet more resilient agains OOM situations (PR #107251)   Marc Auberer via llvm-commits
• [llvm] [ADT][NFC] Clang-format DenseMap and DenseSet (PR #108162)   Marc Auberer via llvm-commits
• [llvm] [ADT][NFC] Clang-format DenseMap and DenseSet (PR #108162)   Marc Auberer via llvm-commits
• [llvm] [ADT][NFC] Clang-format DenseMap and DenseSet (PR #108162)   Marc Auberer via llvm-commits
• [llvm] [ADT][NFC] Constexpr-ify if in DenseMap::clear (PR #108243)   Marc Auberer via llvm-commits
• [llvm] [ADT][NFC] Constexpr-ify if in DenseMap::clear (PR #108243)   Marc Auberer via llvm-commits
• [llvm] [mlir] [ADT] Make DenseMap/DenseSet more resilient agains OOM situations (PR #107251)   Marc Auberer via llvm-commits
• [llvm] update llvm-dis header with available options (PR #108073)   Marc Auberer via llvm-commits
• [llvm] [ADT][NFC] Refactor/optimize DenseMap::copyFrom (PR #108377)   Marc Auberer via llvm-commits
• [llvm] [ADT][NFC] Refactor/optimize DenseMap::copyFrom (PR #108377)   Marc Auberer via llvm-commits
• [llvm] [ADT][NFC] Remove unused parameter from DenseMap::InsertIntoBucketImpl (PR #108382)   Marc Auberer via llvm-commits
• [llvm] [ADT][NFC] Refactor/optimize DenseMap::copyFrom (PR #108377)   Marc Auberer via llvm-commits
• [llvm] [ADT][NFC] Refactor/optimize DenseMap::copyFrom (PR #108377)   Marc Auberer via llvm-commits
• [llvm] [ADT][NFC] Remove unused parameter from DenseMap::InsertIntoBucketImpl (PR #108382)   Marc Auberer via llvm-commits
• [llvm] [ADT][NFC] Refactor/optimize DenseMap::copyFrom (PR #108377)   Marc Auberer via llvm-commits
• [llvm] [ADT][NFC] Refactor/optimize DenseMap::copyFrom (PR #108377)   Marc Auberer via llvm-commits
• [llvm] [ADT][NFC] Refactor/optimize DenseMap::copyFrom (PR #108377)   Marc Auberer via llvm-commits
• [llvm] [mlir] [ADT] Make DenseMap/DenseSet more resilient agains OOM situations (PR #107251)   Marc Auberer via llvm-commits
• [llvm] [InstCombine] Compare `icmp inttoptr, inttoptr` values directly (PR #107012)   Marina Taylor via llvm-commits
• [llvm] [InstCombine] Compare `icmp inttoptr, inttoptr` values directly (PR #107012)   Marina Taylor via llvm-commits
• [llvm] [InstCombine] Compare `icmp inttoptr, inttoptr` values directly (PR #107012)   Marina Taylor via llvm-commits
• [llvm] [InstCombine] Fold `(X==Z || Y==Z) ? (X==Z && Y==Z) : X==Y --> X==Y` (PR #108619)   Marina Taylor via llvm-commits
• [llvm] [Triple] Make mipsel-*-windows-* use COFF files by default (PR #107809)   Martin Storsjö via llvm-commits
• [clang] [lld] [llvm] [clang][MIPS] Add support for mipsel-windows-* targets (PR #107744)   Martin Storsjö via llvm-commits
• [clang] [lld] [llvm] [clang][MIPS] Add support for mipsel-windows-* targets (PR #107744)   Martin Storsjö via llvm-commits
• [clang] [lld] [llvm] [clang][MIPS] Add support for mipsel-windows-* targets (PR #107744)   Martin Storsjö via llvm-commits
• [clang] [lld] [llvm] [clang][MIPS] Add support for mipsel-windows-* targets (PR #107744)   Martin Storsjö via llvm-commits
• [clang] [lld] [llvm] [clang][MIPS] Add support for mipsel-windows-* targets (PR #107744)   Martin Storsjö via llvm-commits
• [clang] [lld] [llvm] [clang][MIPS] Add support for mipsel-windows-* targets (PR #107744)   Martin Storsjö via llvm-commits
• [clang] [lld] [llvm] [clang][MIPS] Add support for mipsel-windows-* targets (PR #107744)   Martin Storsjö via llvm-commits
• [clang] [lld] [llvm] [clang][MIPS] Add support for mipsel-windows-* targets (PR #107744)   Martin Storsjö via llvm-commits
• [clang] [lld] [llvm] [clang][MIPS] Add support for mipsel-windows-* targets (PR #107744)   Martin Storsjö via llvm-commits
• [llvm] [cmake] Set up llvm-ml as ASM_MASM tool in WinMsvc.cmake (PR #104903)   Martin Storsjö via llvm-commits
• [llvm] [llvm-ml] Fix RIP-relative addressing for ptr operands (PR #107618)   Martin Storsjö via llvm-commits
• [llvm] [llvm-ml] Fix RIP-relative addressing for ptr operands (PR #107618)   Martin Storsjö via llvm-commits
• [clang] [lld] [llvm] [clang][MIPS] Add support for mipsel-windows-* targets (PR #107744)   Martin Storsjö via llvm-commits
• [llvm] 1581183 - Revert "[llvm-ml] Fix RIP-relative addressing for ptr operands (#107618)"   Martin Storsjö via llvm-commits
• [llvm] [llvm-ml] Fix RIP-relative addressing for ptr operands (PR #107618)   Martin Storsjö via llvm-commits
• [lld] [LLD][COFF][NFC] Create import thunks in ImportFile::parse. (PR #107929)   Martin Storsjö via llvm-commits
• [lld] [LLD][COFF] Add support for ARM64EC import call thunks. (PR #107931)   Martin Storsjö via llvm-commits
• [lld] [LLD][COFF] Add support for ARM64EC import call thunks. (PR #107931)   Martin Storsjö via llvm-commits
• [lld] [LLD][COFF] Add support for ARM64EC import call thunks. (PR #107931)   Martin Storsjö via llvm-commits
• [lld] [LLD][COFF] Add support for ARM64EC import call thunks. (PR #107931)   Martin Storsjö via llvm-commits
• [lld] [LLD][COFF] Add support for ARM64EC import call thunks. (PR #107931)   Martin Storsjö via llvm-commits
• [clang] [compiler-rt] Reland [asan][windows] Eliminate the static asan runtime on windows (PR #107899)   Martin Storsjö via llvm-commits
• [compiler-rt] [builtins] Fix missing main() function in float16/bfloat16 support checks (PR #104478)   Martin Storsjö via llvm-commits
• [libcxx] [libcxxabi] [libunwind] [llvm] [runtimes] Probe for -nostdlib++ and -nostdinc++ with the C compiler (PR #108357)   Martin Storsjö via llvm-commits
• [compiler-rt] [compiler-rt] [MSVC] Detect MSVC as a compiler-id for lit. (PR #108255)   Martin Storsjö via llvm-commits
• [lld] [LLD][COFF] Add support for ARM64EC auxiliary IAT (PR #108304)   Martin Storsjö via llvm-commits
• [lld] [LLD][COFF] Add support for ARM64EC auxiliary IAT (PR #108304)   Martin Storsjö via llvm-commits
• [lld] [LLD][COFF] Add support for ARM64EC auxiliary IAT (PR #108304)   Martin Storsjö via llvm-commits
• [lld] [LLD][COFF] Add support for ARM64EC auxiliary IAT (PR #108304)   Martin Storsjö via llvm-commits
• [lld] [LLD][COFF] Add support for ARM64EC auxiliary IAT (PR #108304)   Martin Storsjö via llvm-commits
• [lld] [LLD][COFF] Add support for ARM64EC auxiliary IAT (PR #108304)   Martin Storsjö via llvm-commits
• [llvm] [Windows SEH] Fix crash on empty seh block (PR #107031)   Martin Storsjö via llvm-commits
• [libcxx] [libcxxabi] [libunwind] [llvm] [runtimes] Probe for -nostdlib++ and -nostdinc++ with the C compiler (PR #108357)   Martin Storsjö via llvm-commits
• [lld] [LLD][COFF] Add support for ARM64EC auxiliary IAT (PR #108304)   Martin Storsjö via llvm-commits
• [llvm] Reland [llvm-ml] Fix RIP-relative addressing for ptr operands (PR #108061)   Martin Storsjö via llvm-commits
• [llvm] Reland [llvm-ml] Fix RIP-relative addressing for ptr operands (PR #108061)   Martin Storsjö via llvm-commits
• [lld] [LLD][COFF][NFC] Store live flag in ImportThunkChunk. (PR #108459)   Martin Storsjö via llvm-commits
• [lld] [LLD][COFF][NFC] Store live flag in ImportThunkChunk. (PR #108459)   Martin Storsjö via llvm-commits
• [lld] [LLD][COFF][NFC] Store live flag in ImportThunkChunk. (PR #108459)   Martin Storsjö via llvm-commits
• [lld] [LLD][COFF][NFC] Store live flag in ImportThunkChunk. (PR #108459)   Martin Storsjö via llvm-commits
• [lld] [LLD][COFF] Add Support for ARM64EC Import Thunks (PR #108460)   Martin Storsjö via llvm-commits
• [lld] [LLD][COFF] Add Support for ARM64EC Import Thunks (PR #108460)   Martin Storsjö via llvm-commits
• [lld] [LLD][COFF] Add Support for ARM64EC Import Thunks (PR #108460)   Martin Storsjö via llvm-commits
• [lld] [LLD][COFF] Add Support for ARM64EC Import Thunks (PR #108460)   Martin Storsjö via llvm-commits
• [clang] [clang-tools-extra] [llvm] [clang] WIP: Improved Context Declaration tracking (PR #107942)   Matheus Izvekov via llvm-commits
• [clang] [clang-tools-extra] [llvm] [clang] WIP: Improved Context Declaration tracking (PR #107942)   Matheus Izvekov via llvm-commits
• [clang] [clang-tools-extra] [llvm] [clang] WIP: Improved Context Declaration tracking (PR #107942)   Matheus Izvekov via llvm-commits
• [clang] [clang-tools-extra] [llvm] [clang] WIP: Improved Context Declaration tracking (PR #107942)   Matheus Izvekov via llvm-commits
• [clang] [clang-tools-extra] [llvm] [clang] WIP: Improved Context Declaration tracking (PR #107942)   Matheus Izvekov via llvm-commits
• [clang] [clang-tools-extra] [llvm] [clang] WIP: Improved Context Declaration tracking (PR #107942)   Matheus Izvekov via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle] Set `InConstraintExpr` to `true` when demangling a constraint expression (PR #107385)   Matheus Izvekov via llvm-commits
• [llvm] [TableGen] Migrate CodeGenHWModes to use const RecordKeeper (PR #107851)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Remove flat/global fmin/fmax intrinsics (PR #105642)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Remove flat/global fmin/fmax intrinsics (PR #105642)   Matt Arsenault via llvm-commits
• [llvm] Reland "[NVPTX] Support copysign PTX instruction" (PR #108125)   Matt Arsenault via llvm-commits
• [llvm] Reland "[amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic" (#108054)" (PR #108173)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Shrink a live interval instead of recomputing it. NFCI. (PR #108171)   Matt Arsenault via llvm-commits
• [llvm] [MIPS] Fix -msingle-float doesn't work with double on O32 (PR #107543)   Matt Arsenault via llvm-commits
• [llvm] [TableGen] Avoid repeated hash lookups (NFC) (PR #108138)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Fix documentation for ISD::ATOMIC_STORE (PR #108126)   Matt Arsenault via llvm-commits
• [llvm] [llvm-objcopy][ELF] Disable huge section offset (PR #97036)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix selection of s_load_b96 on GFX11 (PR #108029)   Matt Arsenault via llvm-commits
• [llvm] [TableGen] Change CodeGenRegister to use const Record pointer (PR #108027)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][MC] Implement fft and rotate modes for ds_swizzle_b32 (PR #108064)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][MC] Implement fft and rotate modes for ds_swizzle_b32 (PR #108064)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][MC] Implement fft and rotate modes for ds_swizzle_b32 (PR #108064)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][MC] Implement fft and rotate modes for ds_swizzle_b32 (PR #108064)   Matt Arsenault via llvm-commits
• [llvm] [TableGen] Change SubtargetFeatureInfo to use const Record pointers (PR #108013)   Matt Arsenault via llvm-commits
• [llvm] [SDAG] Simplify divergence verification (PR #108182)   Matt Arsenault via llvm-commits
• [llvm] [SDAG] Simplify divergence verification (PR #108182)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Simplify and improve codegen for llvm.amdgcn.set.inactive (PR #107889)   Matt Arsenault via llvm-commits
• [llvm] [TableGen] Resolve arguments with fields in records (PR #107829)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][NewPM] Port SIPeepholeSDWA pass to NPM (PR #107049)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][NewPM] Port SIPeepholeSDWA pass to NPM (PR #107049)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Simplify and improve codegen for llvm.amdgcn.set.inactive (PR #107889)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fold fmod to frem if we know it does not set errno. (PR #107912)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fold fmod to frem if we know it does not set errno. (PR #107912)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Simplify and improve codegen for llvm.amdgcn.set.inactive (PR #107889)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Enable reordering of VMEM loads during clustering (PR #107986)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Enable reordering of VMEM loads during clustering (PR #107986)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Enable reordering of VMEM loads during clustering (PR #107986)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Enable reordering of VMEM loads during clustering (PR #107986)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Make more use of getWaveMaskRegClass. NFC. (PR #108186)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][True16][MC] 16bit vsrc and vdst support in MC (PR #104510)   Matt Arsenault via llvm-commits
• [clang] [llvm] [SPIRV][RFC] Rework / extend support for memory scopes (PR #106429)   Matt Arsenault via llvm-commits
• [clang] [llvm] [SPIRV][RFC] Rework / extend support for memory scopes (PR #106429)   Matt Arsenault via llvm-commits
• [clang] [llvm] [SPIRV][RFC] Rework / extend support for memory scopes (PR #106429)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Fold trunc(srl(extract_elt(vec,c1),c2)) -> extract_elt(bitcast(vec),c3) (PR #107987)   Matt Arsenault via llvm-commits
• [llvm] [LegalizeIntegerTypes] Simplify ExpandIntRes_FP_TO_XINT when operand needs to be SoftPromoted. (PR #107634)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Enhance inline asm constraint diagnostics (PR #101354)   Matt Arsenault via llvm-commits
• [llvm] [X86][GlobalISel] Enable scalar versions of G_UITOFP and G_FPTOUI (PR #100079)   Matt Arsenault via llvm-commits
• [llvm] [X86][GlobalISel] Enable scalar versions of G_UITOFP and G_FPTOUI (PR #100079)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix selection of s_load_b96 on GFX11 (PR #108029)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix selection of s_load_b96 on GFX11 (PR #108029)   Matt Arsenault via llvm-commits
• [llvm] [TableGen] Migrate Option Emitters to const RecordKeeper (PR #107696)   Matt Arsenault via llvm-commits
• [llvm] [TableGen] Change CodeGenInstruction record members to const (PR #107921)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][GlobalISel] Implement selectVaStartAAPCS (PR #106979)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][GlobalISel] Implement selectVaStartAAPCS (PR #106979)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][GlobalISel] Implement selectVaStartAAPCS (PR #106979)   Matt Arsenault via llvm-commits
• [llvm] [Xtensa] Lowering FRAMEADDR/RETURNADDR operations. (PR #107363)   Matt Arsenault via llvm-commits
• [llvm] [Xtensa] Lowering FRAMEADDR/RETURNADDR operations. (PR #107363)   Matt Arsenault via llvm-commits
• [llvm] [Xtensa] Lowering FRAMEADDR/RETURNADDR operations. (PR #107363)   Matt Arsenault via llvm-commits
• [llvm] [Xtensa] Lowering FRAMEADDR/RETURNADDR operations. (PR #107363)   Matt Arsenault via llvm-commits
• [llvm] [NewPM][CodeGen] Port MachineLICM to NPM (PR #107376)   Matt Arsenault via llvm-commits
• [llvm] [NewPM][CodeGen] Port MachineLICM to NPM (PR #107376)   Matt Arsenault via llvm-commits
• [llvm] [NewPM][CodeGen] Port MachineLICM to NPM (PR #107376)   Matt Arsenault via llvm-commits
• [llvm] [NewPM][CodeGen] Port MachineLICM to NPM (PR #107376)   Matt Arsenault via llvm-commits
• [llvm] [NewPM][CodeGen] Port MachineLICM to NPM (PR #107376)   Matt Arsenault via llvm-commits
• [llvm] [mlir] eliminating g++ warnings (PR #105520)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Calculate KnownBits for SMIN (PR #85584)   Matt Arsenault via llvm-commits
• [llvm] [NFC][EarlyIfConverter] Turn SSAIfConv into a local variable (PR #107390)   Matt Arsenault via llvm-commits
• [llvm] [NFC][EarlyIfConverter] Turn SSAIfConv into a local variable (PR #107390)   Matt Arsenault via llvm-commits
• [llvm] [NFC][EarlyIfConverter] Turn SSAIfConv into a local variable (PR #107390)   Matt Arsenault via llvm-commits
• [llvm] [NFC][EarlyIfConverter] Turn SSAIfConv into a local variable (PR #107390)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Remove dead code in SIISelLowering (NFC) (PR #108198)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Remove dead code in SIISelLowering (NFC) (PR #108198)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Remove dead code in SIISelLowering (NFC) (PR #108198)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][MC] Disallow null as saddr in flat instructions (PR #101730)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Remove flat/global fmin/fmax intrinsics (PR #105642)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] eliminate frame index v_add wave32 test (PR #107832)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] eliminate frame index v_add wave32 test (PR #107832)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] eliminate frame index v_add wave32 test (PR #107832)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] eliminate frame index v_add wave32 test (PR #107832)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] SplitModule: Better handling of aliases & inline assembly (PR #106528)   Matt Arsenault via llvm-commits
• [llvm] [loongarch][DAG][FREEZE] Fix crash when FREEZE a half(f16) type on loongarch (PR #107791)   Matt Arsenault via llvm-commits
• [llvm] [loongarch][DAG][FREEZE] Fix crash when FREEZE a half(f16) type on loongarch (PR #107791)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add MachineVerifier check to detect illegal copies from vector register to SGPR (PR #105494)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Drop and upgrade llvm.amdgcn.atomic.csub/cond.sub to atomicrmw (PR #105553)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Drop and upgrade llvm.amdgcn.atomic.csub/cond.sub to atomicrmw (PR #105553)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Drop and upgrade llvm.amdgcn.atomic.csub/cond.sub to atomicrmw (PR #105553)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Drop and upgrade llvm.amdgcn.atomic.csub/cond.sub to atomicrmw (PR #105553)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Drop and upgrade llvm.amdgcn.atomic.csub/cond.sub to atomicrmw (PR #105553)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Drop and upgrade llvm.amdgcn.atomic.csub/cond.sub to atomicrmw (PR #105553)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Error on non-global pointer with s_prefetch_data (PR #107624)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Error on non-global pointer with s_prefetch_data (PR #107624)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Error on non-global pointer with s_prefetch_data (PR #107624)   Matt Arsenault via llvm-commits
• [llvm] [GlobalIsel] Combine trunc of binop (PR #107721)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Fix InstructionCount remarks for MI bundles (PR #107621)   Matt Arsenault via llvm-commits
• [llvm] [RFC] IR: Define noalias.addrspace metadata (PR #102461)   Matt Arsenault via llvm-commits
• [llvm] [RFC] IR: Define noalias.addrspace metadata (PR #102461)   Matt Arsenault via llvm-commits
• [llvm] SelectionDAG/expandFMINIMUMNUM_FMAXIMUMNUM: FCANONICALIZE is needed only for sNaN (PR #108180)   Matt Arsenault via llvm-commits
• [llvm] [RISCV][GISEL] Legalize G_INSERT and G_EXTRACT for scalable vectors (PR #108220)   Matt Arsenault via llvm-commits
• [llvm] [RISCV][GISEL] Legalize G_INSERT and G_EXTRACT for scalable vectors (PR #108220)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][GlobalISel] Implement selectVaStartAAPCS (PR #106979)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][GlobalISel] Implement selectVaStartAAPCS (PR #106979)   Matt Arsenault via llvm-commits
• [llvm] DAG: Lower fcNormal is.fpclass to compare with inf (PR #100389)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Remove flat/global fmin/fmax intrinsics (PR #105642)   Matt Arsenault via llvm-commits
• [llvm] [TableGen] Migrate Option Emitters to const RecordKeeper (PR #107696)   Matt Arsenault via llvm-commits
• [llvm] [llvm] Consistently respect `naked` fn attribute in `TargetFrameLowering::hasFP()` (PR #106014)   Matt Arsenault via llvm-commits
• [llvm] ee61a4d - AMDGPU: Add tests for minimumnum/maximumnum intrinsics   Matt Arsenault via llvm-commits
• [llvm] [RISCV][GISEL] Legalize G_INSERT and G_EXTRACT for scalable vectors (PR #108220)   Matt Arsenault via llvm-commits
• [llvm] [RISCV][GISEL] Legalize G_INSERT_VECTOR_ELT (PR #108250)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Avoid unneeded waitcounts before spill stores (PR #108303)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Avoid unneeded waitcounts before spill stores (PR #108303)   Matt Arsenault via llvm-commits
• [llvm] [Attributor] Avoid AS-cast for function pointers (PR #65825)   Matt Arsenault via llvm-commits
• [llvm] [loongarch][DAG][FREEZE] Fix crash when FREEZE a half(f16) type on loongarch (PR #107791)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][MC] Implement fft and rotate modes for ds_swizzle_b32 (PR #108064)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][MC] Implement fft and rotate modes for ds_swizzle_b32 (PR #108064)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][MC] Implement fft and rotate modes for ds_swizzle_b32 (PR #108064)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][MC] Implement fft and rotate modes for ds_swizzle_b32 (PR #108064)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][MC] Implement fft and rotate modes for ds_swizzle_b32 (PR #108064)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][MC] Implement fft and rotate modes for ds_swizzle_b32 (PR #108064)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel][AArch64] Add G_FPTOSI_SAT/G_FPTOUI_SAT (PR #96297)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel][AArch64] Add G_FPTOSI_SAT/G_FPTOUI_SAT (PR #96297)   Matt Arsenault via llvm-commits
• [llvm] X86: Fix asserting on bfloat argument/return without sse2 (PR #93146)   Matt Arsenault via llvm-commits
• [llvm] [RL78 patch 1] Recognize RL78 in triple parsing code. (PR #108395)   Matt Arsenault via llvm-commits
• [llvm] [RL78 patch 1] Recognize RL78 in triple parsing code. (PR #108395)   Matt Arsenault via llvm-commits
• [llvm] [RL78 patch 1] Recognize RL78 in triple parsing code. (PR #108395)   Matt Arsenault via llvm-commits
• [llvm] [SDAG] Avoid creating redundant stack slots when lowering FSINCOS (PR #108401)   Matt Arsenault via llvm-commits
• [llvm] [SDAG] Avoid creating redundant stack slots when lowering FSINCOS (PR #108401)   Matt Arsenault via llvm-commits
• [llvm] [SDAG] Avoid creating redundant stack slots when lowering FSINCOS (PR #108401)   Matt Arsenault via llvm-commits
• [llvm] [SDAG] Avoid creating redundant stack slots when lowering FSINCOS (PR #108401)   Matt Arsenault via llvm-commits
• [llvm] [NFC][AMDGPU][Attributor] Only iterate over filtered functions when creating AAs (PR #108417)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fold llvm.amdgcn.cvt.pkrtz when either operand is fpext (PR #108237)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Assert no bad shift operations will happen (PR #108416)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Assert no bad shift operations will happen (PR #108416)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Assert no bad shift operations will happen (PR #108416)   Matt Arsenault via llvm-commits
• [llvm] [InitUndef] Enable the InitUndef pass on AArch64 (PR #108353)   Matt Arsenault via llvm-commits
• [llvm] SelectionDAG: Support nofpclass (PR #108350)   Matt Arsenault via llvm-commits
• [llvm] SelectionDAG: Support nofpclass (PR #108350)   Matt Arsenault via llvm-commits
• [llvm] SelectionDAG: Support nofpclass (PR #108350)   Matt Arsenault via llvm-commits
• [llvm] SelectionDAG: Support nofpclass (PR #108350)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Default-initialize uninitialized class member variables (PR #108428)   Matt Arsenault via llvm-commits
• [llvm] [NFC][AMDGPU] Assert no bad shift operations will happen (PR #108416)   Matt Arsenault via llvm-commits
• [llvm] [RISCV][GISel] Legalize G_STACKSAVE/RESTORE. (PR #108438)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][MC] Implement fft and rotate modes for ds_swizzle_b32 (PR #108064)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][MC] Implement fft and rotate modes for ds_swizzle_b32 (PR #108064)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][MC] Implement fft and rotate modes for ds_swizzle_b32 (PR #108064)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][MC] Implement fft and rotate modes for ds_swizzle_b32 (PR #108064)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Pass DomTree and DomTreeCacheto LibCallSimplifier (PR #108446)   Matt Arsenault via llvm-commits
• [llvm] [TableGen] Remove duplicate code in applyMnemonicAliases when target uses DefaultAsmParserVariant. (PR #108494)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Use DenseMap::operator[] (NFC) (PR #108489)   Matt Arsenault via llvm-commits
• [llvm] [InitUndef] Enable the InitUndef pass on AArch64 (PR #108353)   Matt Arsenault via llvm-commits
• [llvm] [InitUndef] Enable the InitUndef pass on AArch64 (PR #108353)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Handle subregisters properly in generic operand legalizer (PR #108496)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Handle subregisters properly in generic operand legalizer (PR #108496)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Handle subregisters properly in generic operand legalizer (PR #108496)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][Attributor] Add an option to turn on internalization (PR #108420)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][Attributor] Add an option to turn on internalization (PR #108420)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] eliminate frame index v_add wave32 test (PR #107832)   Matt Arsenault via llvm-commits
• [llvm] 9578db9 - DAG: Handle atomic fsub in node dumper   Matt Arsenault via llvm-commits
• [llvm] [RL78 patch 1] Recognize RL78 in triple parsing code. (PR #108395)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Remove unused MachineBranchProbabilityInfo from MachineTraceMetrics pass(NFC). (PR #108506)   Matt Arsenault via llvm-commits
• [llvm] [llvm-objcopy][ELF] Disable huge section offset (PR #97036)   Matt Arsenault via llvm-commits
• [llvm] [RL78 patch 1] Recognize RL78 in triple parsing code. (PR #108395)   Matt Arsenault via llvm-commits
• [llvm] SelectionDAG: Support nofpclass (PR #108350)   Matt Arsenault via llvm-commits
• [llvm] SelectionDAG: Support nofpclass (PR #108350)   Matt Arsenault via llvm-commits
• [clang] [llvm] [SPIRV][RFC] Rework / extend support for memory scopes (PR #106429)   Matt Arsenault via llvm-commits
• [llvm] [NFC][EarlyIfConverter] Replace boolean Predicate for a class (PR #108519)   Matt Arsenault via llvm-commits
• [llvm] Optimize fptrunc(x)>=C1 --> x>=C2 (PR #99475)   Matt Arsenault via llvm-commits
• [llvm] [mlir] eliminating g++ warnings (PR #105520)   Matt Arsenault via llvm-commits
• [llvm] [mlir] eliminating g++ warnings (PR #105520)   Matt Arsenault via llvm-commits
• [llvm] [Attributor] Take the address space from addrspacecast directly (PR #108258)   Matt Arsenault via llvm-commits
• [llvm] [Attributor] Take the address space from addrspacecast directly (PR #108258)   Matt Arsenault via llvm-commits
• [llvm] [Attributor] Take the address space from addrspacecast directly (PR #108258)   Matt Arsenault via llvm-commits
• [llvm] [Attributor] Take the address space from addrspacecast directly (PR #108258)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][Attributor] Don't run `AAAddressSpace` for graphics functions (PR #108560)   Matt Arsenault via llvm-commits
• [llvm] [TLI] Support inferring function attributes for sincos[f|l] (PR #108554)   Matt Arsenault via llvm-commits
• [llvm] [TLI] Support inferring function attributes for sincos[f|l] (PR #108554)   Matt Arsenault via llvm-commits
• [llvm] [Xtensa] Lowering FRAMEADDR/RETURNADDR operations. (PR #107363)   Matt Arsenault via llvm-commits
• [llvm] [TLI] Support inferring function attributes for sincos[f|l] (PR #108554)   Matt Arsenault via llvm-commits
• [llvm] AtomicExpand: Really allow incremental legalization (PR #108613)   Matt Arsenault via llvm-commits
• [llvm] AtomicExpand: Really allow incremental legalization (PR #108613)   Matt Arsenault via llvm-commits
• [llvm] AtomicExpand: Really allow incremental legalization (PR #108613)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel][AArch64] Add G_FPTOSI_SAT/G_FPTOUI_SAT (PR #96297)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fold fmod to frem if we know it does not set errno. (PR #107912)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fold fmod to frem if we know it does not set errno. (PR #107912)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fold fmod to frem if we know it does not set errno. (PR #107912)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fold fmod to frem if we know it does not set errno. (PR #107912)   Matt Arsenault via llvm-commits
• [llvm] [TargetMachine] Add `getFlatAddressSpace` to `TargetMachine` (PR #108594)   Matt Arsenault via llvm-commits
• [llvm] [TargetMachine] Add `getFlatAddressSpace` to `TargetMachine` (PR #108594)   Matt Arsenault via llvm-commits
• [llvm] [InitUndef] Enable the InitUndef pass on non-AMDGPU targets (PR #108353)   Matt Arsenault via llvm-commits
• [llvm] [InitUndef] Enable the InitUndef pass on non-AMDGPU targets (PR #108353)   Matt Arsenault via llvm-commits
• [llvm] [InitUndef] Enable the InitUndef pass on non-AMDGPU targets (PR #108353)   Matt Arsenault via llvm-commits
• [llvm] [InitUndef] Enable the InitUndef pass on non-AMDGPU targets (PR #108353)   Matt Arsenault via llvm-commits
• [llvm] [InitUndef] Enable the InitUndef pass on non-AMDGPU targets (PR #108353)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Error on non-global pointer with s_prefetch_data (PR #107624)   Matt Arsenault via llvm-commits
• [llvm] [MIR] Allow overriding isSSA, noPhis, noVRegs in MIR input (PR #108546)   Matt Arsenault via llvm-commits
• [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)   Matt Arsenault via llvm-commits
• [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)   Matt Arsenault via llvm-commits
• [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)   Matt Arsenault via llvm-commits
• [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)   Matt Arsenault via llvm-commits
• [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][Attributor] Don't run `AAAddressSpace` for graphics functions (PR #108560)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][Attributor] Don't run `AAAddressSpace` for graphics functions (PR #108560)   Matt Arsenault via llvm-commits
• [llvm] [AsmPrinter] Do not emit label instructions after the function body if the target is SPIR-V (PR #107013)   Matt Arsenault via llvm-commits
• [llvm] [SDAG] Avoid creating redundant stack slots when lowering FSINCOS (PR #108401)   Matt Arsenault via llvm-commits
• [llvm] [SDAG] Avoid creating redundant stack slots when lowering FSINCOS (PR #108401)   Matt Arsenault via llvm-commits
• [llvm] [SDAG] Avoid creating redundant stack slots when lowering FSINCOS (PR #108401)   Matt Arsenault via llvm-commits
• [llvm] Reland "[NVPTX] Support copysign PTX instruction" (PR #108125)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Avoid unneeded waitcounts before spill stores (PR #108303)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Avoid unneeded waitcounts before spill stores (PR #108303)   Matt Arsenault via llvm-commits
• [llvm] [SPIR-V] Align memory scopes with SPIR-V specification and LLVM expectations and change default mem scope value (PR #108528)   Matt Arsenault via llvm-commits
• [llvm] [SPIR-V] Align memory scopes with SPIR-V specification and LLVM expectations and change default mem scope value (PR #108528)   Matt Arsenault via llvm-commits
• [llvm] [SPIR-V] Align memory scopes with SPIR-V specification and LLVM expectations and change default mem scope value (PR #108528)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][MC] Implement fft and rotate modes for ds_swizzle_b32 (PR #108064)   Matt Arsenault via llvm-commits
• [llvm] [NFC] Update function names in MCTargetAsmParser.h (PR #108643)   Matt Arsenault via llvm-commits
• [llvm] [LLVM][TableGen] Change CodeGenSchedule to use const RecordKeeper (PR #108617)   Matt Arsenault via llvm-commits
• [llvm] [KernelInfo] Implement new LLVM IR pass for GPU code analysis (PR #102944)   Matt Arsenault via llvm-commits
• [llvm] [KernelInfo] Implement new LLVM IR pass for GPU code analysis (PR #102944)   Matt Arsenault via llvm-commits
• [llvm] [TLI] Add basic support for fdim libcall (PR #108702)   Matt Arsenault via llvm-commits
• [llvm] [MIPS] Fix -msingle-float doesn't work with double on O32 (PR #107543)   Matt Arsenault via llvm-commits
• [llvm] [LLVM][IR] Add constant range support for floating-point types (PR #86483)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Convert AMDGPUResourceUsageAnalysis pass from Module to MF pass (PR #102913)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Convert AMDGPUResourceUsageAnalysis pass from Module to MF pass (PR #102913)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Convert AMDGPUResourceUsageAnalysis pass from Module to MF pass (PR #102913)   Matt Arsenault via llvm-commits
• [llvm] [TLI] Add basic support for fdim libcall (PR #108702)   Matt Arsenault via llvm-commits
• [llvm] [LLVM][IR] Add constant range support for floating-point types (PR #86483)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (PR #103490)   Matt Arsenault via llvm-commits
• [llvm] [TargetMachine] Add `getFlatAddressSpace` to `TargetMachine` (PR #108594)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Change CF intrinsics lowering to reconverge on predecessors. (PR #92809)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Change CF intrinsics lowering to reconverge on predecessors. (PR #92809)   Matt Arsenault via llvm-commits
• [llvm] [TLI] Add basic support for fdim libcall (PR #108702)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix incorrectly selecting fp8/bf8 conversion intrinsics (PR #107291)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix incorrectly selecting fp8/bf8 conversion intrinsics (PR #107291)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix incorrectly selecting fp8/bf8 conversion intrinsics (PR #107291)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] NFC: Provide RPTracker interface for external iterators (PR #93088)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] NFC: Provide RPTracker interface for external iterators (PR #93088)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] In instruction selector, allow copy from physical reg to s1 (PR #96157)   Matt Arsenault via llvm-commits
• [llvm] [DAGCombine] Count leading ones: refine post DAG/Type Legalisation if promotion (PR #102877)   Matt Arsenault via llvm-commits
• [llvm] [DAGCombine] Count leading ones: refine post DAG/Type Legalisation if promotion (PR #102877)   Matt Arsenault via llvm-commits
• [llvm] [RISCV][GISEL] Legalize G_INSERT_SUBVECTOR and G_EXTRACT_SUBVECTOR for scalable vectors (PR #108220)   Matt Arsenault via llvm-commits
• [llvm] [RISCV][GISEL] Legalize G_INSERT_VECTOR_ELT (PR #108250)   Matt Arsenault via llvm-commits
• [llvm] [llvm] Ensure that soft float targets don't emit `fma()` libcalls. (PR #106615)   Matt Arsenault via llvm-commits
• [llvm] [llvm] Ensure that soft float targets don't emit `fma()` libcalls. (PR #106615)   Matt Arsenault via llvm-commits
• [llvm] [llvm] Ensure that soft float targets don't emit `fma()` libcalls. (PR #106615)   Matt Arsenault via llvm-commits
• [llvm] [llvm] Ensure that soft float targets don't emit `fma()` libcalls. (PR #106615)   Matt Arsenault via llvm-commits
• [llvm] [llvm] Ensure that soft float targets don't emit `fma()` libcalls. (PR #106615)   Matt Arsenault via llvm-commits
• [llvm] AArch64: Add FMINNUM_IEEE and FMAXNUM_IEEE support (PR #107855)   Matt Arsenault via llvm-commits
• [llvm] AArch64: Add FMINNUM_IEEE and FMAXNUM_IEEE support (PR #107855)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Promote uniform ops to I32 in DAGISel (PR #106383)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Promote uniform ops to I32 in DAGISel (PR #106383)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Promote uniform ops to I32 in DAGISel (PR #106383)   Matt Arsenault via llvm-commits
• [llvm] [Attributor] Use more appropriate approach to check flat address space (PR #108713)   Matt Arsenault via llvm-commits
• [llvm] [Attributor] Use more appropriate approach to check flat address space (PR #108713)   Matt Arsenault via llvm-commits
• [llvm] [Attributor] Use more appropriate approach to check flat address space (PR #108713)   Matt Arsenault via llvm-commits
• [llvm] [Attributor] Use more appropriate approach to check flat address space (PR #108713)   Matt Arsenault via llvm-commits
• [llvm] c49a1ae - DAG: Reorder isFMAFasterThanFMulAndFAdd checks (NFC)   Matt Arsenault via llvm-commits
• [llvm] [RFC] IR: Define noalias.addrspace metadata (PR #102461)   Matt Arsenault via llvm-commits
• [llvm] [RFC] IR: Define noalias.addrspace metadata (PR #102461)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Promote uniform ops to i32 in GISel (PR #106557)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Infer amdgpu-no-flat-scratch-init attribute in AMDGPUAttributor (PR #94647)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Infer amdgpu-no-flat-scratch-init attribute in AMDGPUAttributor (PR #94647)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Infer amdgpu-no-flat-scratch-init attribute in AMDGPUAttributor (PR #94647)   Matt Arsenault via llvm-commits
• [llvm] SelectionDAG/expandFMINIMUMNUM_FMAXIMUMNUM: FCANONICALIZE is needed only for sNaN (PR #108180)   Matt Arsenault via llvm-commits
• [llvm] [LLVM][TableGen] Change CodeGenTarget to use const RecordKeeper (PR #108752)   Matt Arsenault via llvm-commits
• [llvm] [LLVM][TableGen] Change CodeGenInstAlias to use const Record pointers (PR #108753)   Matt Arsenault via llvm-commits
• [llvm] [llvm][AMDGPU] Implemented isProfitableToHoist and isFMAFasterThanFMulAndFAdd (PR #108756)   Matt Arsenault via llvm-commits
• [llvm] [llvm][AMDGPU] Implemented isProfitableToHoist and isFMAFasterThanFMulAndFAdd (PR #108756)   Matt Arsenault via llvm-commits
• [llvm] [llvm][AMDGPU] Implemented isProfitableToHoist and isFMAFasterThanFMulAndFAdd (PR #108756)   Matt Arsenault via llvm-commits
• [llvm] [llvm][AMDGPU] Implemented isProfitableToHoist and isFMAFasterThanFMulAndFAdd (PR #108756)   Matt Arsenault via llvm-commits
• [llvm] [llvm][AMDGPU] Implemented isProfitableToHoist and isFMAFasterThanFMulAndFAdd (PR #108756)   Matt Arsenault via llvm-commits
• [llvm] [llvm][AMDGPU] Implemented isProfitableToHoist and isFMAFasterThanFMulAndFAdd (PR #108756)   Matt Arsenault via llvm-commits
• [llvm] [llvm][AMDGPU] Implemented isProfitableToHoist and isFMAFasterThanFMulAndFAdd (PR #108756)   Matt Arsenault via llvm-commits
• [llvm] [TLI] Add basic support for fdim libcall (PR #108702)   Matt Arsenault via llvm-commits
• [llvm] [LLVM][TableGen] Change CodeGenDAGPatterns to use const RecordKeeper (PR #108762)   Matt Arsenault via llvm-commits
• [llvm] [LLVM][TableGen] Change CodeGenDAGPatterns to use const RecordKeeper (PR #108762)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][Attributor] Infer `inreg` attribute in `AMDGPUAttributor` (PR #101609)   Matt Arsenault via llvm-commits
• [llvm] [LLVM][TableGen] Change SubtargetEmitter to use const RecordKeeper (PR #108763)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Transform high latency, dependent FSQRT/FDIV into FMUL (PR #87474)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Transform high latency, dependent FSQRT/FDIV into FMUL (PR #87474)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Transform high latency, dependent FSQRT/FDIV into FMUL (PR #87474)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Transform high latency, dependent FSQRT/FDIV into FMUL (PR #87474)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Transform high latency, dependent FSQRT/FDIV into FMUL (PR #87474)   Matt Arsenault via llvm-commits
• [llvm] [VirtRegMap] Store MCRegister in Virt2PhysMap. (PR #108775)   Matt Arsenault via llvm-commits
• [llvm] [GlobalIsel] Canonicalize G_ICMP (PR #108755)   Matt Arsenault via llvm-commits
• [llvm] [GlobalIsel] Canonicalize G_ICMP (PR #108755)   Matt Arsenault via llvm-commits
• [llvm] [GlobalIsel] Canonicalize G_ICMP (PR #108755)   Matt Arsenault via llvm-commits
• [llvm] [APFloat] Add APFloat support for E8M0 type (PR #107127)   Matt Arsenault via llvm-commits
• [llvm] [APFloat] Add APFloat support for E8M0 type (PR #107127)   Matt Arsenault via llvm-commits
• [llvm] [APFloat] Add APFloat support for E8M0 type (PR #107127)   Matt Arsenault via llvm-commits
• [llvm] [VirtRegMap] Store MCRegister in Virt2PhysMap. (PR #108775)   Matt Arsenault via llvm-commits
• [clang-tools-extra] [llvm] Full path names are used in several unittests instead of the binary name. Fix up the testcase failures (PR #107974)   Matthias Braun via llvm-commits
• [clang-tools-extra] [llvm] Full path names are used in several unittests instead of the binary name. Fix up the testcase failures (PR #107974)   Matthias Braun via llvm-commits
• [lld] [llvm] [mlir] [polly] [NFC] Add explicit #include llvm-config.h where its macros are used, last part. (PR #107615)   Mehdi Amini via llvm-commits
• [llvm] [Utils][SPIR-V] Adding spirv-sim to LLVM (PR #107094)   Mehdi Amini via llvm-commits
• [llvm] [Utils][SPIR-V] Adding spirv-sim to LLVM (PR #107094)   Mehdi Amini via llvm-commits
• [llvm] [Utils][SPIR-V] Adding spirv-sim to LLVM (PR #107094)   Mehdi Amini via llvm-commits
• [llvm] [mlir] eliminating g++ warnings (PR #105520)   Mehdi Amini via llvm-commits
• [llvm] [LV] Reuse VPReplicateRecipe to handle scalar stores in exit block. (PR #106342)   Mel Chen via llvm-commits
• [llvm] [LV] Reuse VPReplicateRecipe to handle scalar stores in exit block. (PR #106342)   Mel Chen via llvm-commits
• [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)   Michael Buch via llvm-commits
• [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)   Michael Buch via llvm-commits
• [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)   Michael Buch via llvm-commits
• [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)   Michael Buch via llvm-commits
• [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)   Michael Buch via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle] Set `InConstraintExpr` to `true` when demangling a c… (PR #107385)   Michael Buch via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle] Set `InConstraintExpr` to `true` when demangling a c… (PR #107385)   Michael Buch via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle] Set `InConstraintExpr` to `true` when demangling a c… (PR #107385)   Michael Buch via llvm-commits
• [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)   Michael Buch via llvm-commits
• [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)   Michael Buch via llvm-commits
• [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)   Michael Buch via llvm-commits
• [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)   Michael Buch via llvm-commits
• [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)   Michael Buch via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle] Set `InConstraintExpr` to `true` when demangling a constraint expression (PR #107385)   Michael Buch via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle] Add template name to the substituions list during d… (PR #108538)   Michael Buch via llvm-commits
• [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)   Michael Buch via llvm-commits
• [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)   Michael Buch via llvm-commits
• [libc] [llvm] [libc][bazel] Update bazel overlay for math functions and their tests. (PR #107862)   Michael Jones via llvm-commits
• [llvm] [libc][bazel] Enable epoll_pwait2 on bazel (PR #108254)   Michael Jones via llvm-commits
• [libc] [llvm] [libc] Fix undefined behavior for nan functions. (PR #106468)   Michael Jones via llvm-commits
• [llvm] [libc][bazel] Enable epoll_pwait2 on bazel (PR #108254)   Michael Jones via llvm-commits
• [flang] [llvm] [Frontend][OpenMP] Follow compound construct clause restrictions (PR #107853)   Michael Klemm via llvm-commits
• [llvm] [LV][VPlan] Add initial support for CSA vectorization (PR #106560)   Michael Maitland via llvm-commits
• [llvm] [LV][VPlan] Add initial support for CSA vectorization (PR #106560)   Michael Maitland via llvm-commits
• [llvm] [RISC-V][GISEL] Select G_BITCAST for scalable vectors (PR #101486)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GISEL] Legalize G_INSERT and G_EXTRACT for scalable vectors (PR #108220)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GISEL] Legalize G_INSERT and G_EXTRACT for scalable vectors (PR #108220)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GISEL] Legalize G_INSERT_VECTOR_ELT (PR #108250)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GISEL] Legalize G_INSERT and G_EXTRACT for scalable vectors (PR #108220)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GISEL] Legalize G_INSERT_VECTOR_ELT (PR #108250)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GISEL] Legalize G_INSERT_VECTOR_ELT (PR #108250)   Michael Maitland via llvm-commits
• [llvm] [MCA][ResourceManager] Fix a bug in the instruction issue logic. (PR #108386)   Michael Maitland via llvm-commits
• [llvm] [RISCV][docs] GP Relaxation and Small Data Limit (PR #108592)   Michael Maitland via llvm-commits
• [llvm] [RISCV][docs] GP Relaxation and Small Data Limit (PR #108592)   Michael Maitland via llvm-commits
• [llvm] [RISCV][docs] GP Relaxation and Small Data Limit (PR #108592)   Michael Maitland via llvm-commits
• [llvm] [RISCV] Introduce VLOptimizer pass (PR #108640)   Michael Maitland via llvm-commits
• [llvm] [RISCV] Introduce VLOptimizer pass (PR #108640)   Michael Maitland via llvm-commits
• [llvm] [RISCV] Introduce VLOptimizer pass (PR #108640)   Michael Maitland via llvm-commits
• [llvm] [RISCV] Introduce VLOptimizer pass (PR #108640)   Michael Maitland via llvm-commits
• [llvm] [RISCV] Introduce VLOptimizer pass (PR #108640)   Michael Maitland via llvm-commits
• [llvm] [MCA][ResourceManager] Fix a bug in the instruction issue logic. (PR #108386)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GISEL] Legalize G_INSERT and G_EXTRACT for scalable vectors (PR #108220)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GISEL] Legalize G_INSERT_SUBVECTOR and G_EXTRACT_SUBVECTOR for scalable vectors (PR #108220)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GISEL] Legalize G_INSERT_SUBVECTOR and G_EXTRACT_SUBVECTOR for scalable vectors (PR #108220)   Michael Maitland via llvm-commits
• [llvm] [SPIR-V] Add definitions and fix implementation for atomic builtins (PR #106107)   Michal Paszkowski via llvm-commits
• [llvm] [SPIR-V] Add definitions and fix implementation for atomic builtins (PR #106107)   Michal Paszkowski via llvm-commits
• [llvm] [AsmPrinter] Do not emit label instructions after the function body if the target is SPIR-V (PR #107013)   Michal Paszkowski via llvm-commits
• [llvm] [SPIR-V] Expose an API call to initialize SPIRV target and translate input LLVM IR module to SPIR-V (PR #107216)   Michal Paszkowski via llvm-commits
• [llvm] [SPIR-V] Address the case when optimization uses GEP operator and GenCode creates G_PTR_ADD to convey the semantics (PR #107880)   Michal Paszkowski via llvm-commits
• [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)   Michal Rostecki via llvm-commits
• [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)   Michal Rostecki via llvm-commits
• [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)   Michal Rostecki via llvm-commits
• [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)   Michal Rostecki via llvm-commits
• [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)   Michal Rostecki via llvm-commits
• [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)   Michal Rostecki via llvm-commits
• [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)   Michal Rostecki via llvm-commits
• [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)   Michal Rostecki via llvm-commits
• [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)   Michal Rostecki via llvm-commits
• [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)   Michal Rostecki via llvm-commits
• [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)   Michal Rostecki via llvm-commits
• [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)   Michal Rostecki via llvm-commits
• [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)   Michal Rostecki via llvm-commits
• [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)   Michal Rostecki via llvm-commits
• [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)   Michal Rostecki via llvm-commits
• [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)   Michal Rostecki via llvm-commits
• [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)   Michal Rostecki via llvm-commits
• [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)   Michal Rostecki via llvm-commits
• [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)   Michal Rostecki via llvm-commits
• [clang] [llvm] [RISCV][VCIX] Add vcix_state to GNU inline assembly register set (PR #106914)   Michal Terepeta via llvm-commits
• [llvm] [SandboxIR] Boilerplate code (PR #95814)   Mikael Holmén via llvm-commits
• [llvm] [SandboxVec] Boilerplate (PR #107431)   Mikael Holmén via llvm-commits
• [llvm] Reland "[AMDGPU] Graph-based Module Splitting Rewrite (#104763)" (PR #107076)   Mikael Holmén via llvm-commits
• [llvm] Reland "[AMDGPU] Graph-based Module Splitting Rewrite (#104763)" (PR #107076)   Mikael Holmén via llvm-commits
• [llvm] Reland "[AMDGPU] Graph-based Module Splitting Rewrite (#104763)" (PR #107076)   Mikael Holmén via llvm-commits
• [llvm] [SandboxVec] Boilerplate (PR #107431)   Mikael Holmén via llvm-commits
• [llvm] [VectorCombine] Add type shrinking and zext propagation for fixed-width vector types (PR #104606)   Mikael Holmén via llvm-commits
• [llvm] [SandboxVec] Boilerplate (PR #107431)   Mikael Holmén via llvm-commits
• [llvm] [VectorCombine] Fix trunc generated between PHINodes (PR #108228)   Mikael Holmén via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)   Mikael Holmén via llvm-commits
• [llvm] [InstCombine] Make backedge check in op of phi transform more precise (PR #106075)   Mikael Holmén via llvm-commits
• [llvm] [InstCombine] Make backedge check in op of phi transform more precise (PR #106075)   Mikael Holmén via llvm-commits
• [compiler-rt] dbd81ba - complete rename of __orc_rt namespace   Mikhail Goncharov via llvm-commits
• [compiler-rt] 53d35c4 - Revert "[ORC-RT] Replace FnTag arg of WrapperFunction::call with generic dispatch arg."   Mikhail Goncharov via llvm-commits
• [llvm] [EarlyIfConversion] Determine if branch is predictable using new APIs. (PR #95877)   Mikhail Gudim via llvm-commits
• [llvm] Support STRICT_UINT_TO_FP and STRICT_SINT_TO_FP (PR #102503)   Mikhail R. Gadelha via llvm-commits
• [llvm] [LV] Introduce the EVLIVSimplify Pass for EVL-vectorized loops (PR #91796)   Min-Yih Hsu via llvm-commits
• [llvm] [MCA][ResourceManager] Fix a bug in the instruction issue logic. (PR #108386)   Min-Yih Hsu via llvm-commits
• [llvm] [MCA][ResourceManager] Fix a bug in the instruction issue logic. (PR #108386)   Min-Yih Hsu via llvm-commits
• [llvm] [NFCI][BitcodeReader]Read real GUID from VI as opposed to storing it in map (PR #107735)   Mingming Liu via llvm-commits
• [llvm] [NFCI][BitcodeReader]Read real GUID from VI as opposed to storing it in map (PR #107735)   Mingming Liu via llvm-commits
• [lld] [llvm] Re-apply "[NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF" (PR #107792)   Mingming Liu via llvm-commits
• [lld] [llvm] Re-apply "[NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF" (PR #107792)   Mingming Liu via llvm-commits
• [lld] [llvm] Re-apply "[NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF" (PR #107792)   Mingming Liu via llvm-commits
• [lld] [llvm] Re-apply "[NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF" (PR #107792)   Mingming Liu via llvm-commits
• [lld] [llvm] Re-apply "[NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF" (PR #107792)   Mingming Liu via llvm-commits
• [llvm] [LTO][NFC] Fix forward declaration (PR #107902)   Mingming Liu via llvm-commits
• [llvm] [LTO][NFC] Fix forward declaration (PR #107902)   Mingming Liu via llvm-commits
• [llvm] [LTO][NFC] Fix forward declaration (PR #107902)   Mingming Liu via llvm-commits
• [llvm] [NFC]Use one-bit for bool in GlobalResolution struct (PR #106183)   Mingming Liu via llvm-commits
• [llvm] [NFC]Use one-bit for bool in GlobalResolution struct (PR #106183)   Mingming Liu via llvm-commits
• [llvm] [LTO] Remove unused includes (NFC) (PR #108110)   Mingming Liu via llvm-commits
• [llvm] [MLGO] Fix logging verbosity in scripts (PR #107818)   Mircea Trofin via llvm-commits
• [llvm] [MLGO] Fix logging verbosity in scripts (PR #107818)   Mircea Trofin via llvm-commits
• [llvm] [ctx_prof] Insert the ctx prof flattener after the module inliner (PR #107499)   Mircea Trofin via llvm-commits
• [llvm] [MLGO] Fix logging verbosity in scripts (PR #107818)   Mircea Trofin via llvm-commits
• [llvm] [MLGO] Fix logging verbosity in scripts (PR #107818)   Mircea Trofin via llvm-commits
• [llvm] [ctx_prof] Insert the ctx prof flattener after the module inliner (PR #107499)   Mircea Trofin via llvm-commits
• [llvm] [ctx_prof] Insert the ctx prof flattener after the module inliner (PR #107499)   Mircea Trofin via llvm-commits
• [llvm] [ctx_prof] Insert the ctx prof flattener after the module inliner (PR #107499)   Mircea Trofin via llvm-commits
• [llvm] e64a1c0 - Fix unintended extra commit in PR #107499   Mircea Trofin via llvm-commits
• [llvm] [ctx_prof] Relax the "profile use" case around `PGOOpt` (PR #108265)   Mircea Trofin via llvm-commits
• [llvm] 885ac29 - [nfc][ctx_prof] Change some internal "set" types   Mircea Trofin via llvm-commits
• [llvm] adc1ab3 - Add missing include to `PGOCtxProfReaderWriterTest.cpp`   Mircea Trofin via llvm-commits
• [llvm] [ctx_prof] Fix checks in `PGOCtxprofFlattening` (PR #108467)   Mircea Trofin via llvm-commits
• [llvm] [ctx_prof] Fix checks in `PGOCtxprofFlattening` (PR #108467)   Mircea Trofin via llvm-commits
• [llvm] [ctx_prof] Factor the callsite instrumentation exclusion criteria (PR #108471)   Mircea Trofin via llvm-commits
• [llvm] [ctx_prof] Factor the callsite instrumentation exclusion criteria (PR #108471)   Mircea Trofin via llvm-commits
• [llvm] [ctx_prof] Fix checks in `PGOCtxprofFlattening` (PR #108467)   Mircea Trofin via llvm-commits
• [llvm] [ctx_prof] Factor the callsite instrumentation exclusion criteria (PR #108471)   Mircea Trofin via llvm-commits
• [llvm] [ctx_prof] Factor the callsite instrumentation exclusion criteria (PR #108471)   Mircea Trofin via llvm-commits
• [llvm] [nfc][ctx_prof] Factor the callsite instrumentation exclusion criteria (PR #108471)   Mircea Trofin via llvm-commits
• [llvm] [nfc][ctx_prof] Factor the callsite instrumentation exclusion criteria (PR #108471)   Mircea Trofin via llvm-commits
• [llvm] [nfc][ctx_prof] Factor the callsite instrumentation exclusion criteria (PR #108471)   Mircea Trofin via llvm-commits
• [llvm] [nfc][ctx_prof] Factor the callsite instrumentation exclusion criteria (PR #108471)   Mircea Trofin via llvm-commits
• [llvm] [ctx_prof] Fix checks in `PGOCtxprofFlattening` (PR #108467)   Mircea Trofin via llvm-commits
• [llvm] [ctx_prof] Fix checks in `PGOCtxprofFlattening` (PR #108467)   Mircea Trofin via llvm-commits
• [llvm] [nfc][ctx_prof] Factor the callsite instrumentation exclusion criteria (PR #108471)   Mircea Trofin via llvm-commits
• [llvm] [ctx_prof] Fix checks in `PGOCtxprofFlattening` (PR #108467)   Mircea Trofin via llvm-commits
• [llvm] [ctx_prof] Fix checks in `PGOCtxprofFlattening` (PR #108467)   Mircea Trofin via llvm-commits
• [llvm] [ctx_prof] Fix checks in `PGOCtxprofFlattening` (PR #108467)   Mircea Trofin via llvm-commits
• [llvm] [nfc][ctx_prof] Factor the callsite instrumentation exclusion criteria (PR #108471)   Mircea Trofin via llvm-commits
• [llvm] [nfc][ctx_prof] Factor the callsite instrumentation exclusion criteria (PR #108471)   Mircea Trofin via llvm-commits
• [llvm] [ctx_prof] Fix checks in `PGOCtxprofFlattening` (PR #108467)   Mircea Trofin via llvm-commits
• [llvm] [ctx_prof] Fix checks in `PGOCtxprofFlattening` (PR #108467)   Mircea Trofin via llvm-commits
• [llvm] [ctx_prof] Fix checks in `PGOCtxprofFlattening` (PR #108467)   Mircea Trofin via llvm-commits
• [llvm] [ctx_prof] Fix checks in `PGOCtxprofFlattening` (PR #108467)   Mircea Trofin via llvm-commits
• [llvm] [ctx_prof] Fix checks in `PGOCtxprofFlattening` (PR #108467)   Mircea Trofin via llvm-commits
• [llvm] [ctx_prof] Fix checks in `PGOCtxprofFlattening` (PR #108467)   Mircea Trofin via llvm-commits
• [llvm] [ctx_prof] Fix checks in `PGOCtxprofFlattening` (PR #108467)   Mircea Trofin via llvm-commits
• [clang] [llvm] [AArch64] Implement NEON vamin/vamax intrinsics (PR #99041)   Momchil Velikov via llvm-commits
• [llvm] [AArch64] Prevent the AArch64LoadStoreOptimizer from reordering CFI instructions (PR #101317)   Momchil Velikov via llvm-commits
• [clang] [llvm] [AArch64] Implement NEON vamin/vamax intrinsics (PR #99041)   Momchil Velikov via llvm-commits
• [llvm] [AArch64] Prevent the AArch64LoadStoreOptimizer from reordering CFI instructions (PR #101317)   Momchil Velikov via llvm-commits
• [llvm] [DSE] Split memory intrinsics if they are dead in the middle (PR #75478)   Nabeel Omer via llvm-commits
• [llvm] [DSE] Split memory intrinsics if they are dead in the middle (PR #75478)   Nabeel Omer via llvm-commits
• [llvm] [llvm][ARM]Add ARM widen strings pass (PR #107120)   Nashe Mncube via llvm-commits
• [llvm] [llvm][ARM]Add ARM widen strings pass (PR #107120)   Nashe Mncube via llvm-commits
• [llvm] [llvm][ARM]Add ARM widen strings pass (PR #107120)   Nashe Mncube via llvm-commits
• [llvm] [llvm][ARM]Add ARM widen strings pass (PR #107120)   Nashe Mncube via llvm-commits
• [llvm] [llvm][ARM]Add ARM widen strings pass (PR #107120)   Nashe Mncube via llvm-commits
• [llvm] [llvm][ARM]Add ARM widen strings pass (PR #107120)   Nashe Mncube via llvm-commits
• [llvm] [llvm][ARM]Add ARM widen strings pass (PR #107120)   Nashe Mncube via llvm-commits
• [llvm] [llvm][ARM]Add ARM widen strings pass (PR #107120)   Nashe Mncube via llvm-commits
• [llvm] [llvm][ARM]Add ARM widen strings pass (PR #107120)   Nashe Mncube via llvm-commits
• [llvm] [llvm][ARM]Add widen strings pass (PR #107120)   Nashe Mncube via llvm-commits
• [llvm] [llvm][ARM]Add widen strings pass (PR #107120)   Nashe Mncube via llvm-commits
• [llvm] [llvm][ARM]Add widen strings pass (PR #107120)   Nashe Mncube via llvm-commits
• [llvm] [HEXAGON] AddrModeOpt support for HVX and optimize adds (PR #106368)   Nathan Chancellor via llvm-commits
• [llvm] [HEXAGON] AddrModeOpt support for HVX and optimize adds (PR #106368)   Nathan Chancellor via llvm-commits
• [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)   Nathan Gauër via llvm-commits
• [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)   Nathan Gauër via llvm-commits
• [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)   Nathan Gauër via llvm-commits
• [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)   Nathan Gauër via llvm-commits
• [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)   Nathan Gauër via llvm-commits
• [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)   Nathan Gauër via llvm-commits
• [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)   Nathan Gauër via llvm-commits
• [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)   Nathan Gauër via llvm-commits
• [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)   Nathan Gauër via llvm-commits
• [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)   Nathan Gauër via llvm-commits
• [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)   Nathan Gauër via llvm-commits
• [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)   Nathan Gauër via llvm-commits
• [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)   Nathan Gauër via llvm-commits
• [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)   Nathan Gauër via llvm-commits
• [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)   Nathan Gauër via llvm-commits
• [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)   Nathan Gauër via llvm-commits
• [llvm] [SPIR-V] Expose an API call to initialize SPIRV target and translate input LLVM IR module to SPIR-V (PR #107216)   Nathan Gauër via llvm-commits
• [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)   Nathan Gauër via llvm-commits
• [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)   Nathan Gauër via llvm-commits
• [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)   Nathan Gauër via llvm-commits
• [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)   Nathan Gauër via llvm-commits
• [llvm] [SPIR-V] Expose an API call to initialize SPIRV target and translate input LLVM IR module to SPIR-V (PR #107216)   Nathan Gauër via llvm-commits
• [llvm] [Utils][SPIR-V] Adding spirv-sim to LLVM (PR #107094)   Nathan Gauër via llvm-commits
• [llvm] [Utils][SPIR-V] Adding spirv-sim to LLVM (PR #107094)   Nathan Gauër via llvm-commits
• [llvm] [SPIR-V] Expose an API call to initialize SPIRV target and translate input LLVM IR module to SPIR-V (PR #107216)   Nathan Gauër via llvm-commits
• [llvm] [Utils][SPIR-V] Adding spirv-sim to LLVM (PR #107094)   Nathan Gauër via llvm-commits
• [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)   Nathan Gauër via llvm-commits
• [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)   Nathan Gauër via llvm-commits
• [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)   Nathan Gauër via llvm-commits
• [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)   Nathan Gauër via llvm-commits
• [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)   Nathan Gauër via llvm-commits
• [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)   Nathan Gauër via llvm-commits
• [llvm] [AArch64][NEON][SVE] Lower mixed sign/zero extended partial reductions to usdot (PR #107566)   Nicholas Guy via llvm-commits
• [llvm] [AArch64][NEON][SVE] Lower mixed sign/zero extended partial reductions to usdot (PR #107566)   Nicholas Guy via llvm-commits
• [llvm] [AArch64][NEON][SVE] Lower mixed sign/zero extended partial reductions to usdot (PR #107566)   Nicholas Guy via llvm-commits
• [llvm] 4a63d62 - [gn] attempt to port 53a81d4d26f0 (win/asan dynamic runtime)   Nico Weber via llvm-commits
• [llvm] 4d55f0b - [gn] attempt to port 53a81d4d26f0 more (win/asan dynamic runtime)   Nico Weber via llvm-commits
• [llvm] e610a0e - [gn] port eb0e4b1415800   Nico Weber via llvm-commits
• [llvm] 7190368 - [gn build] Port bca2b6d23f69   Nico Weber via llvm-commits
• [llvm] 2459679 - [gn build] Port f12e10b51368   Nico Weber via llvm-commits
• [llvm] dfd7284 - [gn] port 0f525452896   Nico Weber via llvm-commits
• [llvm] [CGData][MachineOutliner] Global Outlining (PR #90074)   Nico Weber via llvm-commits
• [llvm] [CGData][MachineOutliner] Global Outlining (PR #90074)   Nico Weber via llvm-commits
• [llvm] [CGData][MachineOutliner] Global Outlining (PR #90074)   Nico Weber via llvm-commits
• [compiler-rt] [compiler-rt] Simplify definition of uptr (PR #106155)   Nico Weber via llvm-commits
• [llvm] 6043321 - [gn] port bc152fbf4315 (llvm-debuginfod-find driver_exe)   Nico Weber via llvm-commits
• [llvm] [TableGen] Migrate Option Emitters to const RecordKeeper (PR #107696)   Nico Weber via llvm-commits
• [llvm] [TableGen] Migrate Option Emitters to const RecordKeeper (PR #107696)   Nico Weber via llvm-commits
• [llvm] [TableGen] Migrate Option Emitters to const RecordKeeper (PR #107696)   Nico Weber via llvm-commits
• [llvm] [TableGen] Fix MacOS failure in Option Emitter. (PR #108225)   Nico Weber via llvm-commits
• [llvm] [TableGen] Fix MacOS failure in Option Emitter. (PR #108225)   Nico Weber via llvm-commits
• [llvm] [TableGen] Fix MacOS failure in Option Emitter. (PR #108225)   Nico Weber via llvm-commits
• [llvm] [TableGen] Migrate Option Emitters to const RecordKeeper (PR #107696)   Nico Weber via llvm-commits
• [llvm] [TableGen] Migrate Option Emitters to const RecordKeeper (PR #107696)   Nico Weber via llvm-commits
• [llvm] [TableGen] Migrate Option Emitters to const RecordKeeper (PR #107696)   Nico Weber via llvm-commits
• [llvm] ebb979d - [gn] port 118f120eaab8d   Nico Weber via llvm-commits
• [llvm] [gn build] Port win asan runtime rules (PR #108293)   Nico Weber via llvm-commits
• [llvm] [gn build] Port win asan runtime rules (PR #108293)   Nico Weber via llvm-commits
• [llvm] [gn build] Port win asan runtime rules (PR #108293)   Nico Weber via llvm-commits
• [clang] [llvm] [Utils] add --update-tests flag to llvm-lit (PR #97369)   Nicolai Hähnle via llvm-commits
• [clang] [llvm] [Utils] add --update-tests flag to llvm-lit (PR #97369)   Nicolai Hähnle via llvm-commits
• [clang] [llvm] [Utils] add --update-tests flag to llvm-lit (PR #97369)   Nicolai Hähnle via llvm-commits
• [llvm] [AMDGPU] Document & Finalize GFX12 Memory Model (PR #98599)   Nicolai Hähnle via llvm-commits
• [llvm] [amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic (PR #105822)   Nicolai Hähnle via llvm-commits
• [llvm] [amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic (PR #105822)   Nicolai Hähnle via llvm-commits
• [llvm] [amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic (PR #105822)   Nicolai Hähnle via llvm-commits
• [llvm] [amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic (PR #105822)   Nicolai Hähnle via llvm-commits
• [llvm] [amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic (PR #105822)   Nicolai Hähnle via llvm-commits
• [llvm] [amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic (PR #105822)   Nicolai Hähnle via llvm-commits
• [clang] [llvm] [Utils] Add new --update-tests flag to llvm-lit (PR #108425)   Nicolai Hähnle via llvm-commits
• [clang] [llvm] [Utils] Add new --update-tests flag to llvm-lit (PR #108425)   Nicolai Hähnle via llvm-commits
• [clang] [llvm] [Utils] Add new --update-tests flag to llvm-lit (PR #108425)   Nicolai Hähnle via llvm-commits
• [clang] [llvm] [Utils] Add new --update-tests flag to llvm-lit (PR #108425)   Nicolai Hähnle via llvm-commits
• [llvm] [AMDGPU] Remove dead code in SIISelLowering (NFC) (PR #108198)   Nicolas Miller via llvm-commits
• [llvm] [StructurizeCFG] Avoid repeated hash lookups (NFC) (PR #107797)   Nikita Popov via llvm-commits
• [llvm] [Analysis] Avoid repeated hash lookups (NFC) (PR #107794)   Nikita Popov via llvm-commits
• [llvm] [IPO] Avoid repeated hash lookups (NFC) (PR #107796)   Nikita Popov via llvm-commits
• [llvm] [Float2Int] Avoid repeated hash lookups (NFC) (PR #107795)   Nikita Popov via llvm-commits
• [llvm] 04742f3 - [SCCP] Add test for nonnull argument inference (NFC)   Nikita Popov via llvm-commits
• [llvm] [IPSCCP] Infer attributes on arguments (PR #107114)   Nikita Popov via llvm-commits
• [llvm] [IPSCCP] Infer attributes on arguments (PR #107114)   Nikita Popov via llvm-commits
• [llvm] [IPSCCP] Infer attributes on arguments (PR #107114)   Nikita Popov via llvm-commits
• [llvm] 1199e5b - [MemCpyOpt] Add more tests for memcpy passed to readonly arg (NFC)   Nikita Popov via llvm-commits
• [llvm] [MemCpyOpt] Allow memcpy elision for non-noalias arguments (PR #107860)   Nikita Popov via llvm-commits
• [llvm] [IPSCCP] Infer attributes on arguments (PR #107114)   Nikita Popov via llvm-commits
• [llvm] [InitUndef] Don't use largest super class (PR #107885)   Nikita Popov via llvm-commits
• [llvm] [InitUndef] Don't use largest super class (PR #107885)   Nikita Popov via llvm-commits
• [llvm] [InitUndef] Don't use largest super class (PR #107885)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold fmod to frem if we know it does not set errno. (PR #107912)   Nikita Popov via llvm-commits
• [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)   Nikita Popov via llvm-commits
• [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)   Nikita Popov via llvm-commits
• [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)   Nikita Popov via llvm-commits
• [llvm] [GlobalIsel] Visit ICmp (PR #105991)   Nikita Popov via llvm-commits
• [llvm] [GlobalIsel] Visit ICmp (PR #105991)   Nikita Popov via llvm-commits
• [llvm] [InitUndef] Don't use largest super class (PR #107885)   Nikita Popov via llvm-commits
• [llvm] [MemCpyOpt] Allow memcpy elision for non-noalias arguments (PR #107860)   Nikita Popov via llvm-commits
• [llvm] [TableGen] Avoid repeated hash lookups (NFC) (PR #108138)   Nikita Popov via llvm-commits
• [llvm] [LoopDeletion] Unblock loop deletion with `llvm.experimental.noalias.scope.decl` (PR #108144)   Nikita Popov via llvm-commits
• [llvm] [MemCpyOpt] Allow memcpy elision for non-noalias arguments (PR #107860)   Nikita Popov via llvm-commits
• [llvm] [ValueTracking] Infer is-power-of-2 from dominating conditions (PR #107994)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold fmod to frem if we know it does not set errno. (PR #107912)   Nikita Popov via llvm-commits
• [llvm] [ConstraintElim] Generalize IV logic to chain of exiting blocks. (PR #108031)   Nikita Popov via llvm-commits
• [llvm] [ConstraintElim] Generalize IV logic to chain of exiting blocks. (PR #108031)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)   Nikita Popov via llvm-commits
• [llvm] [IPSCCP] Infer attributes on arguments (PR #107114)   Nikita Popov via llvm-commits
• [llvm] [NVPTX] Convert calls to indirect when call signature mismatches function signature (PR #107644)   Nikita Popov via llvm-commits
• [llvm] [NVPTX] Convert calls to indirect when call signature mismatches function signature (PR #107644)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Replace an integer comparison of a `phi` node with multiple `ucmp`/`scmp` operands and a constant with `phi` of individual comparisons of original intrinsic's arguments (PR #107769)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Replace an integer comparison of a `phi` node with multiple `ucmp`/`scmp` operands and a constant with `phi` of individual comparisons of original intrinsic's arguments (PR #107769)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Replace an integer comparison of a `phi` node with multiple `ucmp`/`scmp` operands and a constant with `phi` of individual comparisons of original intrinsic's arguments (PR #107769)   Nikita Popov via llvm-commits
• [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)   Nikita Popov via llvm-commits
• [llvm] [mlir] [ADT] Make DenseMap/DenseSet more resilient agains OOM situations (PR #107251)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Replace an integer comparison of a `phi` node with multiple `ucmp`/`scmp` operands and a constant with `phi` of individual comparisons of original intrinsic's arguments (PR #107769)   Nikita Popov via llvm-commits
• [llvm] [InitUndef] Only compute DeadLaneDetector if subreg liveness enabled (NFC) (PR #108279)   Nikita Popov via llvm-commits
• [llvm] [CodeGen] Clear InitUndef pass new register cache between pass runs (PR #90967)   Nikita Popov via llvm-commits
• [llvm] Bail out jump threading on indirect branches (PR #103688)   Nikita Popov via llvm-commits
• [llvm] [InitUndef] Only compute DeadLaneDetector if subreg liveness enabled (NFC) (PR #108279)   Nikita Popov via llvm-commits
• [llvm] a71407e - [AArch64] Regenerate test checks (NFC)   Nikita Popov via llvm-commits
• [llvm] 37cf39f - [AArch64] Add test for incorrect stxp register allocation (NFC)   Nikita Popov via llvm-commits
• [llvm] [InitUndef] Enable the InitUndef pass on all targets (PR #108353)   Nikita Popov via llvm-commits
• [llvm] [VectorCombine] Fix trunc generated between PHINodes (PR #108228)   Nikita Popov via llvm-commits
• [llvm] [CodeGen] Clear InitUndef pass new register cache between pass runs (PR #90967)   Nikita Popov via llvm-commits
• [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)   Nikita Popov via llvm-commits
• [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)   Nikita Popov via llvm-commits
• [llvm] [LLVM][Parser] Check invalid overload suffix for intrinsics (PR #108315)   Nikita Popov via llvm-commits
• [llvm] [InitUndef] Enable the InitUndef pass on all targets (PR #108353)   Nikita Popov via llvm-commits
• [llvm] [InitUndef] Enable the InitUndef pass on all targets (PR #108353)   Nikita Popov via llvm-commits
• [llvm] [InitUndef] Enable the InitUndef pass on all targets (PR #108353)   Nikita Popov via llvm-commits
• [llvm] [LLVM][Parser] Check invalid overload suffix for intrinsics (PR #108315)   Nikita Popov via llvm-commits
• [llvm] [InitUndef] Enable the InitUndef pass on AArch64 (PR #108353)   Nikita Popov via llvm-commits
• [llvm] [InitUndef] Enable the InitUndef pass on AArch64 (PR #108353)   Nikita Popov via llvm-commits
• [lld] [LLD][COFF] Add support for ARM64EC import call thunks. (PR #107931)   Nikita Popov via llvm-commits
• [llvm] [CodeGen] Clear InitUndef pass new register cache between pass runs (PR #90967)   Nikita Popov via llvm-commits
• [llvm] [DAGCombiner] cache negative result from getMergeStoreCandidates() (PR #106949)   Nikita Popov via llvm-commits
• [llvm] [DAGCombiner] cache negative result from getMergeStoreCandidates() (PR #106949)   Nikita Popov via llvm-commits
• [llvm] [DAGCombiner] cache negative result from getMergeStoreCandidates() (PR #106949)   Nikita Popov via llvm-commits
• [llvm] [VectorCombine] Refactor Insertion Point setting in shrinkType (PR #108398)   Nikita Popov via llvm-commits
• [compiler-rt] [rtsan] Fix va_args handling in open functions (PR #108291)   Nikita Popov via llvm-commits
• [llvm] MemCpyOpt: avoid unnecessary getMemorySSA (NFC) (PR #108405)   Nikita Popov via llvm-commits
• [llvm] [InitUndef] Enable the InitUndef pass on AArch64 (PR #108353)   Nikita Popov via llvm-commits
• [llvm] [LegacyPM][DirectX] Add legacy scalarizer back for use in the DirectX backend (PR #107427)   Nikita Popov via llvm-commits
• [llvm] [InitUndef] Enable the InitUndef pass on AArch64 (PR #108353)   Nikita Popov via llvm-commits
• [llvm] MemCpyOpt: clarify logic in processStoreOfLoad (NFC) (PR #108400)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Pass DomTree and DomTreeCacheto LibCallSimplifier (PR #108446)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Replace an integer comparison of a `phi` node with multiple `ucmp`/`scmp` operands and a constant with `phi` of individual comparisons of original intrinsic's arguments (PR #107769)   Nikita Popov via llvm-commits
• [llvm] [IRSim] Avoid repeated hash lookups (NFC) (PR #108483)   Nikita Popov via llvm-commits
• [llvm] [LiveDebugValues] Avoid repeated hash lookups (NFC) (PR #108484)   Nikita Popov via llvm-commits
• [llvm] [DSE] Apply initializes attribute to DSE (PR #107282)   Nikita Popov via llvm-commits
• [llvm] 940f892 - [InstCombine] Do not modify GEP in place   Nikita Popov via llvm-commits
• [llvm] cd39242 - [InstCombine] Remove no longer needed constant offset case (NFCI)   Nikita Popov via llvm-commits
• [llvm] 1c298c9 - [InstCombine] Preserve nuw flags when merging geps   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Compare `icmp inttoptr, inttoptr` values directly (PR #107012)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Compare `icmp inttoptr, inttoptr` values directly (PR #107012)   Nikita Popov via llvm-commits
• [llvm] [InitUndef] Enable the InitUndef pass on AArch64 (PR #108353)   Nikita Popov via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)   Nikita Popov via llvm-commits
• [llvm] [InitUndef] Enable the InitUndef pass on AArch64 (PR #108353)   Nikita Popov via llvm-commits
• [llvm] [InitUndef] Enable the InitUndef pass on AArch64 (PR #108353)   Nikita Popov via llvm-commits
• [llvm] [InitUndef] Enable the InitUndef pass on non-AMDGPU targets (PR #108353)   Nikita Popov via llvm-commits
• [llvm] [InitUndef] Enable the InitUndef pass on non-AMDGPU targets (PR #108353)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Make backedge check in op of phi transform more precise (PR #106075)   Nikita Popov via llvm-commits
• [llvm] [InitUndef] Enable the InitUndef pass on non-AMDGPU targets (PR #108353)   Nikita Popov via llvm-commits
• [llvm] [SandboxIR] Implement GlobalIFunc (PR #108622)   Nikita Popov via llvm-commits
• [llvm] [SandboxIR] Implement GlobalIFunc (PR #108622)   Nikita Popov via llvm-commits
• [llvm] [Target] Avoid repeated hash lookups (NFC) (PR #108677)   Nikita Popov via llvm-commits
• [llvm] [Instrumentation] Move test coverage in Transforms (NFC) (PR #108544)   Nikita Popov via llvm-commits
• [llvm] MemCpyOpt: replace an AA query with MSSA query (PR #108535)   Nikita Popov via llvm-commits
• [llvm] MemCpyOpt: replace an AA query with MSSA query (PR #108535)   Nikita Popov via llvm-commits
• [llvm] MemCpyOpt: replace an AA query with MSSA query (PR #108535)   Nikita Popov via llvm-commits
• [llvm] [VectorCombine] Don't shrink lshr if the shamt is not less than bitwidth (PR #108705)   Nikita Popov via llvm-commits
• [llvm] [VectorCombine] Don't shrink lshr if the shamt is not less than bitwidth (PR #108705)   Nikita Popov via llvm-commits
• [llvm] [VectorCombine] Don't shrink lshr if the shamt is not less than bitwidth (PR #108705)   Nikita Popov via llvm-commits
• [llvm] [Instrumentation] Do not run sanitizers for naked functions (PR #108552)   Nikita Popov via llvm-commits
• [llvm] [DWARFLinker] Avoid repeated hash lookups (NFC) (PR #108737)   Nikita Popov via llvm-commits
• [llvm] [LLVM][IR] Add constant range support for floating-point types (PR #86483)   Nikita Popov via llvm-commits
• [llvm] [LLVM][IR] Add constant range support for floating-point types (PR #86483)   Nikita Popov via llvm-commits
• [llvm] [Instrumentation] Do not run sanitizers for naked functions (PR #108552)   Nikita Popov via llvm-commits
• [llvm] [Instrumentation] Do not run sanitizers for naked functions (PR #108552)   Nikita Popov via llvm-commits
• [llvm] [Instrumentation] Do not run sanitizers for naked functions (PR #108552)   Nikita Popov via llvm-commits
• [llvm] [Instrumentation] Do not run sanitizers for naked functions (PR #108552)   Nikita Popov via llvm-commits
• [llvm] [Instrumentation] Remove extraneous std::move (NFC) (PR #108764)   Nikita Popov via llvm-commits
• [llvm] [LLVM][IR] Add constant range support for floating-point types (PR #86483)   Nikita Popov via llvm-commits
• [llvm] [LLVM][IR] Add constant range support for floating-point types (PR #86483)   Nikita Popov via llvm-commits
• [llvm] [LLVM][IR] Add constant range support for floating-point types (PR #86483)   Nikita Popov via llvm-commits
• [llvm] [LLVM][IR] Add constant range support for floating-point types (PR #86483)   Nikita Popov via llvm-commits
• [llvm] [LLVM][IR] Add constant range support for floating-point types (PR #86483)   Nikita Popov via llvm-commits
• [llvm] [LLVM][IR] Add constant range support for floating-point types (PR #86483)   Nikita Popov via llvm-commits
• [llvm] [Scalarizer][DirectX] Add support for scalarization of Target intrinsics (PR #108776)   Nikita Popov via llvm-commits
• [llvm] [Scalarizer][DirectX] Add support for scalarization of Target intrinsics (PR #108776)   Nikita Popov via llvm-commits
• [llvm] [Scalarizer][DirectX] Add support for scalarization of Target intrinsics (PR #108776)   Nikita Popov via llvm-commits
• [llvm] [Scalarizer][DirectX] Add support for scalarization of Target intrinsics (PR #108776)   Nikita Popov via llvm-commits
• [llvm] [Scalarizer][DirectX] Add support for scalarization of Target intrinsics (PR #108776)   Nikita Popov via llvm-commits
• [llvm] [Scalarizer][DirectX] Add support for scalarization of Target intrinsics (PR #108776)   Nikita Popov via llvm-commits
• [llvm] [Scalarizer][DirectX] Add support for scalarization of Target intrinsics (PR #108776)   Nikita Popov via llvm-commits
• [libcxx] [llvm] [libcxx] improves diagnostics for containers with bad value types (PR #106296)   Nikolas Klauser via llvm-commits
• [libcxx] [llvm] [libcxx] improves diagnostics for containers with bad value types (PR #106296)   Nikolas Klauser via llvm-commits
• [libcxx] [llvm] [libcxx] improves diagnostics for containers with bad value types (PR #106296)   Nikolas Klauser via llvm-commits
• [libc] [libcxx] [llvm] [libcxx][libc] Hand in Hand PoC with from_chars (PR #91651)   Nikolas Klauser via llvm-commits
• [clang] [llvm] Prefer std::getenv to ::getenv (PR #108529)   Nikolas Klauser via llvm-commits
• [llvm] [mlir] [MLIR][ROCDL] Add dynamically legal ops to LowerGpuOpsToROCDLOpsPass (PR #108302)   Nirvedh Meshram via llvm-commits
• [llvm] [mlir] [MLIR][ROCDL] Add dynamically legal ops to LowerGpuOpsToROCDLOpsPass (PR #108302)   Nirvedh Meshram via llvm-commits
• [llvm] [mlir] [MLIR][ROCDL] Add dynamically legal ops to LowerGpuOpsToROCDLOpsPass (PR #108302)   Nirvedh Meshram via llvm-commits
• [llvm] [mlir] [MLIR][ROCDL] Add dynamically legal ops to LowerGpuOpsToROCDLOpsPass (PR #108302)   Nirvedh Meshram via llvm-commits
• [llvm] [mlir] [MLIR][ROCDL] Add dynamically legal ops to LowerGpuOpsToROCDLOpsPass (PR #108302)   Nirvedh Meshram via llvm-commits
• [llvm] [mlir] [MLIR][ROCDL] Add dynamically legal ops to LowerGpuOpsToROCDLOpsPass (PR #108302)   Nirvedh Meshram via llvm-commits
• [llvm] [mlir] [MLIR][ROCDL] Add dynamically legal ops to LowerGpuOpsToROCDLOpsPass (PR #108302)   Nirvedh Meshram via llvm-commits
• [llvm] [mlir] [MLIR][ROCDL] Add dynamically legal ops to LowerGpuOpsToROCDLOpsPass (PR #108302)   Nirvedh Meshram via llvm-commits
• [llvm] [mlir] [MLIR][ROCDL] Add dynamically legal ops to LowerGpuOpsToROCDLOpsPass (PR #108302)   Nirvedh Meshram via llvm-commits
• [llvm] d148a1a - [X86] Add tests support shifts + and in `LowerSELECTWithCmpZero`; NFC   Noah Goldstein via llvm-commits
• [llvm] 88bd507 - [X86] Handle shifts + and in `LowerSELECTWithCmpZero`   Noah Goldstein via llvm-commits
• [llvm] 1c378d2 - [X86] Add test for issue 108722; NFC   Noah Goldstein via llvm-commits
• [llvm] 81279bf - [X86] Fix missing check of rotate <-> shift equivilence (Issue 108722)   Noah Goldstein via llvm-commits
• [clang] [llvm] [Clang] restrict use of attribute names reserved by the C++ standard (PR #106036)   Oleksandr T. via llvm-commits
• [clang] [llvm] [Clang] restrict use of attribute names reserved by the C++ standard (PR #106036)   Oleksandr T. via llvm-commits
• [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [AMDGPU] eliminate frame index v add wave32 test (PR #107832)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU] eliminate frame index v_add wave32 test (PR #107832)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU] eliminate frame index v_add wave32 test (PR #107832)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU] eliminate frame index v_add wave32 test (PR #107832)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU] eliminate frame index v_add wave32 test (PR #107832)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU] eliminate frame index v_add wave32 test (PR #107832)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU] eliminate frame index v_add wave32 test (PR #107832)   Pankaj Dwivedi via llvm-commits
• [llvm] [WIP][AMDGPU] eliminate frame index v_add (PR #106060)   Pankaj Dwivedi via llvm-commits
• [llvm] [WIP][AMDGPU] eliminate frame index v_add (PR #106060)   Pankaj Dwivedi via llvm-commits
• [llvm] [mlir] [MLIR][ROCDL] Add dynamically legal ops to LowerGpuOpsToROCDLOpsPass (PR #108302)   Paul C Fuqua via llvm-commits
• [clang-tools-extra] [llvm] [llvm] add support for mustache templating language (PR #105893)   Paul Kirth via llvm-commits
• [clang-tools-extra] [llvm] [llvm] add support for mustache templating language (PR #105893)   Paul Kirth via llvm-commits
• [clang-tools-extra] [llvm] [llvm] add support for mustache templating language (PR #105893)   Paul Kirth via llvm-commits
• [clang-tools-extra] [llvm] [llvm] add support for mustache templating language (PR #105893)   Paul Kirth via llvm-commits
• [clang-tools-extra] [llvm] [llvm] add support for mustache templating language (PR #105893)   Paul Kirth via llvm-commits
• [clang-tools-extra] [llvm] [llvm] add support for mustache templating language (PR #105893)   Paul Kirth via llvm-commits
• [llvm] Add myself as the PS4/PS5 code owner (PR #108002)   Paul T Robinson via llvm-commits
• [llvm] [DebugInfo] Don't apply is_stmt on MBB branches that preserve lines (PR #108251)   Paul T Robinson via llvm-commits
• [llvm] [DebugInfo][InstCombine] Do not overwrite prior DILocation for new Insts (PR #108565)   Paul T Robinson via llvm-commits
• [llvm] [AArch64][NEON][SVE] Lower mixed sign/zero extended partial reductions to usdot (PR #107566)   Paul Walker via llvm-commits
• [llvm] [AArch64][NEON][SVE] Lower mixed sign/zero extended partial reductions to usdot (PR #107566)   Paul Walker via llvm-commits
• [llvm] [AArch64][NEON][SVE] Lower mixed sign/zero extended partial reductions to usdot (PR #107566)   Paul Walker via llvm-commits
• [llvm] [AArch64][NEON][SVE] Lower mixed sign/zero extended partial reductions to usdot (PR #107566)   Paul Walker via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Implement nxvf32 fpround to nxvbf16. (PR #107420)   Paul Walker via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Implement nxvf32 fpround to nxvbf16. (PR #107420)   Paul Walker via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Implement nxvf32 fpround to nxvbf16. (PR #107420)   Paul Walker via llvm-commits
• [llvm] [LLVM][AArch64] Refactor sve-b16b16 instruction definitions. (PR #107265)   Paul Walker via llvm-commits
• [llvm] [AArch64][NEON][SVE] Lower mixed sign/zero extended partial reductions to usdot (PR #107566)   Paul Walker via llvm-commits
• [llvm] [AArch64][NEON][SVE] Lower mixed sign/zero extended partial reductions to usdot (PR #107566)   Paul Walker via llvm-commits
• [llvm] [AArch64][NEON][SVE] Lower mixed sign/zero extended partial reductions to usdot (PR #107566)   Paul Walker via llvm-commits
• [llvm] [NFC][LoopVectorize] Avoid passing ScalarEvolution to VPlanTransforms::optimize (PR #108380)   Paul Walker via llvm-commits
• [llvm] [NFC][LoopVectorize] Avoid passing ScalarEvolution to VPlanTransforms::optimize (PR #108380)   Paul Walker via llvm-commits
• [llvm] [NFC][LoopVectorize] Avoid passing ScalarEvolution to VPlanTransforms::optimize (PR #108380)   Paul Walker via llvm-commits
• [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)   Paul Walker via llvm-commits
• [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)   Paul Walker via llvm-commits
• [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)   Paul Walker via llvm-commits
• [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)   Paul Walker via llvm-commits
• [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)   Paul Walker via llvm-commits
• [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)   Paul Walker via llvm-commits
• [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)   Paul Walker via llvm-commits
• [llvm] [LoopVectorize] Teach LoopVectorizationLegality about more early exits (PR #107004)   Paul Walker via llvm-commits
• [llvm] [NFC][LoopVectorize] Avoid passing ScalarEvolution to VPlanTransforms::optimize (PR #108380)   Paul Walker via llvm-commits
• [llvm] [AArch64][NEON][SVE] Lower mixed sign/zero extended partial reductions to usdot (PR #107566)   Paul Walker via llvm-commits
• [llvm] [AArch64][NEON][SVE] Lower mixed sign/zero extended partial reductions to usdot (PR #107566)   Paul Walker via llvm-commits
• [llvm] [AArch64][NEON][SVE] Lower mixed sign/zero extended partial reductions to usdot (PR #107566)   Paul Walker via llvm-commits
• [llvm] [AArch64][NEON][SVE] Lower mixed sign/zero extended partial reductions to usdot (PR #107566)   Paul Walker via llvm-commits
• [llvm] [AArch64][NEON][SVE] Lower mixed sign/zero extended partial reductions to usdot (PR #107566)   Paul Walker via llvm-commits
• [llvm] [AArch64][NEON][SVE] Lower mixed sign/zero extended partial reductions to usdot (PR #107566)   Paul Walker via llvm-commits
• [llvm] [AArch64][NEON][SVE] Lower mixed sign/zero extended partial reductions to usdot (PR #107566)   Paul Walker via llvm-commits
• [llvm] [NFC][LoopVectorize] Avoid passing ScalarEvolution to VPlanTransforms::optimize (PR #108380)   Paul Walker via llvm-commits
• [llvm] [LV]: Teach LV to recursively (de)interleave. (PR #89018)   Paul Walker via llvm-commits
• [llvm] [LV]: Teach LV to recursively (de)interleave. (PR #89018)   Paul Walker via llvm-commits
• [llvm] [LV]: Teach LV to recursively (de)interleave. (PR #89018)   Paul Walker via llvm-commits
• [llvm] [LV]: Teach LV to recursively (de)interleave. (PR #89018)   Paul Walker via llvm-commits
• [lldb] [llvm] [lldb]Implement LLDB Telemetry (PR #98528)   Pavel Labath via llvm-commits
• [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)   Pawan Nirpal via llvm-commits
• [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)   Pawan Nirpal via llvm-commits
• [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)   Pawan Nirpal via llvm-commits
• [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)   Pawan Nirpal via llvm-commits
• [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)   Pawan Nirpal via llvm-commits
• [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)   Pawan Nirpal via llvm-commits
• [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)   Pawan Nirpal via llvm-commits
• [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)   Pawan Nirpal via llvm-commits
• [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)   Pawan Nirpal via llvm-commits
• [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)   Pawan Nirpal via llvm-commits
• [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)   Pawan Nirpal via llvm-commits
• [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)   Pawan Nirpal via llvm-commits
• [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)   Pawan Nirpal via llvm-commits
• [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)   Pawan Nirpal via llvm-commits
• [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)   Pawan Nirpal via llvm-commits
• [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)   Pawan Nirpal via llvm-commits
• [llvm] [CodeGen] Fix documentation for ISD::ATOMIC_STORE (PR #108126)   Peilin Ye via llvm-commits
• [llvm] [CodeGen] Fix documentation for ISD::ATOMIC_STORE (PR #108126)   Peilin Ye via llvm-commits
• [llvm] [CodeGen] Fix documentation for ISD::ATOMIC_STORE (PR #108126)   Peilin Ye via llvm-commits
• [llvm] [RISCV] Add tests for memcmp expansion (PR #107824)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Add initial support of memcmp expansion (PR #107548)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Fix same mask vmerge peephole discarding false operand (PR #107827)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Separate more of scalar FP in CC_RISCV. (PR #107908)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Don't outline pcrel_lo when the function has a section prefix (PR #107943)   Pengcheng Wang via llvm-commits
• [llvm] [MacroFusion] Support commutable instructions (PR #82751)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Don't outline pcrel_lo when the function has a section prefix (PR #107943)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Don't outline pcrel_lo when the function has a section prefix (PR #107943)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Added new register class GPRNoGPRS defined as substraction of GPRC sequences from GPR (PR #106974)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Add tests for memcmp expansion (PR #107824)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Add tests for memcmp expansion (PR #107824)   Pengcheng Wang via llvm-commits
• [llvm] [LV] Introduce the EVLIVSimplify Pass for EVL-vectorized loops (PR #91796)   Pengcheng Wang via llvm-commits
• [llvm] [MacroFusion] Support commutable instructions (PR #82751)   Pengcheng Wang via llvm-commits
• [llvm] [MacroFusion] Support commutable instructions (PR #82751)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Don't outline pcrel_lo when the function has a section prefix (PR #107943)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Lower f16/bf16 splat_vector by bitcasting to i16 instead of promoting to f32. (PR #108298)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Generalize RISCVDAGToDAGISel::selectFPImm to handle bitcasts from int to FP. (PR #108284)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Expand bf16 FNEG/FABS/FCOPYSIGN (PR #108245)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Enable load clustering by default (PR #73789)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Restructure CC_RISCV_FastCC to reduce code duplication. (PR #107671)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Make FeatureStdExtZicclsm imply FeatureUnalignedScalarMem and FeatureUnalignedVectorMem (PR #108551)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Bump hwprobe support to Linux 6.11 (PR #108578)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Introduce VLOptimizer pass (PR #108640)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Introduce VLOptimizer pass (PR #108640)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Introduce VLOptimizer pass (PR #108640)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Introduce VLOptimizer pass (PR #108640)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Introduce VLOptimizer pass (PR #108640)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Introduce VLOptimizer pass (PR #108640)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Introduce VLOptimizer pass (PR #108640)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV][Docs] Remove Zvbb, Zvbc and Zvk* from experimental C intrinsics section of RISCVUsage.rst. NFC (PR #108718)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Introduce VLOptimizer pass (PR #108640)   Pengcheng Wang via llvm-commits
• [lld] [lld][AArch64] Fix getImplicitAddend in big-endian mode. (PR #107845)   Peter Smith via llvm-commits
• [lld] [lld][AArch64] Fix getImplicitAddend in big-endian mode. (PR #107845)   Peter Smith via llvm-commits
• [lld] [lld][AArch64] Fix getImplicitAddend in big-endian mode. (PR #107845)   Peter Smith via llvm-commits
• [lld] [lld][AArch64] Fix getImplicitAddend in big-endian mode. (PR #107845)   Peter Smith via llvm-commits
• [lld] [lld][AArch64] Fix getImplicitAddend in big-endian mode. (PR #107845)   Peter Smith via llvm-commits
• [lld] [lld][AArch64] Fix getImplicitAddend in big-endian mode. (PR #107845)   Peter Smith via llvm-commits
• [llvm] [CMake] Passthrough variables for packages to subbuilds (PR #107611)   Petr Hosek via llvm-commits
• [llvm] [CMake] Passthrough variables for packages to subbuilds (PR #107611)   Petr Hosek via llvm-commits
• [llvm] [CMake] Passthrough variables for packages to subbuilds (PR #107611)   Petr Hosek via llvm-commits
• [compiler-rt] [Fuzzer] Passthrough zlib CMake paths into the test (PR #107926)   Petr Hosek via llvm-commits
• [compiler-rt] [Fuzzer] Passthrough zlib CMake paths into the test (PR #107926)   Petr Hosek via llvm-commits
• [compiler-rt] [Fuzzer] Passthrough zlib CMake paths into the test (PR #107926)   Petr Hosek via llvm-commits
• [compiler-rt] [Fuzzer] Passthrough zlib CMake paths into the test (PR #107926)   Petr Hosek via llvm-commits
• [compiler-rt] [Fuzzer] Passthrough zlib CMake paths into the test (PR #107926)   Petr Hosek via llvm-commits
• [llvm] [Coverage] Skip empty profile name section (PR #108480)   Petr Hosek via llvm-commits
• [llvm] 0fc4147 - [RISCV] Add test coverage for mul X, C where C=2^N*(3,5,9)*(3,5,9)   Philip Reames via llvm-commits
• [llvm] [RISCV] Expand mul X, C where C=2^N*(3, 5, 9)*(3, 5, 9) (PR #108100)   Philip Reames via llvm-commits
• [llvm] [RISCV] Expand mul X, C where C=2^N*(3, 5, 9)*(3, 5, 9) (PR #108100)   Philip Reames via llvm-commits
• [llvm] [RISCV] Expand mul X, C where C=2^N*(3, 5, 9)*(3, 5, 9) (PR #108100)   Philip Reames via llvm-commits
• [llvm] [RISCV] Expand mul X, C where C=2^N*(3, 5, 9)*(3, 5, 9) (PR #108100)   Philip Reames via llvm-commits
• [llvm] [RISCV] Add reductions to list of roots in tryToReduceVL (PR #107595)   Philip Reames via llvm-commits
• [llvm] [RISCV][TTI] Add vp.cmp intrinsic cost with functionalOPC. (PR #107504)   Philip Reames via llvm-commits
• [llvm] [RISCV] Expand mul X, C where C=2^N*(3, 5, 9)*(3, 5, 9) (PR #108100)   Philip Reames via llvm-commits
• [llvm] 54c6e1c - [SLP] Move a non-power-of-two bailout down slightly   Philip Reames via llvm-commits
• [llvm] 7910812 - [SLP] Regen a test to pick up naming changes   Philip Reames via llvm-commits
• [llvm] fa8b737 - [SLP][RISCV] Add test for 3 element build vector feeding reduce   Philip Reames via llvm-commits
• [llvm] [RISCV][TTI] Reduce cost of a build_vector pattern (PR #108419)   Philip Reames via llvm-commits
• [llvm] [RISCV][TTI] Reduce cost of a build_vector pattern (PR #108419)   Philip Reames via llvm-commits
• [llvm] [RISCV][TTI] Reduce cost of a build_vector pattern (PR #108419)   Philip Reames via llvm-commits
• [llvm] [RISCV] Change Zvbb and Zvkb from 'Assembly Support' to Supported. (PR #108572)   Philip Reames via llvm-commits
• [llvm] [RISCV] Add Zvfhmin to RISCVUsage.rst. NFC (PR #108574)   Philip Reames via llvm-commits
• [llvm] [RISCV] Add documentation that Zvbc and Zvk* are supported through intrinsics. NFC (PR #108577)   Philip Reames via llvm-commits
• [llvm] [RISCV][TTI] Adjust cost for extract/insert element when VLEN is known (PR #108595)   Philip Reames via llvm-commits
• [llvm] [IR] Initial introduction of memset_pattern (PR #97583)   Philip Reames via llvm-commits
• [llvm] [IR] Initial introduction of memset_pattern (PR #97583)   Philip Reames via llvm-commits
• [llvm] [IR] Initial introduction of memset_pattern (PR #97583)   Philip Reames via llvm-commits
• [llvm] [IR] Initial introduction of memset_pattern (PR #97583)   Philip Reames via llvm-commits
• [llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #107273)   Philip Reames via llvm-commits
• [llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #107273)   Philip Reames via llvm-commits
• [llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #107273)   Philip Reames via llvm-commits
• [llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #107273)   Philip Reames via llvm-commits
• [llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #107273)   Philip Reames via llvm-commits
• [llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #107273)   Philip Reames via llvm-commits
• [llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #107273)   Philip Reames via llvm-commits
• [llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #107273)   Philip Reames via llvm-commits
• [llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #107273)   Philip Reames via llvm-commits
• [llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #107273)   Philip Reames via llvm-commits
• [llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #107273)   Philip Reames via llvm-commits
• [llvm] [RISCV] Introduce VLOptimizer pass (PR #108640)   Philip Reames via llvm-commits
• [llvm] [llvm-ml] Fix RIP-relative addressing for ptr operands (PR #107618)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)   Phoebe Wang via llvm-commits
• [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)   Phoebe Wang via llvm-commits
• [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)   Phoebe Wang via llvm-commits
• [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)   Phoebe Wang via llvm-commits
• [llvm] [X86][AVX10.2] Support AVX10.2-COMEF new instructions. (PR #108063)   Phoebe Wang via llvm-commits
• [llvm] [X86][AVX10.2] Support AVX10.2-COMEF new instructions. (PR #108063)   Phoebe Wang via llvm-commits
• [llvm] [X86][AVX10.2] Support AVX10.2-COMEF new instructions. (PR #108063)   Phoebe Wang via llvm-commits
• [llvm] [X86][AVX10.2] Support AVX10.2-COMEF new instructions. (PR #108063)   Phoebe Wang via llvm-commits
• [llvm] [X86][AVX10.2] Support AVX10.2-COMEF new instructions. (PR #108063)   Phoebe Wang via llvm-commits
• [llvm] [X86][AVX10.2] Support AVX10.2-COMEF new instructions. (PR #108063)   Phoebe Wang via llvm-commits
• [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)   Phoebe Wang via llvm-commits
• [llvm] [X86][AVX10.2] Support AVX10.2-COMEF new instructions. (PR #108063)   Phoebe Wang via llvm-commits
• [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)   Phoebe Wang via llvm-commits
• [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)   Phoebe Wang via llvm-commits
• [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)   Phoebe Wang via llvm-commits
• [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)   Phoebe Wang via llvm-commits
• [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)   Phoebe Wang via llvm-commits
• [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)   Phoebe Wang via llvm-commits
• [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)   Phoebe Wang via llvm-commits
• [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)   Phoebe Wang via llvm-commits
• [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)   Phoebe Wang via llvm-commits
• [llvm] [X86][AVX10.2] Support AVX10.2-COMEF new instructions. (PR #108063)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)   Phoebe Wang via llvm-commits
• [llvm] [X86][AVX10.2] Support AVX10.2-COMEF new instructions. (PR #108063)   Phoebe Wang via llvm-commits
• [llvm] [X86][AVX10.2] Support AVX10.2-COMEF new instructions. (PR #108063)   Phoebe Wang via llvm-commits
• [llvm] [X86][AVX10.2] Support AVX10.2-COMEF new instructions. (PR #108063)   Phoebe Wang via llvm-commits
• [llvm] [X86][AVX10.2] Support AVX10.2-COMEF new instructions. (PR #108063)   Phoebe Wang via llvm-commits
• [llvm] [X86][AVX10.2] Support AVX10.2-COMEF new instructions. (PR #108063)   Phoebe Wang via llvm-commits
• [llvm] [X86][AVX10.2] Support AVX10.2-COMEF new instructions. (PR #108063)   Phoebe Wang via llvm-commits
• [llvm] [X86][AVX10.2] Support AVX10.2-COMEF new instructions. (PR #108063)   Phoebe Wang via llvm-commits
• [llvm] [X86][AVX10.2] Support AVX10.2-COMEF new instructions. (PR #108063)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2 MOVZXC new Instructions. (PR #108537)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2 MOVZXC new Instructions. (PR #108537)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2 MOVZXC new Instructions. (PR #108537)   Phoebe Wang via llvm-commits
• [llvm] [X86] Add missing immediate qualifier to the (V)INSERTPS instruction names (PR #108568)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2 MOVZXC new Instructions. (PR #108537)   Phoebe Wang via llvm-commits
• [llvm] [X86] Add missing immediate qualifier to the (V)INSERT/EXTRACT/PERM2 instruction names (PR #108593)   Phoebe Wang via llvm-commits
• [llvm] [X86, SimplifyCFG] Support hoisting load/store with conditional faulting (Part I) (PR #96878)   Phoebe Wang via llvm-commits
• [llvm] [X86,SimplifyCFG] Use passthru to reduce select (PR #108754)   Phoebe Wang via llvm-commits
• [llvm] [X86, SimplifyCFG] Support hoisting load/store with conditional faulting (Part I) (PR #96878)   Phoebe Wang via llvm-commits
• [llvm] [X86,SimplifyCFG] Use passthru to reduce select (PR #108754)   Phoebe Wang via llvm-commits
• [llvm] [X86,SimplifyCFG] Use passthru to reduce select (PR #108754)   Phoebe Wang via llvm-commits
• [llvm] [X86,SimplifyCFG] Use passthru to reduce select (PR #108754)   Phoebe Wang via llvm-commits
• [llvm] [X86,SimplifyCFG] Use passthru to reduce select (PR #108754)   Phoebe Wang via llvm-commits
• [llvm] [X86,SimplifyCFG] Use passthru to reduce select (PR #108754)   Phoebe Wang via llvm-commits
• [llvm] [X86,SimplifyCFG] Use passthru to reduce select (PR #108754)   Phoebe Wang via llvm-commits
• [llvm] [X86] Consistently use 'k' for predicate mask registers in instruction names (PR #108780)   Phoebe Wang via llvm-commits
• [llvm] Reland "[AMDGPU] Graph-based Module Splitting Rewrite (#104763)" (PR #107076)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Promote uniform ops to I32 in DAGISel (PR #106383)   Pierre van Houtryve via llvm-commits
• [llvm] Reland "[AMDGPU] Graph-based Module Splitting Rewrite (#104763)" (PR #107076)   Pierre van Houtryve via llvm-commits
• [llvm] Reland "[AMDGPU] Graph-based Module Splitting Rewrite (#104763)" (PR #107076)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Document & Finalize GFX12 Memory Model (PR #98599)   Pierre van Houtryve via llvm-commits
• [llvm] [GlobalIsel] Update MIR gallery (PR #107903)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] SplitModule: Better handling of aliases & inline assembly (PR #106528)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] SplitModule: Better handling of aliases & inline assembly (PR #106528)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] SplitModule: Better handling of aliases & inline assembly (PR #106528)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Fix selection of s_load_b96 on GFX11 (PR #108029)   Piotr Sobczak via llvm-commits
• [llvm] [AMDGPU] Fix selection of s_load_b96 on GFX11 (PR #108029)   Piotr Sobczak via llvm-commits
• [llvm] [AMDGPU] Fix selection of s_load_b96 on GFX11 (PR #108029)   Piotr Sobczak via llvm-commits
• [llvm] [AMDGPU] Fix selection of s_load_b96 on GFX11 (PR #108029)   Piotr Sobczak via llvm-commits
• [llvm] [AMDGPU] Fix selection of s_load_b96 on GFX11 (PR #108029)   Piotr Sobczak via llvm-commits
• [llvm] [InitUndef] Don't use largest super class (PR #107885)   Piyou Chen via llvm-commits
• [llvm] [InitUndef] Enable the InitUndef pass on all targets (PR #108353)   Piyou Chen via llvm-commits
• [llvm] [InitUndef] Enable the InitUndef pass on all targets (PR #108353)   Piyou Chen via llvm-commits
• [llvm] [LLVM][NVPTX] Add support for tensormap.cp_fenceproxy (PR #107555)   Pradeep Kumar via llvm-commits
• [llvm] [NVPTX] Support copysign PTX instruction (PR #107800)   Pranav Kant via llvm-commits
• [llvm] [NVPTX] Support copysign PTX instruction (PR #107800)   Pranav Kant via llvm-commits
• [llvm] Revert "[NVPTX] Support copysign PTX instruction (#107800)" (PR #108066)   Pranav Kant via llvm-commits
• [llvm] Revert "[NVPTX] Support copysign PTX instruction (#107800)" (PR #108066)   Pranav Kant via llvm-commits
• [llvm] Revert "[NVPTX] Support copysign PTX instruction (#107800)" (PR #108066)   Pranav Kant via llvm-commits
• [llvm] [NVPTX] Support copysign PTX instruction (PR #107800)   Pranav Kant via llvm-commits
• [llvm] [bazel] Add CGData targets/deps (PR #108070)   Pranav Kant via llvm-commits
• [llvm] [Bazel] Fix build break for SandboxVectorizer (PR #108638)   Pranav Kant via llvm-commits
• [llvm] [Bazel] Fix build break for SandboxVectorizer (PR #108638)   Pranav Kant via llvm-commits
• [llvm] [Bazel] Fix build break for SandboxVectorizer (PR #108638)   Pranav Kant via llvm-commits
• [clang] [compiler-rt] [llvm] [PGO] Initialize GOV Writeout and Reset Functions in the Runtime on AIX (PR #108570)   Qiongsi Wu via llvm-commits
• [clang] [compiler-rt] [llvm] [PGO] Initialize GOV Writeout and Reset Functions in the Runtime on AIX (PR #108570)   Qiongsi Wu via llvm-commits
• [clang] [compiler-rt] [llvm] [PGO] Initialize GOV Writeout and Reset Functions in the Runtime on AIX (PR #108570)   Qiongsi Wu via llvm-commits
• [llvm] [PowerPC] Implement llvm.set.rounding intrinsic (PR #67302)   Qiu Chaofan via llvm-commits
• [llvm] [PowerPC] Implement llvm.set.rounding intrinsic (PR #67302)   Qiu Chaofan via llvm-commits
• [llvm] [PowerPC] Peephole address calculation in TOC memops (PR #76488)   Qiu Chaofan via llvm-commits
• [llvm] [BOLT] Drop suffixes in parsePseudoProbe GUID assignment (PR #106243)   Rafael Auler via llvm-commits
• [clang] [llvm] [TableGen] Change SetTheory set/vec to use const Record * (PR #107692)   Rahul Joshi via llvm-commits
• [llvm] [NFC][TableGen] Migrate LLVM Attribute Emitter to const RecordKeeper (PR #107698)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Migrate CodeGenHWModes to use const RecordKeeper (PR #107851)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Migrate CodeGenHWModes to use const RecordKeeper (PR #107851)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Change CGIOperandList::OperandInfo::Rec to const pointer (PR #107858)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Change CGIOperandList::OperandInfo::Rec to const pointer (PR #107858)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Change CGIOperandList::OperandInfo::Rec to const pointer (PR #107858)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Migrate Opt/OptRST Emitters to const RecordKeeper (PR #107696)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Migrate CodeGenHWModes to use const RecordKeeper (PR #107851)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Change CGIOperandList::OperandInfo::Rec to const pointer (PR #107858)   Rahul Joshi via llvm-commits
• [llvm] [RFC] IR: Define noalias.addrspace metadata (PR #102461)   Rahul Joshi via llvm-commits
• [llvm] [RFC] IR: Define noalias.addrspace metadata (PR #102461)   Rahul Joshi via llvm-commits
• [llvm] [RFC] IR: Define noalias.addrspace metadata (PR #102461)   Rahul Joshi via llvm-commits
• [llvm] [NFC][TableGen] DirectiveEmitter code cleanup (PR #107775)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Change CGIOperandList::OperandInfo::Rec to const pointer (PR #107858)   Rahul Joshi via llvm-commits
• [llvm] [RFC] IR: Define noalias.addrspace metadata (PR #102461)   Rahul Joshi via llvm-commits
• [llvm] [RFC] IR: Define noalias.addrspace metadata (PR #102461)   Rahul Joshi via llvm-commits
• [llvm] [RFC] IR: Define noalias.addrspace metadata (PR #102461)   Rahul Joshi via llvm-commits
• [llvm] [RFC] IR: Define noalias.addrspace metadata (PR #102461)   Rahul Joshi via llvm-commits
• [llvm] [RFC] IR: Define noalias.addrspace metadata (PR #102461)   Rahul Joshi via llvm-commits
• [clang] [llvm] [TableGen] Change SetTheory set/vec to use const Record * (PR #107692)   Rahul Joshi via llvm-commits
• [llvm] [NFC][TableGen] DirectiveEmitter code cleanup (PR #107775)   Rahul Joshi via llvm-commits
• [llvm] [NFC][TableGen] DirectiveEmitter code cleanup (PR #107775)   Rahul Joshi via llvm-commits
• [llvm] [NFC][TableGen] DirectiveEmitter code cleanup (PR #107775)   Rahul Joshi via llvm-commits
• [llvm] [NFC][TableGen] DirectiveEmitter code cleanup (PR #107775)   Rahul Joshi via llvm-commits
• [llvm] [NFC][TableGen] Simplify DiretiveEmitter using range for loops (PR #107909)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Migrate CodeGenHWModes to use const RecordKeeper (PR #107851)   Rahul Joshi via llvm-commits
• [llvm] [NFC][TableGen] Simplify DirectiveEmitter using range for loops (PR #107909)   Rahul Joshi via llvm-commits
• [llvm] [Support] Add automatic index assignment in formatv (PR #107459)   Rahul Joshi via llvm-commits
• [llvm] [Support] Add automatic index assignment in formatv (PR #107459)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Migrate Option Emitters to const RecordKeeper (PR #107696)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Migrate Option Emitters to const RecordKeeper (PR #107696)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Migrate Option Emitters to const RecordKeeper (PR #107696)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Change CGIOperandList::OperandInfo::Rec to const pointer (PR #107858)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Change CodeGenInstruction record members to const (PR #107921)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Migrate Option Emitters to const RecordKeeper (PR #107696)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Change CodeGenInstruction record members to const (PR #107921)   Rahul Joshi via llvm-commits
• [llvm] [NFC][TableGen] Simplify DirectiveEmitter using range for loops (PR #107909)   Rahul Joshi via llvm-commits
• [llvm] [NFC][TableGen] Simplify DirectiveEmitter using range for loops (PR #107909)   Rahul Joshi via llvm-commits
• [llvm] [NFC][TableGen] Simplify DirectiveEmitter using range for loops (PR #107909)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Change CodeGenInstruction record members to const (PR #107921)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Change CodeGenInstruction record members to const (PR #107921)   Rahul Joshi via llvm-commits
• [llvm] [RFC] IR: Define noalias.addrspace metadata (PR #102461)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Change SubtargetFeatureInfo to use const Record pointers (PR #108013)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Change SubtargetFeatureInfo to use const Record pointers (PR #108013)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Change CodeGenRegister to use const Record pointer (PR #108027)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Change CodeGenRegister to use const Record pointer (PR #108027)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Change CodeGenRegister to use const Record pointer (PR #108027)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Change SubtargetFeatureInfo to use const Record pointers (PR #108013)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Change CodeGenRegister to use const Record pointer (PR #108027)   Rahul Joshi via llvm-commits
• [llvm] [RFC] IR: Define noalias.addrspace metadata (PR #102461)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Migrate Option Emitters to const RecordKeeper (PR #107696)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][Option] Refactor option name comparison (PR #108219)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][Option] Refactor option name comparison (PR #108219)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Migrate Option Emitters to const RecordKeeper (PR #107696)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Fix MacOS failure in Option Emitter. (PR #108225)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Migrate Option Emitters to const RecordKeeper (PR #107696)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Fix MacOS failure in Option Emitter. (PR #108225)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Migrate Option Emitters to const RecordKeeper (PR #107696)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Migrate Option Emitters to const RecordKeeper (PR #107696)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Migrate Option Emitters to const RecordKeeper (PR #107696)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Change CodeGenInstruction record members to const (PR #107921)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Change SubtargetFeatureInfo to use const Record pointers (PR #108013)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Change CodeGenRegister to use const Record pointer (PR #108027)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][Option] Refactor option name comparison (PR #108219)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][Option] Refactor option name comparison (PR #108219)   Rahul Joshi via llvm-commits
• [llvm] [RFC] IR: Define noalias.addrspace metadata (PR #102461)   Rahul Joshi via llvm-commits
• [llvm] [RFC] IR: Define noalias.addrspace metadata (PR #102461)   Rahul Joshi via llvm-commits
• [llvm] [RFC] IR: Define noalias.addrspace metadata (PR #102461)   Rahul Joshi via llvm-commits
• [llvm] [RFC] IR: Define noalias.addrspace metadata (PR #102461)   Rahul Joshi via llvm-commits
• [llvm] [Support] Add automatic index assignment in formatv (PR #107459)   Rahul Joshi via llvm-commits
• [llvm] [Support] Add automatic index assignment in formatv (PR #107459)   Rahul Joshi via llvm-commits
• [llvm] [Support] Add automatic index assignment in formatv (PR #107459)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][Parser] Check invalid overload suffix for intrinsics (PR #108315)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][Parser] Check invalid overload suffix for intrinsics (PR #108315)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][Parser] Check invalid overload suffix for intrinsics (PR #108315)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][Parser] Check invalid overload suffix for intrinsics (PR #108315)   Rahul Joshi via llvm-commits
• [llvm] [Support] Add automatic index assignment in formatv (PR #107459)   Rahul Joshi via llvm-commits
• [llvm] [Support] Add automatic index assignment in formatv (PR #107459)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][Parser] Check invalid overload suffix for intrinsics (PR #108315)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][Parser] Check invalid overload suffix for intrinsics (PR #108315)   Rahul Joshi via llvm-commits
• [llvm] [Support] Fix bugs in formatv automatic index assignment (PR #108384)   Rahul Joshi via llvm-commits
• [llvm] [Support] Fix bugs in formatv automatic index assignment (PR #108384)   Rahul Joshi via llvm-commits
• [llvm] [Support] Fix bugs in formatv automatic index assignment (PR #108384)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][Option] Refactor option name comparison (PR #108219)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][Option] Refactor option name comparison (PR #108219)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][Option] Refactor option name comparison (PR #108219)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][Option] Refactor option name comparison (PR #108219)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][Option] Refactor option name comparison (PR #108219)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][Option] Refactor option name comparison (PR #108219)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][Option] Refactor option name comparison (PR #108219)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][Option] Refactor option name comparison (PR #108219)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][Option] Refactor option name comparison (PR #108219)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][Option] Refactor option name comparison (PR #108219)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][Option] Refactor option name comparison (PR #108219)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][Option] Refactor option name comparison (PR #108219)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Change CodeGenSchedule to use const RecordKeeper (PR #108617)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Change CodeGenSchedule to use const RecordKeeper (PR #108617)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][Option] Refactor option name comparison (PR #108219)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][Option] Refactor option name comparison (PR #108219)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][Option] Refactor option name comparison (PR #108219)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][Option] Refactor option name comparison (PR #108219)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Change CodeGenSchedule to use const RecordKeeper (PR #108617)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][Option] Refactor option name comparison (PR #108219)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][Option] Refactor option name comparison (PR #108219)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][Option] Refactor option name comparison (PR #108219)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Change CodeGenSchedule to use const RecordKeeper (PR #108617)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Change CodeGenTarget to use const RecordKeeper (PR #108752)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Change CodeGenInstAlias to use const Record pointers (PR #108753)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Change CodeGenTarget to use const RecordKeeper (PR #108752)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Change CodeGenTarget to use const RecordKeeper (PR #108752)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Change CodeGenTarget to use const RecordKeeper (PR #108752)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Change CodeGenInstAlias to use const Record pointers (PR #108753)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Change CodeGenInstAlias to use const Record pointers (PR #108753)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Change CodeGenInstAlias to use const Record pointers (PR #108753)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Change CodeGenTarget to use const RecordKeeper (PR #108752)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Change CodeGenDAGPatterns to use const RecordKeeper (PR #108762)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Change SubtargetEmitter to use const RecordKeeper (PR #108763)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Change SubtargetEmitter to use const RecordKeeper (PR #108763)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Change CodeGenDAGPatterns to use const RecordKeeper (PR #108762)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Change SubtargetEmitter to use const RecordKeeper (PR #108763)   Rahul Joshi via llvm-commits
• [llvm] [Support] Fix bugs in formatv automatic index assignment (PR #108384)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Change CodeGenDAGPatterns to use const RecordKeeper (PR #108762)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Change SubtargetEmitter to use const RecordKeeper (PR #108763)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Change CodeGenDAGPatterns to use const RecordKeeper (PR #108762)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Change CodeGenDAGPatterns to use const RecordKeeper (PR #108762)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Change SubtargetEmitter to use const RecordKeeper (PR #108763)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Change CodeGenSchedule to use const Record pointers (PR #108782)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][TableGen] Change CodeGenSchedule to use const Record pointers (PR #108782)   Rahul Joshi via llvm-commits
• [compiler-rt] [ASan][test] XFAIL global-overflow.cpp etc. on SPARC (PR #108200)   Rainer Orth via llvm-commits
• [compiler-rt] [sanitizer_common][test] Disable sanitizer_coverage_trace_pc_guard.cp… (PR #108206)   Rainer Orth via llvm-commits
• [llvm] [WIP][SPARC] Allow overaligned `alloca`s (PR #107223)   Rainer Orth via llvm-commits
• [compiler-rt] [WIP][ASan][test] Enable ASan tests on SPARC (PR #107405)   Rainer Orth via llvm-commits
• [compiler-rt] [ASan] Disable InstallAtForkHandler on Linux/sparc64 (PR #108542)   Rainer Orth via llvm-commits
• [compiler-rt] [WIP][ASan][test] Enable ASan tests on SPARC (PR #107405)   Rainer Orth via llvm-commits
• [llvm] [WIP][SPARC] Allow overaligned `alloca`s (PR #107223)   Rainer Orth via llvm-commits
• [llvm] [InstCombine] Transform (fcmp + fadd + sel) into (fcmp + sel + fadd) (PR #106492)   Rajat Bajpai via llvm-commits
• [llvm] LangRef: state explicitly that floats generally behave according to IEEE-754 (PR #102140)   Ralf Jung via llvm-commits
• [llvm] LCA: migrate from DA to LAA; fix cost computation (PR #107691)   Ramkumar Ramachandra via llvm-commits
• [llvm] LAA: generalize strides over unequal type sizes (PR #108088)   Ramkumar Ramachandra via llvm-commits
• [llvm] LAA: generalize strides over unequal type sizes (PR #108088)   Ramkumar Ramachandra via llvm-commits
• [llvm] LAA: improve code in a couple of routines (NFC) (PR #108092)   Ramkumar Ramachandra via llvm-commits
• [llvm] LAA: generalize strides over unequal type sizes (PR #108088)   Ramkumar Ramachandra via llvm-commits
• [llvm] LAA: generalize strides over unequal type sizes (PR #108088)   Ramkumar Ramachandra via llvm-commits
• [llvm] LAA: generalize strides over unequal type sizes (PR #108088)   Ramkumar Ramachandra via llvm-commits
• [llvm] LCA: migrate from DA to LAA; fix cost computation (PR #107691)   Ramkumar Ramachandra via llvm-commits
• [llvm] VPlan/PatternMatch: mark match functions const (NFC) (PR #108191)   Ramkumar Ramachandra via llvm-commits
• [llvm] MemCpyOpt: clarify logic in processStoreOfLoad (NFC) (PR #108400)   Ramkumar Ramachandra via llvm-commits
• [llvm] MemCpyOpt: avoid unnecessary getMemorySSA (NFC) (PR #108405)   Ramkumar Ramachandra via llvm-commits
• [llvm] LICM: hoist BO assoc for FAdd and FMul (PR #108415)   Ramkumar Ramachandra via llvm-commits
• [llvm] MTM: improve operand latency when missing sched info (PR #101389)   Ramkumar Ramachandra via llvm-commits
• [llvm] MTM: improve operand latency when missing sched info (PR #101389)   Ramkumar Ramachandra via llvm-commits
• [llvm] MemCpyOpt: avoid unnecessary getMemorySSA (NFC) (PR #108405)   Ramkumar Ramachandra via llvm-commits
• [llvm] MemCpyOpt: clarify logic in processStoreOfLoad (NFC) (PR #108400)   Ramkumar Ramachandra via llvm-commits
• [llvm] LV: clamp VF with TC only when scalar epilogue is needed (PR #91253)   Ramkumar Ramachandra via llvm-commits
• [llvm] MTM: improve operand latency when missing sched info (PR #101389)   Ramkumar Ramachandra via llvm-commits
• [llvm] MemCpyOpt: replace an AA query with MSSA query (PR #108535)   Ramkumar Ramachandra via llvm-commits
• [llvm] LV: clamp VF with TC only when scalar epilogue is needed (PR #91253)   Ramkumar Ramachandra via llvm-commits
• [llvm] LV: clamp VF with TC only when scalar epilogue is needed (PR #91253)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SDAG] Simplify divergence verification (PR #108182)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV][NFC] Unified printing format with vector-predication intrinsics with explicit vector length (PR #108177)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Add initial loop-invariant code motion transform. (PR #107894)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Add initial loop-invariant code motion transform. (PR #107894)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Add initial loop-invariant code motion transform. (PR #107894)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Add initial loop-invariant code motion transform. (PR #107894)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Add initial loop-invariant code motion transform. (PR #107894)   Ramkumar Ramachandra via llvm-commits
• [llvm] VPlan/Builder: inline VPBuilder::createICmp (NFC) (PR #105650)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LoopInterchange] Forbid interchange when the dependency is confused (PR #78533)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LoopInterchange] Forbid interchange when the dependency is confused (PR #78533)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LoopInterchange] Forbid interchange when the dependency is confused (PR #78533)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LoopInterchange] Forbid interchange when the dependency is confused (PR #78533)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LoopInterchange] Forbid interchange when the dependency is confused (PR #78533)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LoopInterchange] Forbid interchange when the dependency is confused (PR #78533)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LoopInterchange] Forbid interchange when the dependency is confused (PR #78533)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LoopInterchange] Forbid interchange when the dependency is confused (PR #78533)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LoopInterchange] Forbid interchange when the dependency is confused (PR #78533)   Ramkumar Ramachandra via llvm-commits
• [llvm] [ValueTracking] AllowEphemerals for alignment assumptions. (PR #108632)   Ramkumar Ramachandra via llvm-commits
• [llvm] [ValueTracking] AllowEphemerals for alignment assumptions. (PR #108632)   Ramkumar Ramachandra via llvm-commits
• [llvm] [ValueTracking] AllowEphemerals for alignment assumptions. (PR #108632)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Use pointer to member 0 as VPInterleaveRecipe's pointer arg. (PR #106431)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Use pointer to member 0 as VPInterleaveRecipe's pointer arg. (PR #106431)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Use pointer to member 0 as VPInterleaveRecipe's pointer arg. (PR #106431)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Use pointer to member 0 as VPInterleaveRecipe's pointer arg. (PR #106431)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Use pointer to member 0 as VPInterleaveRecipe's pointer arg. (PR #106431)   Ramkumar Ramachandra via llvm-commits
• [llvm] MemCpyOpt: replace an AA query with MSSA query (PR #108535)   Ramkumar Ramachandra via llvm-commits
• [llvm] MemCpyOpt: replace an AA query with MSSA query (NFC) (PR #108535)   Ramkumar Ramachandra via llvm-commits
• [llvm] MemCpyOpt: replace an AA query with MSSA query (NFC) (PR #108535)   Ramkumar Ramachandra via llvm-commits
• [llvm] Don't rely on undefined behavior to store how a `User` object's allocation is laid out (PR #105714)   Reid Kleckner via llvm-commits
• [llvm] Don't rely on undefined behavior to store how a `User` object's allocation is laid out (PR #105714)   Reid Kleckner via llvm-commits
• [llvm] Don't rely on undefined behavior to store how a `User` object's allocation is laid out (PR #105714)   Reid Kleckner via llvm-commits
• [llvm] Don't rely on undefined behavior to store how a `User` object's allocation is laid out (PR #105714)   Reid Kleckner via llvm-commits
• [lld] [LLD][COFF][NFC] Create import thunks in ImportFile::parse. (PR #107929)   Reid Kleckner via llvm-commits
• [clang] [llvm] [docs] Add a section on AI-generated content to the developer policy (PR #91014)   Reid Kleckner via llvm-commits
• [clang] [llvm] [docs] Add a section on AI-generated content to the developer policy (PR #91014)   Reid Kleckner via llvm-commits
• [clang] [llvm] [docs] Add a section on AI-generated content to the developer policy (PR #91014)   Reid Kleckner via llvm-commits
• [llvm] Don't rely on undefined behavior to store how a `User` object's allocation is laid out (PR #105714)   Reid Kleckner via llvm-commits
• [llvm] [VPlan] Add initial loop-invariant code motion transform. (PR #107894)   Renato Golin via llvm-commits
• [llvm] [ADT] Require base equality in indexed_accessor_iterator::operator==() (PR #107856)   River Riddle via llvm-commits
• [llvm] [Support] Add automatic index assignment in formatv (PR #107459)   River Riddle via llvm-commits
• [llvm] [Support] Add automatic index assignment in formatv (PR #107459)   River Riddle via llvm-commits
• [llvm] [Support] Add automatic index assignment in formatv (PR #107459)   River Riddle via llvm-commits
• [llvm] [Support] Add automatic index assignment in formatv (PR #107459)   River Riddle via llvm-commits
• [libcxx] [llvm] [libc++][CI] Update to Clang-20 (PR #108761)   Robin Caloudis via llvm-commits
• [libcxx] [llvm] [libc++][CI] Update to Clang-20 (PR #108761)   Robin Caloudis via llvm-commits
• [libcxx] [llvm] [libc++][CI] Update to Clang-20 (PR #108761)   Robin Caloudis via llvm-commits
• [libcxx] [llvm] [libc++][CI] Update to Clang-20 (PR #108761)   Robin Caloudis via llvm-commits
• [libcxx] [llvm] [libc++][CI] Update to Clang-20 (PR #108761)   Robin Caloudis via llvm-commits
• [libcxx] [llvm] [libc++][CI] Update to Clang-20 (PR #108761)   Robin Caloudis via llvm-commits
• [libcxx] [llvm] [libc++][CI] Update to Clang-20 (PR #108761)   Robin Caloudis via llvm-commits
• [libcxx] [llvm] [libc++][CI] Update to Clang-20 (PR #108761)   Robin Caloudis via llvm-commits
• [libcxx] [llvm] [libc++][CI] Update to Clang-20 (PR #108761)   Robin Caloudis via llvm-commits
• [libcxx] [llvm] [libc++][CI] Update to Clang-20 (PR #108761)   Robin Caloudis via llvm-commits
• [libcxx] [llvm] [libc++][CI] Upgrade HEAD version to Clang-20 (PR #108761)   Robin Caloudis via llvm-commits
• [libcxx] [llvm] [libc++][CI] Upgrade HEAD version to Clang-20 (PR #108761)   Robin Caloudis via llvm-commits
• [libcxx] [llvm] [libc++][CI] Upgrade HEAD version to Clang-20 (PR #108761)   Robin Caloudis via llvm-commits
• [libcxx] [llvm] [libc++][CI] Upgrade compiler HEAD version to Clang-20 (PR #108761)   Robin Caloudis via llvm-commits
• [libcxx] [llvm] [libc++][CI] Upgrade compiler HEAD version to Clang-20 (PR #108761)   Robin Caloudis via llvm-commits
• [libcxx] [llvm] [libc++][CI] Upgrade compiler HEAD version to Clang-20 (PR #108761)   Robin Caloudis via llvm-commits
• [libcxx] [llvm] [libc++][CI] Upgrade compiler HEAD version to Clang-20 (PR #108761)   Robin Caloudis via llvm-commits
• [libcxx] [llvm] [libc++][CI] Upgrade compiler HEAD version to Clang-20 (PR #108761)   Robin Caloudis via llvm-commits
• [llvm] [RISCV] Move vmerge same mask peephole to RISCVVectorPeephole (PR #106108)   Roger Ferrer Ibáñez via llvm-commits
• [llvm] [RISCV] Fix same mask vmerge peephole discarding false operand (PR #107827)   Roger Ferrer Ibáñez via llvm-commits
• [llvm] [InstCombine] Use m_Power2 to check for powers of 2 (PR #102500)   Rose Silicon via llvm-commits
• [llvm] Simplify Patterns (PR #102221)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Replace m_SpecificFP(1.0) with m_FPOne() (NFC) (PR #102202)   Rose Silicon via llvm-commits
• [llvm] [CodeGen] TwoAddressInstructionPass: Control NumVisited limit via command line option (PR #100125)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Canonicalize manual signed mul overflows (PR #100048)   Rose Silicon via llvm-commits
• [llvm] [CodeGen] TwoAddressInstructionPass: Update default option (PR #100046)   Rose Silicon via llvm-commits
• [compiler-rt] [llvm] [compiler-rt]: Update BlocksRuntime to current open-source version (PR #100051)   Rose Silicon via llvm-commits
• [llvm] [ARM] Resolve FIXME: Swap adds <-> subs offset is 0 (PR #78870)   Rose Silicon via llvm-commits
• [llvm] [ARM] Fold LDR/STR with base update to LDM/STD on Thumb1 (PR #78881)   Rose Silicon via llvm-commits
• [llvm] [CodeGen] Resolve FIXME: Try SCEV getRange (PR #80623)   Rose Silicon via llvm-commits
• [llvm] [LTO] Set default Darwin CPU to apple-a7 for AArch64 (PR #81540)   Rose Silicon via llvm-commits
• [llvm] [AArch64] Make legal shuffle generation consistent with how it is done for ARM (PR #81754)   Rose Silicon via llvm-commits
• [llvm] [AArch64] Skip if then else diamonds (PR #82135)   Rose Silicon via llvm-commits
• [llvm] [ARM] Add r12 and lr as scratch registers (PR #82454)   Rose Silicon via llvm-commits
• [llvm] [Transforms] Base default constructor of LoopVectorizeOptions on command line parameters (PR #83645)   Rose Silicon via llvm-commits
• [llvm] [SelectionDAG] Calculate KnownBits for SMIN (PR #85584)   Rose Silicon via llvm-commits
• [llvm] [SelectionDAG] Remove arbitrary patch size check (PR #85590)   Rose Silicon via llvm-commits
• [llvm] [ObjCARC] Allow removal of autoreleasepools (PR #85493)   Rose Silicon via llvm-commits
• [llvm] [X86] Resolve FIXME: Copy kill flag for eflags (PR #82411)   Rose Silicon via llvm-commits
• [llvm] Replace m_SpecificInt(1) with m_One() (NFC) (PR #102173)   Rose Silicon via llvm-commits
• [llvm] [CodeGen] Resolve FIXME: Find the same unit free in each cycle instead of one in each cycle (PR #82732)   Rose Silicon via llvm-commits
• [llvm] [X86] Treat returns as SpecialFP values (PR #83615)   Rose Silicon via llvm-commits
• [llvm] [Transforms] Resolve FIXME: No Lowering of FNeg to FMul unless it is safe (PR #85252)   Rose Silicon via llvm-commits
• [llvm] Use sizeWithoutDebugLargerThan when considering outlining (PR #85539)   Rose Silicon via llvm-commits
• [llvm] [SelectionDAG] Add more cases for UDIV and SDIV (PR #86452)   Rose Silicon via llvm-commits
• [llvm] [X86] Resolve FIXME: Accept live flag if no overflow occurs (PR #86836)   Rose Silicon via llvm-commits
• [llvm] [X86] Don't fold non-temporal loads if we have an instruction for them (PR #86839)   Rose Silicon via llvm-commits
• [llvm] [CodeGen] Tail Duplication: Remove irrelevant phi node workaround (PR #86981)   Rose Silicon via llvm-commits
• [llvm] [Transforms] Add X / (Y << Z) --> (X >> Z) / Y fold (PR #87122)   Rose Silicon via llvm-commits
• [llvm] [X86] Do not ignore AlwaysInline when determining if inlining is worth it (PR #87825)   Rose Silicon via llvm-commits
• [llvm] [ARM] Determine if registers are live with LiveRegUnits (PR #87888)   Rose Silicon via llvm-commits
• [llvm] [CodeGen] It is safe to ignore internal reads when sinking (PR #88003)   Rose Silicon via llvm-commits
• [llvm] [CodeGen] Have tryToSinkCopy detect regmask clobbers just like LiveRegUnits does (PR #88023)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Propagate exact flags in shift-combine transforms (PR #88340)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Fold -X / -Y -> X / Y (PR #88422)   Rose Silicon via llvm-commits
• [llvm] [CodeGenPrepare] Resolve TODO: Treat disjoint-or as an add (PR #88667)   Rose Silicon via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add more cases for UDIV, SDIV, SRA, and SRL operations (PR #89522)   Rose Silicon via llvm-commits
• [llvm] [CodeGen] Resolve FIXME: Use findPHICopyInsertPoint to find the right place to copy InlineBR blocks (PR #89556)   Rose Silicon via llvm-commits
• [llvm] [InstCombine]: Handle known negative variables with KnownBits (PR #89682)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Allow overflowing selects to work on commutative arguments (PR #90812)   Rose Silicon via llvm-commits
• [llvm] Prefer isSafeToSpeculativelyExecute to div/rem (PR #91157)   Rose Silicon via llvm-commits
• [llvm] [SelectionDAG] Use ZERO_EXTEND_VECTOR_INREG for vectors (PR #92048)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Reduce multiplicands of even numbers when a shift is involved (PR #92475)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Simplify fractions when there is no overflow (PR #92949)   Rose Silicon via llvm-commits
• [llvm] [ObjCARC] Add variations of intrinsics that do not touch reference counts (PR #94919)   Rose Silicon via llvm-commits
• [llvm] [MachO] Replace getStruct with getStructOrErr (PR #95810)   Rose Silicon via llvm-commits
• [llvm] Reapply "[ARM] Use addLiveIns method instead of manually adding live ins (#87560)" (PR #96448)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Add commuted variants for (A ^ B) & ((B ^ C) ^ A) -> (A ^ B) & C (PR #96673)   Rose Silicon via llvm-commits
• [llvm] Reapply "[AArch64][NFC] Switch to LiveRegUnits (#87313)" (PR #96840)   Rose Silicon via llvm-commits
• [llvm] [Scalar] Use commutative matchers to avoid duplication (NFC) (PR #97223)   Rose Silicon via llvm-commits
• [llvm] Add more cases for computeOverflowForSignedAdd (PR #99900)   Rose Silicon via llvm-commits
• [llvm] [MC] Remove unused section argument (NFC) (PR #99831)   Rose Silicon via llvm-commits
• [llvm] [DebugInfo] SizeInBits and AlignInBits are erroneously swapped (PR #100402)   Rose Silicon via llvm-commits
• [llvm] Prefer const auto& to copying the entire object (PR #99830)   Rose Silicon via llvm-commits
• [llvm] [IR] enable_if should be enable_if_t in profdata (PR #99334)   Rose Silicon via llvm-commits
• [llvm] Change how low masks are canonicalized (PR #97978)   Rose Silicon via llvm-commits
• [llvm] [CodeGen] Avoid creating instructions dealing with ones if ones aren't involved in the division (PR #99674)   Rose Silicon via llvm-commits
• [llvm] [X86] For inline memset and memcpy with minsize, use size for alignment, rather than actual alignment (PR #87003)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Fold mul (lshr exact (X, N)), 2^N + 1 -> add (X , lshr exact (X, N)) (PR #95042)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Fold mul (lshr exact (X, N)), 2^N + 1 -> add (X , lshr exact (X, N)) (PR #95042)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Fold mul (lshr exact (X, N)), 2^N + 1 -> add (X , lshr exact (X, N)) (PR #95042)   Rose Silicon via llvm-commits
• [llvm] [InstCombine] Fold mul (lshr exact (X, N)), 2^N + 1 -> add (X , lshr exact (X, N)) (PR #95042)   Rose Silicon via llvm-commits
• [llvm] [X86] For inline memset and memcpy with minsize, use size for alignment, rather than actual alignment (PR #87003)   Rose Silicon via llvm-commits
• [llvm] [X86] For inline memset with minsize, use stosb (PR #87003)   Rose Silicon via llvm-commits
• [llvm] [X86] For inline memset with minsize, use stosb (PR #87003)   Rose Silicon via llvm-commits
• [llvm] [X86] For inline memset with minsize, use stosb (PR #87003)   Rose Silicon via llvm-commits
• [llvm] [X86] For inline memset with minsize, use stosb (PR #87003)   Rose Silicon via llvm-commits
• [llvm] [X86] For inline memset with minsize, use stosb (PR #87003)   Rose Silicon via llvm-commits
• [llvm] [X86] For inline memset with minsize, use stosb (PR #87003)   Rose Silicon via llvm-commits
• [llvm] [X86] For inline memset with minsize, use stosb (PR #87003)   Rose Silicon via llvm-commits
• [clang] [llvm] [alpha.webkit.NoUncheckedPtrMemberChecker] Introduce member variable checker for CheckedPtr/CheckedRef (PR #108352)   Ryosuke Niwa via llvm-commits
• [clang] [llvm] [alpha.webkit.NoUncheckedPtrMemberChecker] Introduce member variable checker for CheckedPtr/CheckedRef (PR #108352)   Ryosuke Niwa via llvm-commits
• [clang] [llvm] [alpha.webkit.NoUncheckedPtrMemberChecker] Introduce member variable checker for CheckedPtr/CheckedRef (PR #108352)   Ryosuke Niwa via llvm-commits
• [clang] [llvm] [alpha.webkit.NoUncheckedPtrMemberChecker] Introduce member variable checker for CheckedPtr/CheckedRef (PR #108352)   Ryosuke Niwa via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DirectX] Implement typedBufferLoad_checkbit (PR #108087)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DirectX] Implement typedBufferLoad_checkbit (PR #108087)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [llvm] Support llvm::Any across shared libraries on windows (PR #108051)   Saleem Abdulrasool via llvm-commits
• [llvm] [llvm] Support llvm::Any across shared libraries on windows (PR #108051)   Saleem Abdulrasool via llvm-commits
• [compiler-rt] 4570984 - builtins: honour `_M_ARM64` as `__aarch64__`   Saleem Abdulrasool via llvm-commits
• [compiler-rt] 7353507 - builtins: replicate `aarch64.c` change into `aarch64.h`   Saleem Abdulrasool via llvm-commits
• [compiler-rt] [sanitizers] convert some errant CRLF line endings to LF (PR #108454)   Saleem Abdulrasool via llvm-commits
• [lld] [lld][WebAssembly] Fix used of uninitialized stack data with -wasm64 (PR #107780)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] Fix use of uninitialized stack data with --wasm64 (PR #107780)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly]: Restore non-pie dynamic-linking executable (PR #108146)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] Reject shared libraries when `-static`/`-Bstatic` is used (PR #108263)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] Reject shared libraries when `-static`/`-Bstatic` is used (PR #108263)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] -r: force -Bstatic (PR #108264)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] -r: force -Bstatic (PR #108264)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] -r: force -Bstatic (PR #108264)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly]: Restore non-pie dynamic-linking executable (PR #108146)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] Reject shared libraries when `-static`/`-Bstatic` is used (PR #108263)   Sam Clegg via llvm-commits
• [llvm] [RISCV] Don't outline pcrel_lo when the function has a section prefix (PR #107943)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Don't outline pcrel_lo when the function has a section prefix (PR #107943)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Don't outline pcrel_lo when the function has a section prefix (PR #107943)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Don't outline pcrel_lo when the function has a section prefix (PR #107943)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Don't outline pcrel_lo when the function has a section prefix (PR #107943)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Don't outline pcrel_lo when the function has a section prefix (PR #107943)   Sam Elliott via llvm-commits
• [lld] [LLD][RISCV] Error on PCREL_LO referencing other Section (PR #107558)   Sam Elliott via llvm-commits
• [lld] [LLD][RISCV] Error on PCREL_LO referencing other Section (PR #107558)   Sam Elliott via llvm-commits
• [llvm] [RISCV][docs] GP Relaxation and Small Data Limit (PR #108592)   Sam Elliott via llvm-commits
• [llvm] [RISCV][docs] GP Relaxation and Small Data Limit (PR #108592)   Sam Elliott via llvm-commits
• [llvm] [RISCV][docs] GP Relaxation and Small Data Limit (PR #108592)   Sam Elliott via llvm-commits
• [llvm] [RISCV][docs] GP Relaxation and Small Data Limit (PR #108592)   Sam Elliott via llvm-commits
• [llvm] [RISCV][docs] GP Relaxation and Small Data Limit (PR #108592)   Sam Elliott via llvm-commits
• [llvm] [RISCV][docs] GP Relaxation and Small Data Limit (PR #108592)   Sam Elliott via llvm-commits
• [llvm] [RISCV][docs] GP Relaxation and Small Data Limit (PR #108592)   Sam Elliott via llvm-commits
• [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)   Sam Tebbs via llvm-commits
• [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)   Sam Tebbs via llvm-commits
• [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)   Sam Tebbs via llvm-commits
• [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)   Sam Tebbs via llvm-commits
• [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)   Sam Tebbs via llvm-commits
• [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)   Sam Tebbs via llvm-commits
• [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)   Sam Tebbs via llvm-commits
• [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)   Sam Tebbs via llvm-commits
• [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)   Sam Tebbs via llvm-commits
• [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)   Sam Tebbs via llvm-commits
• [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)   Sam Tebbs via llvm-commits
• [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)   Sam Tebbs via llvm-commits
• [llvm] [LoopVectorizer] Add support for partial reductions (PR #92418)   Sam Tebbs via llvm-commits
• [llvm] [AArch64][NEON][SVE] Lower mixed sign/zero extended partial reductions to usdot (PR #107566)   Sam Tebbs via llvm-commits
• [llvm] [AArch64][NEON][SVE] Lower mixed sign/zero extended partial reductions to usdot (PR #107566)   Sam Tebbs via llvm-commits
• [llvm] [AArch64][NEON][SVE] Lower mixed sign/zero extended partial reductions to usdot (PR #107566)   Sam Tebbs via llvm-commits
• [llvm] [AArch64][NEON][SVE] Lower mixed sign/zero extended partial reductions to usdot (PR #107566)   Sam Tebbs via llvm-commits
• [llvm] [AArch64][NEON][SVE] Lower mixed sign/zero extended partial reductions to usdot (PR #107566)   Sam Tebbs via llvm-commits
• [llvm] [AArch64][NEON][SVE] Lower mixed sign/zero extended partial reductions to usdot (PR #107566)   Sam Tebbs via llvm-commits
• [llvm] [AArch64][NEON][SVE] Lower mixed sign/zero extended partial reductions to usdot (PR #107566)   Sam Tebbs via llvm-commits
• [llvm] [AArch64][NEON][SVE] Lower mixed sign/zero extended partial reductions to usdot (PR #107566)   Sam Tebbs via llvm-commits
• [llvm] [AArch64] Consider histcnt smaller than i32 in the cost model (PR #108521)   Sam Tebbs via llvm-commits
• [llvm] [hurd] Fix accessing f_type field of statvfs (PR #71851)   Samuel Thibault via llvm-commits
• [llvm] [hurd] Fix accessing f_type field of statvfs (PR #71851)   Samuel Thibault via llvm-commits
• [clang] [llvm] [HLSL] Implement elementwise popcount (PR #108121)   Sarah Spall via llvm-commits
• [clang] [llvm] [HLSL] Implement elementwise popcount (PR #108121)   Sarah Spall via llvm-commits
• [clang] [llvm] [HLSL] Implement elementwise popcount (PR #108121)   Sarah Spall via llvm-commits
• [clang] [llvm] [HLSL] Implement elementwise popcount (PR #108121)   Sarah Spall via llvm-commits
• [clang] [llvm] [HLSL] Implement elementwise popcount (PR #108121)   Sarah Spall via llvm-commits
• [llvm] It is really the byte order of the target that matters (PR #107915)   Sean Perry via llvm-commits
• [llvm] It is really the byte order of the target that matters (PR #107915)   Sean Perry via llvm-commits
• [llvm] It is really the byte order of the target that matters (PR #107915)   Sean Perry via llvm-commits
• [llvm] It is really the byte order of the target that matters (PR #107915)   Sean Perry via llvm-commits
• [llvm] It is really the byte order of the target that matters (PR #107915)   Sean Perry via llvm-commits
• [llvm] It is really the byte order of the target that matters (PR #107915)   Sean Perry via llvm-commits
• [llvm] It is really the byte order of the target that matters (PR #107915)   Sean Perry via llvm-commits
• [llvm] Add target-byteorder for cases where endian in target triple is what matters (PR #107915)   Sean Perry via llvm-commits
• [compiler-rt] Found one more delta to unbreak build for z/os (PR #82789)   Sean Perry via llvm-commits
• [llvm] Add target-byteorder for cases where endian in target triple is what matters (PR #107915)   Sean Perry via llvm-commits
• [llvm] Add target-byteorder for cases where endian in target triple is what matters (PR #107915)   Sean Perry via llvm-commits
• [llvm] Add target-byteorder for cases where endian in target triple is what matters (PR #107915)   Sean Perry via llvm-commits
• [clang] [compiler-rt] [XRay] Add support for instrumentation of DSOs on x86_64 (PR #90959)   Sebastian Kreutzer via llvm-commits
• [clang] [compiler-rt] [XRay] Add support for instrumentation of DSOs on x86_64 (PR #90959)   Sebastian Kreutzer via llvm-commits
• [clang] [compiler-rt] [XRay] Add support for instrumentation of DSOs on x86_64 (PR #90959)   Sebastian Kreutzer via llvm-commits
• [clang] [compiler-rt] [XRay] Add support for instrumentation of DSOs on x86_64 (PR #90959)   Sebastian Kreutzer via llvm-commits
• [clang] [compiler-rt] [XRay] Add support for instrumentation of DSOs on x86_64 (PR #90959)   Sebastian Kreutzer via llvm-commits
• [llvm] [NFC] Update function names in MCTargetAsmParser.h (PR #108643)   Sergei Barannikov via llvm-commits
• [llvm] [NFC] Update function names in MCTargetAsmParser.h (PR #108643)   Sergei Barannikov via llvm-commits
• [llvm] [NFC] Update function names in MCTargetAsmParser.h (PR #108643)   Sergei Barannikov via llvm-commits
• [llvm] [WIP][SPARC] Allow overaligned `alloca`s (PR #107223)   Sergei Barannikov via llvm-commits
• [llvm] [LSR] Do not create duplicated PHI nodes while preserving LCSSA form (PR #107380)   Sergey Kachkov via llvm-commits
• [llvm] 17f0c5d - [LSR][NFC] Add pre-commit test   Sergey Kachkov via llvm-commits
• [llvm] 1f2a634 - Reland "[LSR] Do not create duplicated PHI nodes while preserving LCSSA form" (#107380)   Sergey Kachkov via llvm-commits
• [llvm] [mlir] [MLIR] Add f6E3M2FN type (PR #105573)   Sergey Kozub via llvm-commits
• [llvm] [mlir] [MLIR] Add f6E3M2FN type (PR #105573)   Sergey Kozub via llvm-commits
• [llvm] [mlir] [MLIR] Add f6E3M2FN type (PR #105573)   Sergey Kozub via llvm-commits
• [flang] [llvm] [Frontend][OpenMP] Follow compound construct clause restrictions (PR #107853)   Sergio Afonso via llvm-commits
• [flang] [llvm] [Frontend][OpenMP] Follow compound construct clause restrictions (PR #107853)   Sergio Afonso via llvm-commits
• [flang] [llvm] [Frontend][OpenMP] Follow compound construct clause restrictions (PR #107853)   Sergio Afonso via llvm-commits
• [flang] [llvm] [Flang][OpenMP][Sema] Adding parsing and semantic support for scan directive. (PR #102792)   Sergio Afonso via llvm-commits
• [flang] [llvm] [Flang][OpenMP][Sema] Adding parsing and semantic support for scan directive. (PR #102792)   Sergio Afonso via llvm-commits
• [flang] [llvm] [Flang][OpenMP][Sema] Adding parsing and semantic support for scan directive. (PR #102792)   Sergio Afonso via llvm-commits
• [flang] [llvm] [Flang][OpenMP][Sema] Adding parsing and semantic support for scan directive. (PR #102792)   Sergio Afonso via llvm-commits
• [flang] [llvm] [Flang][OpenMP][Sema] Adding parsing and semantic support for scan directive. (PR #102792)   Sergio Afonso via llvm-commits
• [flang] [llvm] [Flang][OpenMP][Sema] Adding parsing and semantic support for scan directive. (PR #102792)   Sergio Afonso via llvm-commits
• [flang] [llvm] [Flang][OpenMP][Sema] Adding parsing and semantic support for scan directive. (PR #102792)   Sergio Afonso via llvm-commits
• [flang] [llvm] [Flang][OpenMP][Sema] Adding parsing and semantic support for scan directive. (PR #102792)   Sergio Afonso via llvm-commits
• [flang] [llvm] [Flang][OpenMP][Sema] Adding parsing and semantic support for scan directive. (PR #102792)   Sergio Afonso via llvm-commits
• [flang] [llvm] [Flang][OpenMP][Sema] Adding parsing and semantic support for scan directive. (PR #102792)   Sergio Afonso via llvm-commits
• [flang] [llvm] [Flang][OpenMP][Sema] Adding parsing and semantic support for scan directive. (PR #102792)   Sergio Afonso via llvm-commits
• [flang] [llvm] [Flang][OpenMP][Sema] Adding parsing and semantic support for scan directive. (PR #102792)   Sergio Afonso via llvm-commits
• [flang] [llvm] [Flang][OpenMP][Sema] Adding parsing and semantic support for scan directive. (PR #102792)   Sergio Afonso via llvm-commits
• [flang] [llvm] [Frontend][OpenMP] Follow compound construct clause restrictions (PR #107853)   Sergio Afonso via llvm-commits
• [llvm] [X86] Add missing immediate qualifier to the (V)INSERT/EXTRACT/PERM2 instruction names (PR #108593)   Shengchen Kan via llvm-commits
• [llvm] [X86] Use MCRegister in more places. NFC (PR #108682)   Shengchen Kan via llvm-commits
• [llvm] [RISCV][TTI] Implement cost for vp min/max intrinsics (PR #107567)   Shih-Po Hung via llvm-commits
• [llvm] [AMDGPU] Use std::optional in InstCombine of amdgcn_fmed3. NFC. (PR #108223)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Use std::optional in InstCombine of amdgcn_fmed3. NFC. (PR #108223)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Use std::optional in InstCombine of amdgcn_fmed3. NFC. (PR #108223)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Use std::optional in InstCombine of amdgcn_fmed3. NFC. (PR #108223)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Use std::optional in InstCombine of amdgcn_fmed3. NFC. (PR #108223)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Use std::optional in InstCombine of amdgcn_fmed3. NFC. (PR #108223)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Simplify API of matchFPExtFromF16. NFC. (PR #108223)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Take the address space from addrspacecast directly (PR #108258)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Take the address space from addrspacecast directly (PR #108258)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Avoid unneeded waitcounts before spill stores (PR #108303)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Take the address space from addrspacecast directly (PR #108258)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Take the address space from addrspacecast directly (PR #108258)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Take the address space from addrspacecast directly (PR #108258)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Take the address space from addrspacecast directly (PR #108258)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Take the address space from addrspacecast directly (PR #108258)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Take the address space from addrspacecast directly (PR #108258)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU][Attributor] Only iterate over filtered functions when creating AAs (PR #108417)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU][Attributor] Only iterate over filtered functions when creating AAs (PR #108417)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU][Attributor] Only iterate over filtered functions when creating AAs (PR #108417)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU][Attributor] Only iterate over filtered functions when creating AAs (PR #108417)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][Attributor] Add an option to turn on internalization (PR #108420)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][Attributor] Add an option to turn on internalization (PR #108420)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU][Attributor] Only iterate over filtered functions when creating AAs (PR #108417)   Shilei Tian via llvm-commits
• [llvm] [NFC][Attributor] Use unsigned integer for address space tracking (PR #108447)   Shilei Tian via llvm-commits
• [llvm] [NFC][Attributor] Use unsigned integer for address space tracking (PR #108447)   Shilei Tian via llvm-commits
• [llvm] [NFC][Attributor] Use unsigned integer for address space tracking (PR #108447)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Take the address space from addrspacecast directly (PR #108258)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Take the address space from addrspacecast directly (PR #108258)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Take the address space from addrspacecast directly (PR #108258)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][Attributor] Add an option to turn on internalization (PR #108420)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][Attributor] Add an option to turn on internalization (PR #108420)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][Attributor] Add an option to turn on internalization (PR #108420)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][Attributor] Add an option to turn on internalization (PR #108420)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][Attributor] Don't run `AAAddressSpace` for graphics functions (PR #108560)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][Attributor] Don't run `AAAddressSpace` for graphics functions (PR #108560)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][Attributor] Don't run `AAAddressSpace` for graphics functions (PR #108560)   Shilei Tian via llvm-commits
• [llvm] [TargetMachine] Add `getFlatAddressSpace` to `TargetMachine` (PR #108594)   Shilei Tian via llvm-commits
• [llvm] [TargetMachine] Add `getFlatAddressSpace` to `TargetMachine` (PR #108594)   Shilei Tian via llvm-commits
• [llvm] [TargetMachine] Add `getFlatAddressSpace` to `TargetMachine` (PR #108594)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][Attributor] Don't run `AAAddressSpace` for graphics functions (PR #108560)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Take the address space from addrspacecast directly (PR #108258)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Take the address space from addrspacecast directly (PR #108258)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Take the address space from addrspacecast directly (PR #108258)   Shilei Tian via llvm-commits
• [llvm] [OpenMP] Fix redefining `stdint.h` types (PR #108607)   Shilei Tian via llvm-commits
• [llvm] [OpenMP] Fix redefining `stdint.h` types (PR #108607)   Shilei Tian via llvm-commits
• [llvm] [OpenMP] Fix redefining `stdint.h` types (PR #108607)   Shilei Tian via llvm-commits
• [llvm] [OpenMP] Fix redefining `stdint.h` types (PR #108607)   Shilei Tian via llvm-commits
• [llvm] [TargetMachine] Add `getFlatAddressSpace` to `TargetMachine` (PR #108594)   Shilei Tian via llvm-commits
• [llvm] [TargetMachine] Add `getFlatAddressSpace` to `TargetMachine` (PR #108594)   Shilei Tian via llvm-commits
• [llvm] [TargetMachine] Add `getFlatAddressSpace` to `TargetMachine` (PR #108594)   Shilei Tian via llvm-commits
• [llvm] [TargetMachine] Add `getFlatAddressSpace` to `TargetMachine` (PR #108594)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Use more appropriate approach to check flat address space (PR #108713)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Use more appropriate approach to check flat address space (PR #108713)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Use more appropriate approach to check flat address space (PR #108713)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Use more appropriate approach to check flat address space (PR #108713)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Use more appropriate approach to check flat address space (PR #108713)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][Attributor] Don't run `AAAddressSpace` for graphics functions (PR #108560)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][Attributor] Don't run `AAAddressSpace` for graphics functions (PR #108560)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Use more appropriate approach to check flat address space (PR #108713)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Take the address space from addrspacecast directly (PR #108258)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Use more appropriate approach to check flat address space (PR #108713)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Use more appropriate approach to check flat address space (PR #108713)   Shilei Tian via llvm-commits
• [clang] [lld] [llvm] [mlir] [IR] Introduce `T<address space>` to `DataLayout` to represent flat address space if a target supports it (PR #108786)   Shilei Tian via llvm-commits
• [clang] [lld] [llvm] [mlir] [IR] Introduce `T<address space>` to `DataLayout` to represent flat address space if a target supports it (PR #108786)   Shilei Tian via llvm-commits
• [clang] [lld] [llvm] [mlir] [IR] Introduce `T<address space>` to `DataLayout` to represent flat address space if a target supports it (PR #108786)   Shilei Tian via llvm-commits
• [clang] [lld] [llvm] [mlir] [IR] Introduce `T<address space>` to `DataLayout` to represent flat address space if a target supports it (PR #108786)   Shilei Tian via llvm-commits
• [clang] [lld] [llvm] [mlir] [IR] Introduce `T<address space>` to `DataLayout` to represent flat address space if a target supports it (PR #108786)   Shilei Tian via llvm-commits
• [clang] [lld] [llvm] [mlir] [IR] Introduce `T<address space>` to `DataLayout` to represent flat address space if a target supports it (PR #108786)   Shilei Tian via llvm-commits
• [llvm] [TargetMachine] Add `getFlatAddressSpace` to `TargetMachine` (PR #108594)   Shilei Tian via llvm-commits
• [llvm] [TargetMachine] Add `getFlatAddressSpace` to `TargetMachine` (PR #108594)   Shilei Tian via llvm-commits
• [clang] [lld] [llvm] [mlir] [IR] Introduce `T<address space>` to `DataLayout` to represent flat address space if a target supports it (PR #108786)   Shilei Tian via llvm-commits
• [clang] [lld] [llvm] [mlir] [Attributor] Use more appropriate approach to check flat address space (PR #108713)   Shilei Tian via llvm-commits
• [clang] [lld] [llvm] [mlir] [IR] Introduce `T<address space>` to `DataLayout` to represent flat address space if a target supports it (PR #108786)   Shilei Tian via llvm-commits
• [clang] [lld] [llvm] [mlir] [IR] Introduce `T<address space>` to `DataLayout` to represent flat address space if a target supports it (PR #108786)   Shilei Tian via llvm-commits
• [llvm] [CMake] Passthrough variables for packages to subbuilds (PR #107611)   Shoaib Meenai via llvm-commits
• [compiler-rt] [Fuzzer] Passthrough zlib CMake paths into the test (PR #107926)   Shoaib Meenai via llvm-commits
• [llvm] Add DIExpression::foldConstantMath to CoroSplit (PR #107933)   Shubham Sandeep Rastogi via llvm-commits
• [llvm] Add DIExpression::foldConstantMath to CoroSplit (PR #107933)   Shubham Sandeep Rastogi via llvm-commits
• [llvm] Add a pass to collect dropped variable statistics (PR #102233)   Shubham Sandeep Rastogi via llvm-commits
• [llvm] Add a pass to collect dropped variable statistics (PR #102233)   Shubham Sandeep Rastogi via llvm-commits
• [llvm] Add DIExpression::foldConstantMath to CoroSplit (PR #107933)   Shubham Sandeep Rastogi via llvm-commits
• [llvm] Add DIExpression::foldConstantMath to CoroSplit (PR #107933)   Shubham Sandeep Rastogi via llvm-commits
• [llvm] [llvm-exegesis] Use MCRegister instead of unsigned to hold registers (PR #107820)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Fixing the non-optimal code with the following: `select i1 %0, float 1.0, float 0.0`. (PR #107732)   Simon Pilgrim via llvm-commits
• [llvm] b98aa6f - [X86] LowerABD - lower i8/i16 cases directly to CMOV(SUB(X,Y),SUB(Y,X)) pattern   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Add type shrinking and zext propagation for fixed-width vector types (PR #104606)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Add foldShuffleOfIntrinsics. (PR #106502)   Simon Pilgrim via llvm-commits
• [llvm] [SLP] Better way to filter target-specific tests (PR #106720)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Handle shifts + and in `LowerSELECTWithCmpZero` (PR #107910)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Handle shifts + and in `LowerSELECTWithCmpZero` (PR #107910)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Handle shifts + and in `LowerSELECTWithCmpZero` (PR #107910)   Simon Pilgrim via llvm-commits
• [llvm] 7e07c1d - [DAG] expandAVG - consistently use getShiftAmountConstant for constant shift amounts. NFC   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Fold trunc(srl(extract_elt(vec,c1),c2)) -> extract_elt(bitcast(vec),c3) (PR #107987)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Fold trunc(srl(extract_elt(vec,c1),c2)) -> extract_elt(bitcast(vec),c3) (PR #107987)   Simon Pilgrim via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Add foldShuffleOfIntrinsics. (PR #106502)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Add foldShuffleOfIntrinsics. (PR #106502)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Add foldShuffleOfIntrinsics. (PR #106502)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Add foldShuffleOfIntrinsics. (PR #106502)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Vectorize gathered loads (PR #107461)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Vectorize gathered loads (PR #107461)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Vectorize gathered loads (PR #107461)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Vectorize gathered loads (PR #107461)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Add foldShuffleOfIntrinsics. (PR #106502)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Vectorize gathered loads (PR #107461)   Simon Pilgrim via llvm-commits
• [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)   Simon Pilgrim via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Fold trunc(srl(extract_elt(vec,c1),c2)) -> extract_elt(bitcast(vec),c3) (PR #107987)   Simon Pilgrim via llvm-commits
• [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)   Simon Pilgrim via llvm-commits
• [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)   Simon Pilgrim via llvm-commits
• [llvm] 7041163 - [AMDGPU] Regenerate buffer intrinsic tests with update_llc_test_checks. NFC.   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Fold trunc(srl(extract_elt(vec,c1),c2)) -> extract_elt(bitcast(vec),c3) (PR #107987)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Fold trunc(srl(extract_elt(vec,c1),c2)) -> extract_elt(bitcast(vec),c3) (PR #107987)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Fold trunc(srl(extract_elt(vec,c1),c2)) -> extract_elt(bitcast(vec),c3) (PR #107987)   Simon Pilgrim via llvm-commits
• [llvm] 1b0400e - [X86] combineSubABS - handle NEG(ABD()) expanded patterns   Simon Pilgrim via llvm-commits
• [llvm] 43da8a7 - [DAG] Add test coverage for ABD "sub of selects" patterns based off #53045   Simon Pilgrim via llvm-commits
• [clang] [llvm] [HLSL] Implement elementwise popcount (PR #108121)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [HLSL] Implement elementwise popcount (PR #108121)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Fix trunc generated between PHINodes (PR #108228)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Recognize VPXORDZrr as a zero-idiom on Znver4 (PR #108314)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [HLSL] Implement elementwise popcount (PR #108121)   Simon Pilgrim via llvm-commits
• [llvm] X86: Fix asserting on bfloat argument/return without sse2 (PR #93146)   Simon Pilgrim via llvm-commits
• [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Speed up X86 Domain Reassignment pass by early return (PR #108108)   Simon Pilgrim via llvm-commits
• [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)   Simon Pilgrim via llvm-commits
• [llvm] [MCA][ResourceManager] Fix a bug in the instruction issue logic. (PR #108386)   Simon Pilgrim via llvm-commits
• [llvm] [MCA][ResourceManager] Fix a bug in the instruction issue logic. (PR #108386)   Simon Pilgrim via llvm-commits
• [llvm] [x86] Add lowering for `@llvm.experimental.vector.compress` (PR #104904)   Simon Pilgrim via llvm-commits
• [llvm] [SDAG] Avoid creating redundant stack slots when lowering FSINCOS (PR #108401)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Use MCRegister in X86AsmParser. (PR #108509)   Simon Pilgrim via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)   Simon Pilgrim via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)   Simon Pilgrim via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)   Simon Pilgrim via llvm-commits
• [llvm] [MCA][ResourceManager] Fix a bug in the instruction issue logic. (PR #108386)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Vectorize gathered loads (PR #107461)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Vectorize gathered loads (PR #107461)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Vectorize gathered loads (PR #107461)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Fold trunc(srl(extract_elt(vec,c1),c2)) -> extract_elt(bitcast(vec),c3) (PR #107987)   Simon Pilgrim via llvm-commits
• [llvm] 4a9b6b0 - [X86] Cleanup lowerShuffleToEXPAND arg layout. NFC.   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add missing immediate qualifier to the (V)INSERTPS instruction names (PR #108568)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Do not build illegal nodes with users (PR #108573)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add missing immediate qualifier to the (V)INSERT/EXTRACT/PERM2 instruction names (PR #108593)   Simon Pilgrim via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add missing immediate qualifier to the (V)INSERTPS instruction names (PR #108568)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Do not build illegal nodes with users (PR #108573)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add missing immediate qualifier to the (V)INSERT/EXTRACT/PERM2 instruction names (PR #108593)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Don't shrink lshr if the shamt is not less than bitwidth (PR #108705)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add missing immediate qualifier to the (V)INSERTPS instruction names (PR #108568)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Complete AMD znver4 AVX512 zeroing idioms (PR #108740)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add missing immediate qualifier to the (V)INSERT/EXTRACT/PERM2 instruction names (PR #108593)   Simon Pilgrim via llvm-commits
• [llvm] 5910e8d - [DAG] visitUDIV - call SimplifyDemandedBits to handle hidden constant foldable cases   Simon Pilgrim via llvm-commits
• [llvm] 7048857 - [X86] Add missing immediate qualifier to the (V)EXTRACTPS instruction names   Simon Pilgrim via llvm-commits
• [llvm] 1e33bd2 - [X86] Add missing immediate qualifier to the (V)PINSR/PEXTR instruction names   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fix missing check of rotate <-> shift equivilence (Issue 108722) (PR #108767)   Simon Pilgrim via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fix missing check of rotate <-> shift equivilence (Issue 108722) (PR #108767)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Consistently use 'k' for predicate mask registers in instruction names (PR #108780)   Simon Pilgrim via llvm-commits
• [lld] [lld][AArch64] Fix getImplicitAddend in big-endian mode. (PR #107845)   Simon Tatham via llvm-commits
• [lld] [lld][AArch64] Fix getImplicitAddend in big-endian mode. (PR #107845)   Simon Tatham via llvm-commits
• [lld] [lld][AArch64] Fix getImplicitAddend in big-endian mode. (PR #107845)   Simon Tatham via llvm-commits
• [llvm] [test-suite] Document the LLVM test-suite benchmark apps (PR #105843)   Sjoerd Meijer via llvm-commits
• [llvm] [AArch64] Lower __builtin_bswap16 to rev16 if bswap followed by any_extend (PR #105375)   Sjoerd Meijer via llvm-commits
• [llvm] [AArch64] Lower __builtin_bswap16 to rev16 if bswap followed by any_extend (PR #105375)   Sjoerd Meijer via llvm-commits
• [llvm] [LV] Vectorize Epilogues for loops with small VF but high IC (PR #108190)   Sjoerd Meijer via llvm-commits
• [llvm] LCA: migrate from DA to LAA; fix cost computation (PR #107691)   Sjoerd Meijer via llvm-commits
• [llvm] LCA: migrate from DA to LAA; fix cost computation (PR #107691)   Sjoerd Meijer via llvm-commits
• [llvm] [MemProf] Remove unnecessary data structure (NFC) (PR #107643)   Snehasish Kumar via llvm-commits
• [llvm] [MemProf] Streamline and avoid unnecessary context id duplication (PR #107918)   Snehasish Kumar via llvm-commits
• [llvm] [MemProf] Convert CallContextInfo to a struct (NFC) (PR #108086)   Snehasish Kumar via llvm-commits
• [llvm] [MemProf] Convert CallContextInfo to a struct (NFC) (PR #108086)   Snehasish Kumar via llvm-commits
• [llvm] [MemProf] Convert CallContextInfo to a struct (NFC) (PR #108086)   Snehasish Kumar via llvm-commits
• [llvm] [MemProf] Refactor context node creation into a new helper (NFC) (PR #108408)   Snehasish Kumar via llvm-commits
• [llvm] Revert "[MemProf] Streamline and avoid unnecessary context id duplication (#107918)" (PR #108652)   Snehasish Kumar via llvm-commits
• [llvm] [SandboxIR] Implement UndefValue (PR #107628)   Sriraman Tallam via llvm-commits
• [llvm] [SandboxIR] Implement UndefValue (PR #107628)   Sriraman Tallam via llvm-commits
• [llvm] [SandboxIR] Implement UndefValue (PR #107628)   Sriraman Tallam via llvm-commits
• [llvm] [SandboxIR] Implement BlockAddress (PR #107940)   Sriraman Tallam via llvm-commits
• [llvm] [SandboxIR] Implement BlockAddress (PR #107940)   Sriraman Tallam via llvm-commits
• [llvm] [SandboxIR] Implement BlockAddress (PR #107940)   Sriraman Tallam via llvm-commits
• [llvm] [SandboxIR] Implement ConstantTokenNone (PR #108106)   Sriraman Tallam via llvm-commits
• [llvm] [SandboxIR] Implement ConstantTokenNone (PR #108106)   Sriraman Tallam via llvm-commits
• [llvm] [SandboxIR] Implement GlobalValue (PR #108317)   Sriraman Tallam via llvm-commits
• [llvm] [SandboxIR] Implement DSOLocalEquivalent (PR #108473)   Sriraman Tallam via llvm-commits
• [llvm] [SandboxVec] User-defined pass pipeline (PR #108625)   Sriraman Tallam via llvm-commits
• [llvm] [AMDGPU] Error on non-global pointer with s_prefetch_data (PR #107624)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Error on non-global pointer with s_prefetch_data (PR #107624)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Avoid unneded waitcounts before spill stores (PR #108303)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Avoid unneeded waitcounts before spill stores (PR #108303)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Avoid unneeded waitcounts before spill stores (PR #108303)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Avoid unneeded waitcounts before spill stores (PR #108303)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Avoid unneeded waitcounts before spill stores (PR #108303)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Avoid unneeded waitcounts before spill stores (PR #108303)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Avoid unneeded waitcounts before spill stores (PR #108303)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Avoid unneeded waitcounts before spill stores (PR #108303)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Avoid unneeded waitcounts before spill stores (PR #108303)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Avoid unneeded waitcounts before spill stores (PR #108303)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Avoid unneeded waitcounts before spill stores (PR #108303)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Avoid unneeded waitcounts before spill stores (PR #108303)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Avoid unneeded waitcounts before spill stores (PR #108303)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Error on non-global pointer with s_prefetch_data (PR #107624)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Avoid unneeded waitcounts before spill stores (PR #108303)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Avoid unneeded waitcounts before spill stores (PR #108303)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Avoid unneeded waitcounts before spill stores (PR #108303)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)   Stefan Gränitz via llvm-commits
• [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)   Stefan Gränitz via llvm-commits
• [llvm] [LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (PR #107802)   Stefan Gränitz via llvm-commits
• [llvm] [llvm-c-test] Fix the usage message (PR #105702)   Stefan Gränitz via llvm-commits
• [clang] [llvm] [DLCov 3/5] Implement DebugLoc origin-tracking (PR #107369)   Stephen Tozer via llvm-commits
• [llvm] [DLCov 1/5] Add CMake option to enable enhanced line number coverage tracking (PR #107278)   Stephen Tozer via llvm-commits
• [clang] [llvm] [DLCov 4/5] Track coverage and origins through IRBuilder (PR #108214)   Stephen Tozer via llvm-commits
• [clang] [llvm] [DLCov 3/5] Implement DebugLoc origin-tracking (PR #107369)   Stephen Tozer via llvm-commits
• [llvm] [Dexter] Adapt to upcoming lldb stepping behavior (PR #108127)   Stephen Tozer via llvm-commits
• [llvm] [DebugInfo] Don't apply is_stmt on MBB branches that preserve lines (PR #108251)   Stephen Tozer via llvm-commits
• [llvm] [DebugInfo] Don't apply is_stmt on MBB branches that preserve lines (PR #108251)   Stephen Tozer via llvm-commits
• [llvm] [DebugInfo] Transfer strcmp DILocation to generated inline code (PR #108531)   Stephen Tozer via llvm-commits
• [llvm] [DebugInfo] Transfer strcmp DILocation to generated inline code (PR #108531)   Stephen Tozer via llvm-commits
• [llvm] [llvm-reduce] Fix incorrectly ignored null MD in ReduceDIMetadata (PR #108541)   Stephen Tozer via llvm-commits
• [llvm] [DebugInfo][InstCombine] Do not overwrite prior DILocation for new Insts (PR #108565)   Stephen Tozer via llvm-commits
• [llvm] [DebugInfo][InstCombine] Do not overwrite prior DILocation for new Insts (PR #108565)   Stephen Tozer via llvm-commits
• [llvm] [DebugInfo] Enable deprecation of iterator-insertion methods (PR #102608)   Stephen Tozer via llvm-commits
• [llvm] [DebugInfo][InstCombine] Do not overwrite prior DILocation for new Insts (PR #108565)   Stephen Tozer via llvm-commits
• [llvm] [DebugInfo][DWARF] Set is_stmt on first non-line-0 instruction in BB (PR #105524)   Stephen Tozer via llvm-commits
• [llvm] [LTO] Fix a use-after-free in legacy LTO C APIs (PR #107896)   Steven Wu via llvm-commits
• [llvm] [LTO] Fix a use-after-free in legacy LTO C APIs (PR #107896)   Steven Wu via llvm-commits
• [llvm] [LTO] Fix a use-after-free in legacy LTO C APIs (PR #107896)   Steven Wu via llvm-commits
• [llvm] [AArch64][SLP] Add NFC test cases for floating point reductions (PR #106507)   Sushant Gokhale via llvm-commits
• [llvm] [AArch64][SLP] Add NFC test cases for floating point reductions (PR #106507)   Sushant Gokhale via llvm-commits
• [llvm] [AArch64][SLP] Add NFC test cases for floating point reductions (PR #106507)   Sushant Gokhale via llvm-commits
• [llvm] [AArch64][SLP] Add NFC test cases for floating point reductions (PR #106507)   Sushant Gokhale via llvm-commits
• [llvm] [InstCombine] Transform high latency, dependent FSQRT/FDIV into FMUL (PR #87474)   Sushant Gokhale via llvm-commits
• [llvm] [AArch64][SLP] Add NFC test cases for floating point reductions (PR #106507)   Sushant Gokhale via llvm-commits
• [llvm] [AArch64][SLP] Add NFC test cases for floating point reductions (PR #106507)   Sushant Gokhale via llvm-commits
• [llvm] [AArch64][SLP] Add NFC test cases for floating point reductions (PR #106507)   Sushant Gokhale via llvm-commits
• [llvm] [AArch64][SLP] Add NFC test cases for floating point reductions (PR #106507)   Sushant Gokhale via llvm-commits
• [llvm] [AArch64][SLP] Add NFC test cases for floating point reductions (PR #106507)   Sushant Gokhale via llvm-commits
• [llvm] [SLP][AArch64] Fix test failure for PR #106507 (PR #108442)   Sushant Gokhale via llvm-commits
• [llvm] [SLP][AArch64] Fix test failure for PR #106507 (PR #108442)   Sushant Gokhale via llvm-commits
• [llvm] [SLP][AArch64] Fix test failure for PR #106507 (PR #108442)   Sushant Gokhale via llvm-commits
• [llvm] [AArch64][CostModel] Reduce the cost of fadd reduction with fast flag (PR #108791)   Sushant Gokhale via llvm-commits
• [llvm] [AArch64][CostModel] Reduce the cost of fadd reduction with fast flag (PR #108791)   Sushant Gokhale via llvm-commits
• [llvm] [AArch64][CostModel] Reduce the cost of fadd reduction with fast flag (PR #108791)   Sushant Gokhale via llvm-commits
• [llvm] [AArch64][CostModel] Reduce the cost of fadd reduction with fast flag (PR #108791)   Sushant Gokhale via llvm-commits
• [llvm] [AArch64][CostModel] Reduce the cost of fadd reduction with fast flag (PR #108791)   Sushant Gokhale via llvm-commits
• [llvm] bda9474 - Add missing newlines at EOF; NFC   Sven van Haastregt via llvm-commits
• [lld] [llvm] Re-apply "[NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF" (PR #107792)   Teresa Johnson via llvm-commits
• [lld] [llvm] Re-apply "[NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF" (PR #107792)   Teresa Johnson via llvm-commits
• [lld] [llvm] Re-apply "[NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF" (PR #107792)   Teresa Johnson via llvm-commits
• [lld] [llvm] Re-apply "[NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF" (PR #107792)   Teresa Johnson via llvm-commits
• [llvm] [MemProf] Remove unnecessary data structure (NFC) (PR #107643)   Teresa Johnson via llvm-commits
• [llvm] [MemProf] Remove unnecessary data structure (NFC) (PR #107643)   Teresa Johnson via llvm-commits
• [llvm] [LTO] Simplify calculateCallGraphRoot (NFC) (PR #107765)   Teresa Johnson via llvm-commits
• [llvm] [MemProf] Streamline and avoid unnecessary context id duplication (PR #107918)   Teresa Johnson via llvm-commits
• [llvm] [MemProf] Streamline and avoid unnecessary context id duplication (PR #107918)   Teresa Johnson via llvm-commits
• [llvm] [MemProf] Streamline and avoid unnecessary context id duplication (PR #107918)   Teresa Johnson via llvm-commits
• [llvm] [MemProf] Convert CallContextInfo to a struct (NFC) (PR #108086)   Teresa Johnson via llvm-commits
• [llvm] [MemProf] Convert CallContextInfo to a struct (NFC) (PR #108086)   Teresa Johnson via llvm-commits
• [llvm] [MemProf] Convert CallContextInfo to a struct (NFC) (PR #108086)   Teresa Johnson via llvm-commits
• [llvm] [MemProf] Convert CallContextInfo to a struct (NFC) (PR #108086)   Teresa Johnson via llvm-commits
• [llvm] [ctx_prof] Relax the "profile use" case around `PGOOpt` (PR #108265)   Teresa Johnson via llvm-commits
• [llvm] [MemProf] Refactor context node creation into a new helper (NFC) (PR #108408)   Teresa Johnson via llvm-commits
• [llvm] [ctx_prof] Factor the callsite instrumentation exclusion criteria (PR #108471)   Teresa Johnson via llvm-commits
• [llvm] [ctx_prof] Factor the callsite instrumentation exclusion criteria (PR #108471)   Teresa Johnson via llvm-commits
• [llvm] [ctx_prof] Factor the callsite instrumentation exclusion criteria (PR #108471)   Teresa Johnson via llvm-commits
• [llvm] Revert "[MemProf] Streamline and avoid unnecessary context id duplication (#107918)" (PR #108652)   Teresa Johnson via llvm-commits
• [llvm] Revert "[MemProf] Streamline and avoid unnecessary context id duplication (#107918)" (PR #108652)   Teresa Johnson via llvm-commits
• [llvm] [nfc][ctx_prof] Factor the callsite instrumentation exclusion criteria (PR #108471)   Teresa Johnson via llvm-commits
• [llvm] [nfc][ctx_prof] Factor the callsite instrumentation exclusion criteria (PR #108471)   Teresa Johnson via llvm-commits
• [llvm] Revert "[MemProf] Streamline and avoid unnecessary context id duplication (#107918)" (PR #108652)   Teresa Johnson via llvm-commits
• [clang] [llvm] [clang][hlsl] Add atan2 intrinsic part 1 (PR #107923)   Tex Riddell via llvm-commits
• [clang] [llvm] [clang][hlsl] Add atan2 intrinsic part 1 (PR #107923)   Tex Riddell via llvm-commits
• [clang] [llvm] [clang][hlsl] Add atan2 intrinsic part 1 (PR #107923)   Tex Riddell via llvm-commits
• [clang] [llvm] [clang][hlsl] Add atan2 intrinsic part 1 (PR #107923)   Tex Riddell via llvm-commits
• [clang] [llvm] [clang][hlsl] Add atan2 intrinsic part 1 (PR #107923)   Tex Riddell via llvm-commits
• [llvm] [TableGen] Update TableGen to add explicit symbol visibility macros to function declarations it creates (PR #107873)   Thomas Fransham via llvm-commits
• [llvm] [TableGen] Add explicit symbol visibility macros to code generated (PR #107873)   Thomas Fransham via llvm-commits
• [llvm] [TableGen] Add explicit symbol visibility macros to code generated (PR #107873)   Thomas Fransham via llvm-commits
• [llvm] [TableGen] Add explicit symbol visibility macros to code generated (PR #107873)   Thomas Fransham via llvm-commits
• [llvm] [llvm] Support llvm::Any across shared libraries on windows (PR #108051)   Thomas Fransham via llvm-commits
• [llvm] [llvm] Support llvm::Any across shared libraries on windows (PR #108051)   Thomas Fransham via llvm-commits
• [llvm] [llvm] Support llvm::Any across shared libraries on windows (PR #108051)   Thomas Fransham via llvm-commits
• [llvm] [TableGen] Add explicit symbol visibility macros to code generated (PR #107873)   Thomas Fransham via llvm-commits
• [llvm] [GlobalIsel] update inline-memset.mir test (PR #107874)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Combine trunc of binop (PR #107721)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel][NFC] update inline-memset.mir test (PR #107874)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel][NFC] update inline-memset.mir test (PR #107874)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel][NFC] update inline-memset.mir test (PR #107874)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Combine trunc of binop (PR #107721)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Update MIR gallery (PR #107903)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Update MIR gallery (PR #107903)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Update MIR gallery (PR #107903)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel][NFC] update inline-memset.mir test (PR #108006)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Visit ICmp (PR #105991)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel][NFC] update inline-memset.mir test (PR #108006)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Visit ICmp (PR #105991)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Visit ICmp (PR #105991)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Visit ICmp (PR #105991)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Visit ICmp (PR #105991)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Visit ICmp (PR #105991)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Visit ICmp (PR #105991)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Visit ICmp (PR #105991)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Visit ICmp (PR #105991)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Visit ICmp (PR #105991)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Visit ICmp (PR #105991)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Combine trunc of binop (PR #107721)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Visit ICmp (PR #105991)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Visit ICmp (PR #105991)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Visit ICmp (PR #105991)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Visit ICmp (PR #105991)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Combine trunc of binop (PR #107721)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Combine trunc of binop (PR #107721)   Thorsten Schütt via llvm-commits
• [llvm] [RISCV][GISEL] Legalize G_INSERT and G_EXTRACT for scalable vectors (PR #108220)   Thorsten Schütt via llvm-commits
• [llvm] [RISCV][GISEL] Legalize G_INSERT_VECTOR_ELT (PR #108250)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Combine zext of trunc (episode II) (PR #108305)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Combine zext of trunc (episode II) (PR #108305)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Combine zext of trunc (episode II) (PR #108305)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Combine zext of trunc (episode II) (PR #108305)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Visit ICmp (PR #105991)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Visit ICmp (PR #105991)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Combine zext of trunc (episode II) (PR #108305)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Combine zext of trunc (episode II) (PR #108305)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Combine zext of trunc (episode II) (PR #108305)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Combine zext of trunc (episode II) (PR #108305)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Combine zext of trunc (episode II) (PR #108305)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Combine zext of trunc (episode II) (PR #108305)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Combine zext of trunc (episode II) (PR #108305)   Thorsten Schütt via llvm-commits
• [llvm] [RISCV][GISel] Legalize G_STACKSAVE/RESTORE. (PR #108438)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Combine zext of trunc (episode II) (PR #108305)   Thorsten Schütt via llvm-commits
• [llvm] [NFC][EarlyIfConverter] Replace boolean Preadicate for a class (PR #108519)   Thorsten Schütt via llvm-commits
• [llvm] [TargetMachine] Add `getFlatAddressSpace` to `TargetMachine` (PR #108594)   Thorsten Schütt via llvm-commits
• [llvm] [Offload] Introduce offload-tblgen and initial new API implementation (PR #108413)   Thorsten Schütt via llvm-commits
• [llvm] [Offload] Introduce offload-tblgen and initial new API implementation (PR #108413)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Visit ICmp (PR #105991)   Thorsten Schütt via llvm-commits
• [llvm] [SandboxVec] User-defined pass pipeline (PR #108625)   Thorsten Schütt via llvm-commits
• [llvm] [IRTranslator][RISCV] Support scalable vector zeroinitializer. (PR #108666)   Thorsten Schütt via llvm-commits
• [llvm] [SandboxVec] Legality boilerplate (PR #108650)   Thorsten Schütt via llvm-commits
• [llvm] [SandboxVec] Legality boilerplate (PR #108650)   Thorsten Schütt via llvm-commits
• [llvm] [SandboxVec] Legality boilerplate (PR #108650)   Thorsten Schütt via llvm-commits
• [llvm] [SandboxVec] Legality boilerplate (PR #108650)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Visit ICmp (PR #105991)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Canonicalize G_ICMP (PR #108755)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Canonicalize G_ICMP (PR #108755)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Canonicalize G_ICMP (PR #108755)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Canonicalize G_ICMP (PR #108755)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Canonicalize G_ICMP (PR #108755)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Canonicalize G_ICMP (PR #108755)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Canonicalize G_ICMP (PR #108755)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Canonicalize G_ICMP (PR #108755)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Canonicalize G_ICMP (PR #108755)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Visit ICmp (PR #105991)   Thorsten Schütt via llvm-commits
• [compiler-rt] [NFC][sanitizer] Extract GetDTLSRange (PR #107934)   Thurston Dang via llvm-commits
• [compiler-rt] [NFC][sanitizer] Remove DTLS_on_libc_memalign (PR #108120)   Thurston Dang via llvm-commits
• [compiler-rt] [NFC][sanitizer] Remove DTLS_on_libc_memalign (PR #108120)   Thurston Dang via llvm-commits
• [compiler-rt] [sanitizer] Change GetDTLSRange (PR #108345)   Thurston Dang via llvm-commits
• [llvm] Bail out jump threading on indirect branches (PR #103688)   Tobias Hieta via llvm-commits
• [clang] [llvm] Delete the clang-format Visual Studio plugin code (PR #108342)   Tobias Hieta via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)   Tobias Hieta via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)   Tobias Hieta via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)   Tobias Hieta via llvm-commits
• [llvm] fix(llvm/**.py): fix comparison to True/False (PR #94040)   Tobias Hieta via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)   Tobias Hieta via llvm-commits
• [clang] [llvm] [CodeView] Flatten cmd args in frontend for LF_BUILDINFO (PR #106369)   Tobias Hieta via llvm-commits
• [llvm] [CodeGen] Refactor DeadMIElim isDead and GISel isTriviallyDead (PR #105956)   Tobias Stadler via llvm-commits
• [llvm] [CodeGen] Refactor DeadMIElim isDead and GISel isTriviallyDead (PR #105956)   Tobias Stadler via llvm-commits
• [clang] [llvm] [Clang] Match MSVC handling of duplicate header search paths in Microsoft compatibility modes. (PR #105738)   Tom Honermann via llvm-commits
• [llvm] [bolt][tests] Skip tests that use perf when perf counters are unavailable (PR #107892)   Tom Stellard via llvm-commits
• [llvm] [bolt][tests] Skip tests that use perf when perf counters are unavailable (PR #107892)   Tom Stellard via llvm-commits
• [llvm] [bolt][tests] Skip tests that use perf when perf counters are unavailable (PR #107892)   Tom Stellard via llvm-commits
• [llvm] [TableGen] Add explicit symbol visibility macros to code generated (PR #107873)   Tom Stellard via llvm-commits
• [llvm] [Workflows] Enable commit access requests via GitHub issues (PR #100458)   Tom Stellard via llvm-commits
• [llvm] workflows/commit-access-review: Use get_collaborators() function (PR #108313)   Tom Stellard via llvm-commits
• [llvm] workflows/commit-access-review: Use get_collaborators() function (PR #108313)   Tom Stellard via llvm-commits
• [llvm] workflows/commit-access-review: Use get_collaborators() function (PR #108313)   Tom Stellard via llvm-commits
• [llvm] workflows/commit-access-review: Use get_collaborators() function (PR #108313)   Tom Stellard via llvm-commits
• [llvm] workflows/commit-access-review: Use get_collaborators() function (PR #108313)   Tom Stellard via llvm-commits
• [llvm] workflows/commit-access-review: Use get_collaborators() function (PR #108313)   Tom Stellard via llvm-commits
• [llvm] workflows/commit-access-review: Use get_collaborators() function (PR #108313)   Tom Stellard via llvm-commits
• [llvm] workflows/commit-access-review: Use get_collaborators() function (PR #108313)   Tom Stellard via llvm-commits
• [llvm] workflows/commit-access-review: Use get_collaborators() function (PR #108313)   Tom Stellard via llvm-commits
• [llvm] workflows/release-binaries: Fix automatic upload (PR #107315)   Tom Stellard via llvm-commits
• [llvm] workflows/release-binaries: Fix automatic upload (PR #107315)   Tom Stellard via llvm-commits
• [llvm] workflows/release-binaries: Fix automatic upload (PR #107315)   Tom Stellard via llvm-commits
• [clang] [llvm] [AArch64] Attempt to further split the arch default and implied exts. (PR #106304)   Tomas Matheson via llvm-commits
• [llvm] [PowerPC] Fix assert exposed by PR 95931 in LowerBITCAST (PR #108062)   Trevor Gross via llvm-commits
• [llvm] Avoid exposing password and token from git repositories (PR #105220)   Tulio Magno Quites Machado Filho via llvm-commits
• [llvm] Avoid exposing password and token from git repositories (PR #105220)   Tulio Magno Quites Machado Filho via llvm-commits
• [llvm] Avoid exposing password and token from git repositories (PR #105220)   Tulio Magno Quites Machado Filho via llvm-commits
• [llvm] Avoid exposing password and token from git repositories (PR #105220)   Tulio Magno Quites Machado Filho via llvm-commits
• [llvm] [llvm/llvm-project][Coroutines] Move the SuspendCrossingInfo analysis helper into its own header/source (PR #106306)   Tyler Nowicki via llvm-commits
• [llvm] [Coroutines] Move the SuspendCrossingInfo analysis helper into its own header/source (PR #106306)   Tyler Nowicki via llvm-commits
• [llvm] [llvm/llvm-project][Coroutines] Move spill related methods to a Spill utils (PR #107884)   Tyler Nowicki via llvm-commits
• [llvm] [llvm/llvm-project][Coroutines] Move spill related methods to a Spill utils (PR #107884)   Tyler Nowicki via llvm-commits
• [llvm] [llvm/llvm-project][Coroutines] Move spill related methods to a Spill utils (PR #107884)   Tyler Nowicki via llvm-commits
• [llvm] [Coroutines] Move spill related methods to a Spill utils (PR #107884)   Tyler Nowicki via llvm-commits
• [llvm] [Coroutines] Improve debugging and minor refactoring (PR #104642)   Tyler Nowicki via llvm-commits
• [llvm] [Coroutines] Split buildCoroutineFrame into normalization and frame building (PR #108076)   Tyler Nowicki via llvm-commits
• [llvm] [Coroutines] Split buildCoroutineFrame into normalization and frame building (PR #108076)   Tyler Nowicki via llvm-commits
• [llvm] [Coroutines] Verify normalization was not missed (PR #108096)   Tyler Nowicki via llvm-commits
• [llvm] [Coroutines] Split buildCoroutineFrame into normalization and frame building (PR #108076)   Tyler Nowicki via llvm-commits
• [llvm] [Coroutines] Split buildCoroutineFrame into normalization and frame building (PR #108076)   Tyler Nowicki via llvm-commits
• [llvm] [Coroutines] Verify normalization was not missed (PR #108096)   Tyler Nowicki via llvm-commits
• [llvm] [Coroutines] Verify normalization was not missed (PR #108096)   Tyler Nowicki via llvm-commits
• [llvm] [Coroutines] Verify normalization was not missed (PR #108096)   Tyler Nowicki via llvm-commits
• [llvm] [Coroutines] Verify normalization was not missed (PR #108096)   Tyler Nowicki via llvm-commits
• [llvm] [Coroutines] Move materialization code into its own utils (PR #108240)   Tyler Nowicki via llvm-commits
• [llvm] [Coroutines] Move Shape to its own header (PR #108242)   Tyler Nowicki via llvm-commits
• [llvm] [Coroutines] Move Shape to its own header (PR #108242)   Tyler Nowicki via llvm-commits
• [llvm] [Coroutines] Move Shape to its own header (PR #108242)   Tyler Nowicki via llvm-commits
• [llvm] [Coroutines] properly update CallGraph in CoroSplit (PR #107935)   Tyler Nowicki via llvm-commits
• [llvm] [Coroutines] Verify normalization was not missed (PR #108096)   Tyler Nowicki via llvm-commits
• [llvm] [Coroutines] Move materialization code into its own utils (PR #108240)   Tyler Nowicki via llvm-commits
• [llvm] [Coroutines] Move Shape to its own header (PR #108242)   Tyler Nowicki via llvm-commits
• [llvm] [Coroutines] Move Shape to its own header (PR #108242)   Tyler Nowicki via llvm-commits
• [llvm] [Coroutines] Refactor CoroShape::buildFrom for future use by ABI objects (PR #108623)   Tyler Nowicki via llvm-commits
• [llvm] [Coroutines] Refactor CoroShape::buildFrom for future use by ABI objects (PR #108623)   Tyler Nowicki via llvm-commits
• [llvm] DXIL: Use correct type ID when writing ValueAsMetadata. (PR #94337)   Valentin Churavy via llvm-commits
• [llvm] [NFC][TableGen] Simplify DirectiveEmitter using range for loops (PR #107909)   Valentin Clement バレンタイン クレメン via llvm-commits
• [llvm] d5bc1f4 - [SandboxVec][NFC] Rename a variable   Vasileios Porpodas via llvm-commits
• [clang] [llvm] Prefer std::getenv to ::getenv (PR #108529)   Vassil Vassilev via llvm-commits
• [clang] [llvm] Prefer std::getenv to ::getenv (PR #108529)   Vassil Vassilev via llvm-commits
• [clang] [llvm] Prefer std::getenv to ::getenv (PR #108529)   Vassil Vassilev via llvm-commits
• [clang] [llvm] Prefer std::getenv to ::getenv (PR #108529)   Vassil Vassilev via llvm-commits
• [llvm] [ADT] Style and nit fixes in SmallSet (PR #108582)   Victor Campos via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle] Set `InConstraintExpr` to `true` when demangling a c… (PR #107385)   Viktoriia Bakalova via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle] Set `InConstraintExpr` to `true` when demangling a constraint expression (PR #107385)   Viktoriia Bakalova via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle] Set `InConstraintExpr` to `true` when demangling a constraint expression (PR #107385)   Viktoriia Bakalova via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle] Set `InConstraintExpr` to `true` when demangling a constraint expression (PR #107385)   Viktoriia Bakalova via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle] Set `InConstraintExpr` to `true` when demangling a constraint expression (PR #107385)   Viktoriia Bakalova via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle] Set `InConstraintExpr` to `true` when demangling a constraint expression (PR #107385)   Viktoriia Bakalova via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle] Set `InConstraintExpr` to `true` when demangling a constraint expression (PR #107385)   Viktoriia Bakalova via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle] Set `InConstraintExpr` to `true` when demangling a constraint expression (PR #107385)   Viktoriia Bakalova via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle] Set `InConstraintExpr` to `true` when demangling a constraint expression (PR #107385)   Viktoriia Bakalova via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle] Set `InConstraintExpr` to `true` when demangling a constraint expression (PR #107385)   Viktoriia Bakalova via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle] Add template name to the substituions list during d… (PR #108538)   Viktoriia Bakalova via llvm-commits
• [lld] [CGData] LLD for MachO (PR #90166)   Vincent Lee via llvm-commits
• [lld] [CGData] LLD for MachO (PR #90166)   Vincent Lee via llvm-commits
• [lld] [CGData] LLD for MachO (PR #90166)   Vincent Lee via llvm-commits
• [compiler-rt] [NFC][sanitizer] Extract GetDTLSRange (PR #107934)   Vitaly Buka via llvm-commits
• [compiler-rt] [NFC][sanitizer] Extract GetDTLSRange (PR #107934)   Vitaly Buka via llvm-commits
• [compiler-rt] [NFC][sanitizer] Extract GetDTLSRange (PR #107934)   Vitaly Buka via llvm-commits
• [compiler-rt] [NFC][sanitizer] Extract GetDTLSRange (PR #107934)   Vitaly Buka via llvm-commits
• [compiler-rt] [sanitizer] Add CHECKs to validate calculated TLS range (PR #107941)   Vitaly Buka via llvm-commits
• [llvm] Revert "[amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic" (PR #108054)   Vitaly Buka via llvm-commits
• [llvm] Revert "[amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic" (PR #108054)   Vitaly Buka via llvm-commits
• [llvm] DO NOT MERGE: Reland "[amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic" (PR #108055)   Vitaly Buka via llvm-commits
• [compiler-rt] [sanitizer] Add CHECKs to validate calculated TLS range (PR #107941)   Vitaly Buka via llvm-commits
• [compiler-rt] Revert "[sanitizer] Add CHECKs to validate calculated TLS range" (PR #108112)   Vitaly Buka via llvm-commits
• [compiler-rt] Revert "[sanitizer] Add CHECKs to validate calculated TLS range" (PR #108112)   Vitaly Buka via llvm-commits
• [compiler-rt] [NFC][sanitizer] Remove DTLS_on_libc_memalign (PR #108120)   Vitaly Buka via llvm-commits
• [llvm] [HWASan] optimize AttrInfer fix for selective HWASan (PR #108111)   Vitaly Buka via llvm-commits
• [llvm] [HWASan] optimize AttrInfer fix for selective HWASan (PR #108111)   Vitaly Buka via llvm-commits
• [llvm] [HWASan] optimize AttrInfer fix for selective HWASan (PR #108111)   Vitaly Buka via llvm-commits
• [compiler-rt] [NFC][sanitizer] Remove DTLS_on_libc_memalign (PR #108120)   Vitaly Buka via llvm-commits
• [compiler-rt] [NFC][sanitizer] Remove DTLS_on_libc_memalign (PR #108120)   Vitaly Buka via llvm-commits
• [compiler-rt] Reland "[sanitizer] Add CHECKs to validate calculated TLS range" (PR #108122)   Vitaly Buka via llvm-commits
• [compiler-rt] Reland "[sanitizer] Add CHECKs to validate calculated TLS range" (PR #108122)   Vitaly Buka via llvm-commits
• [compiler-rt] Reland "[sanitizer] Add CHECKs to validate calculated TLS range" (PR #108122)   Vitaly Buka via llvm-commits
• [compiler-rt] [sanitizer] Remove DTLS_on_libc_memalign (PR #108120)   Vitaly Buka via llvm-commits
• [compiler-rt] Reland "[sanitizer] Add CHECKs to validate calculated TLS range" (PR #108122)   Vitaly Buka via llvm-commits
• [compiler-rt] [compiler-rt] Hardcode uptr/sptr typedefs on Linux Arm (PR #108105)   Vitaly Buka via llvm-commits
• [compiler-rt] Reland "[sanitizer] Add CHECKs to validate calculated TLS range" (PR #108122)   Vitaly Buka via llvm-commits
• [compiler-rt] Reland "[sanitizer] Add CHECKs to validate calculated TLS range" (PR #108122)   Vitaly Buka via llvm-commits
• [compiler-rt] Reland "[sanitizer] Add CHECKs to validate calculated TLS range" (PR #108122)   Vitaly Buka via llvm-commits
• [compiler-rt] Reland "[sanitizer] Add CHECKs to validate calculated TLS range" (PR #108122)   Vitaly Buka via llvm-commits
• [compiler-rt] Reland "[sanitizer] Add CHECKs to validate calculated TLS range" (PR #108122)   Vitaly Buka via llvm-commits
• [compiler-rt] Reland "[sanitizer] Add CHECKs to validate calculated TLS range" (PR #108122)   Vitaly Buka via llvm-commits
• [compiler-rt] Reland "[sanitizer] Add CHECKs to validate calculated TLS range" (PR #108122)   Vitaly Buka via llvm-commits
• [compiler-rt] [NFC][sanitizer] Commit test for #106912 (PR #108289)   Vitaly Buka via llvm-commits
• [compiler-rt] [NFC][sanitizer] Commit test for #106912 (PR #108289)   Vitaly Buka via llvm-commits
• [compiler-rt] [lsan] Fix free(NULL) interception during initialization (PR #106912)   Vitaly Buka via llvm-commits
• [compiler-rt] [lsan] Fix free(NULL) interception during initialization (PR #106912)   Vitaly Buka via llvm-commits
• [compiler-rt] [lsan] Fix free(NULL) interception during initialization (PR #106912)   Vitaly Buka via llvm-commits
• [compiler-rt] Reland "[sanitizer] Add CHECKs to validate calculated TLS range" (PR #108122)   Vitaly Buka via llvm-commits
• [compiler-rt] [lsan] Fix free(NULL) interception during initialization (PR #106912)   Vitaly Buka via llvm-commits
• [compiler-rt] [lsan] Fix free(NULL) interception during initialization (PR #106912)   Vitaly Buka via llvm-commits
• [compiler-rt] [lsan] Fix free(NULL) interception during initialization (PR #106912)   Vitaly Buka via llvm-commits
• [compiler-rt] Reland "[sanitizer] Add CHECKs to validate calculated TLS range" (PR #108122)   Vitaly Buka via llvm-commits
• [compiler-rt] Reland "[sanitizer] Add CHECKs to validate calculated TLS range" (PR #108122)   Vitaly Buka via llvm-commits
• [compiler-rt] [sanitizer] Remove DTLS_on_libc_memalign (PR #108120)   Vitaly Buka via llvm-commits
• [llvm] DO NOT MERGE: Reland "[amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic" (PR #108055)   Vitaly Buka via llvm-commits
• [llvm] DO NOT MERGE: Reland "[amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic" (PR #108055)   Vitaly Buka via llvm-commits
• [compiler-rt] [sanitizer] Change GetDTLSRange (PR #108345)   Vitaly Buka via llvm-commits
• [compiler-rt] [sanitizer] Change GetDTLSRange (PR #108345)   Vitaly Buka via llvm-commits
• [compiler-rt] Reland "[sanitizer] Add CHECKs to validate calculated TLS range" (PR #108122)   Vitaly Buka via llvm-commits
• [compiler-rt] [sanitizer] Allow to override GetDTLSRange (PR #108348)   Vitaly Buka via llvm-commits
• [compiler-rt] [sanitizer] Allow to override GetDTLSRange (PR #108348)   Vitaly Buka via llvm-commits
• [compiler-rt] [sanitizer] Test for __sanitizer_get_dtls_size (PR #108349)   Vitaly Buka via llvm-commits
• [compiler-rt] [sanitizer] Test for __sanitizer_get_dtls_size (PR #108349)   Vitaly Buka via llvm-commits
• [compiler-rt] [test][compiler-rt] Mark dlsym_alloc.c as unsupported on macos (PR #108439)   Vitaly Buka via llvm-commits
• [compiler-rt] [test][compiler-rt] Mark dlsym_alloc.c as unsupported on macos (PR #108439)   Vitaly Buka via llvm-commits
• [compiler-rt] [test][compiler-rt] Mark dlsym_alloc.c as unsupported on macos (PR #108439)   Vitaly Buka via llvm-commits
• [compiler-rt] Reland "[sanitizer] Add CHECKs to validate calculated TLS range" (PR #108122)   Vitaly Buka via llvm-commits
• [compiler-rt] 55afd5b - [sanitizer] Try to fix the test on powerpc bot   Vitaly Buka via llvm-commits
• [compiler-rt] [sanitizer] Disable new test on powerpc64le (PR #108505)   Vitaly Buka via llvm-commits
• [compiler-rt] [sanitizer] Disable new test on powerpc64le (PR #108505)   Vitaly Buka via llvm-commits
• [compiler-rt] [sanitizer] Disable new test on powerpc64le (PR #108505)   Vitaly Buka via llvm-commits
• [compiler-rt] [ASan] Disable InstallAtForkHandler on Linux/sparc64 (PR #108542)   Vitaly Buka via llvm-commits
• [llvm] [Instrumentation] Move test coverage in Transforms (NFC) (PR #108544)   Vitaly Buka via llvm-commits
• [compiler-rt] [rtsan] Fix va_args handling in open functions (PR #108291)   Vitaly Buka via llvm-commits
• [compiler-rt] [sanitizer] Fix intersecting stacks workaround (PR #108672)   Vitaly Buka via llvm-commits
• [compiler-rt] [sanitizer] Fix intersecting stacks workaround (PR #108672)   Vitaly Buka via llvm-commits
• [compiler-rt] 8bce263 - [NFC][sanitizer] Use nullptr instead of 0   Vitaly Buka via llvm-commits
• [compiler-rt] [sanitizer] Fix intersecting stacks workaround (PR #108672)   Vitaly Buka via llvm-commits
• [compiler-rt] b78d4c1 - [NFC][sanitizer] Clang-format sanitizer_common_nolibc.cpp   Vitaly Buka via llvm-commits
• [compiler-rt] 7005772 - [NFC][sanitizer] Clang format sanitizer_linux_test.cpp   Vitaly Buka via llvm-commits
• [compiler-rt] c21909a - [NFC][sanitizer] Simplify ifdef   Vitaly Buka via llvm-commits
• [compiler-rt] bafe3a4 - [NFC][tsan] Fix `reallocarray`, `calloc` parameters order   Vitaly Buka via llvm-commits
• [compiler-rt] 0b041f1 - [NFC][sanitizer] Extend `DlSymAllocator`   Vitaly Buka via llvm-commits
• [lld] a248ec3 - Revert "[ELF] Move InStruct into Ctx. NFC"   Vitaly Buka via llvm-commits
• [compiler-rt] [rtsan] Fix va_args handling in open functions (PR #108291)   Vitaly Buka via llvm-commits
• [clang] [llvm] [Instrumentation] Move out to Utils (NFC) (PR #108532)   Vitaly Buka via llvm-commits
• [clang] [llvm] [Instrumentation] Move out to Utils (NFC) (PR #108532)   Vitaly Buka via llvm-commits
• [compiler-rt] [tsan] Allow unloading of ignored libraries (PR #105660)   Vitaly Buka via llvm-commits
• [compiler-rt] [tsan] Allow unloading of ignored libraries (PR #105660)   Vitaly Buka via llvm-commits
• [compiler-rt] [tsan] Allow unloading of ignored libraries (PR #105660)   Vitaly Buka via llvm-commits
• [compiler-rt] [tsan] Allow unloading of ignored libraries (PR #105660)   Vitaly Buka via llvm-commits
• [compiler-rt] [tsan] Allow unloading of ignored libraries (PR #105660)   Vitaly Buka via llvm-commits
• [compiler-rt] [tsan] Allow unloading of ignored libraries (PR #105660)   Vitaly Buka via llvm-commits
• [compiler-rt] [tsan] Allow unloading of ignored libraries (PR #105660)   Vitaly Buka via llvm-commits
• [compiler-rt] [tsan] Allow unloading of ignored libraries (PR #105660)   Vitaly Buka via llvm-commits
• [compiler-rt] [rtsan][compiler-rt] Add 64 bit file interceptors, test for _FILE_OFFSET_BITS (PR #108057)   Vitaly Buka via llvm-commits
• [clang] [compiler-rt] [libcxx] [lldb] [llvm] Rename Sanitizer Coverage => Coverage Sanitizer (PR #106505)   Vitaly Buka via llvm-commits
• [clang] [compiler-rt] [libcxx] [lldb] [llvm] Rename Sanitizer Coverage => Coverage Sanitizer (PR #106505)   Vitaly Buka via llvm-commits
• [clang] [compiler-rt] [libcxx] [lldb] [llvm] Rename Sanitizer Coverage => Coverage Sanitizer (PR #106505)   Vitaly Buka via llvm-commits
• [compiler-rt] [sanitizer_common][test] Disable sanitizer_coverage_trace_pc_guard.cp… (PR #108206)   Vitaly Buka via llvm-commits
• [compiler-rt] [ASan][test] XFAIL global-overflow.cpp etc. on SPARC (PR #108200)   Vitaly Buka via llvm-commits
• [compiler-rt] [NFC][ASan] Replace calls to Report() and Die() with ReportIncompatibleRT() in AsanCheckIncompatibleRT() (PR #107991)   Vitaly Buka via llvm-commits
• [compiler-rt] [Sanitizer] Call Die() instead of Abort() when failed to reserve shadow memory range (PR #107833)   Vitaly Buka via llvm-commits
• [llvm] [RISCV] Added new register class GPRNoGPRS defined as substraction of GPRC sequences from GPR (PR #106974)   Vladislav Belov via llvm-commits
• [llvm] [BOLT][AArch64] Do not relax ADR referencing the same fragment (PR #108673)   Vladislav Khmelevsky via llvm-commits
• [llvm] [InstCombine] Replace an integer comparison of a `phi` node with multiple `ucmp`/`scmp` operands and a constant with `phi` of individual comparisons of original intrinsic's arguments (PR #107769)   Volodymyr Vasylkun via llvm-commits
• [llvm] [InstCombine] Replace an integer comparison of a `phi` node with multiple `ucmp`/`scmp` operands and a constant with `phi` of individual comparisons of original intrinsic's arguments (PR #107769)   Volodymyr Vasylkun via llvm-commits
• [llvm] [InstCombine] Replace an integer comparison of a `phi` node with multiple `ucmp`/`scmp` operands and a constant with `phi` of individual comparisons of original intrinsic's arguments (PR #107769)   Volodymyr Vasylkun via llvm-commits
• [llvm] [InstCombine] Replace an integer comparison of a `phi` node with multiple `ucmp`/`scmp` operands and a constant with `phi` of individual comparisons of original intrinsic's arguments (PR #107769)   Volodymyr Vasylkun via llvm-commits
• [llvm] [InstCombine] Replace an integer comparison of a `phi` node with multiple `ucmp`/`scmp` operands and a constant with `phi` of individual comparisons of original intrinsic's arguments (PR #107769)   Volodymyr Vasylkun via llvm-commits
• [llvm] [InstCombine] Replace an integer comparison of a `phi` node with multiple `ucmp`/`scmp` operands and a constant with `phi` of individual comparisons of original intrinsic's arguments (PR #107769)   Volodymyr Vasylkun via llvm-commits
• [llvm] [InstCombine] Replace an integer comparison of a `phi` node with multiple `ucmp`/`scmp` operands and a constant with `phi` of individual comparisons of original intrinsic's arguments (PR #107769)   Volodymyr Vasylkun via llvm-commits
• [llvm] [InstCombine] Replace an integer comparison of a `phi` node with multiple `ucmp`/`scmp` operands and a constant with `phi` of individual comparisons of original intrinsic's arguments (PR #107769)   Volodymyr Vasylkun via llvm-commits
• [llvm] [InstCombine] Replace an integer comparison of a `phi` node with multiple `ucmp`/`scmp` operands and a constant with `phi` of individual comparisons of original intrinsic's arguments (PR #107769)   Volodymyr Vasylkun via llvm-commits
• [llvm] [InstCombine] Fold `(x == y) ? 0 : (x > y ? 1 : -1)` into `ucmp/scmp(x,y)` (PR #107314)   Volodymyr Vasylkun via llvm-commits
• [llvm] [InstCombine] Fold `(x == y) ? 0 : (x > y ? 1 : -1)` into `ucmp/scmp(x,y)` (PR #107314)   Volodymyr Vasylkun via llvm-commits
• [lldb] [llvm] [lldb]Implement LLDB Telemetry (PR #98528)   Vy Nguyen via llvm-commits
• [lldb] [llvm] [lldb]Implement LLDB Telemetry (PR #98528)   Vy Nguyen via llvm-commits
• [lldb] [llvm] [lldb]Implement LLDB Telemetry (PR #98528)   Vy Nguyen via llvm-commits
• [llvm] [SPIR-V] Expose an API call to initialize SPIRV target and translate input LLVM IR module to SPIR-V (PR #107216)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V] Address the case when optimization uses GEP operator and GenCode creates G_PTR_ADD to convey the semantics (PR #107880)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V] Address the case when optimization uses GEP operator and GenCode creates G_PTR_ADD to convey the semantics (PR #107880)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V] Expose an API call to initialize SPIRV target and translate input LLVM IR module to SPIR-V (PR #107216)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V] Expose an API call to initialize SPIRV target and translate input LLVM IR module to SPIR-V (PR #107216)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V] Expose an API call to initialize SPIRV target and translate input LLVM IR module to SPIR-V (PR #107216)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V] Emit DebugTypeBasic for NonSemantic DI (PR #106980)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V] Emit DebugTypeBasic for NonSemantic DI (PR #106980)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V] Emit DebugTypeBasic for NonSemantic DI (PR #106980)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V] Emit DebugTypeBasic for NonSemantic DI (PR #106980)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V] Emit DebugTypeBasic for NonSemantic DI (PR #106980)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V] Emit DebugTypeBasic for NonSemantic DI (PR #106980)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V] Emit DebugTypeBasic for NonSemantic DI (PR #106980)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V] Emit DebugTypeBasic for NonSemantic DI (PR #106980)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V] Emit DebugTypeBasic for NonSemantic DI (PR #106980)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V] Emit DebugTypeBasic for NonSemantic DI (PR #106980)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V] Emit DebugTypeBasic for NonSemantic DI (PR #106980)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V] Expose an API call to initialize SPIRV target and translate input LLVM IR module to SPIR-V (PR #107216)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V] Expose an API call to initialize SPIRV target and translate input LLVM IR module to SPIR-V (PR #107216)   Vyacheslav Levytskyy via llvm-commits
• [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)   Vyacheslav Levytskyy via llvm-commits
• [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)   Vyacheslav Levytskyy via llvm-commits
• [clang] [llvm] [SPIRV][RFC] Rework / extend support for memory scopes (PR #106429)   Vyacheslav Levytskyy via llvm-commits
• [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)   Vyacheslav Levytskyy via llvm-commits
• [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)   Vyacheslav Levytskyy via llvm-commits
• [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)   Vyacheslav Levytskyy via llvm-commits
• [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)   Vyacheslav Levytskyy via llvm-commits
• [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)   Vyacheslav Levytskyy via llvm-commits
• [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V] Address the case when optimization uses GEP operator and GenCode creates G_PTR_ADD to convey the semantics (PR #107880)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V] Emit DebugTypeBasic for NonSemantic DI (PR #106980)   Vyacheslav Levytskyy via llvm-commits
• [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)   Vyacheslav Levytskyy via llvm-commits
• [clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V] Emit DebugTypeBasic for NonSemantic DI (PR #106980)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V] Emit DebugTypeBasic for NonSemantic DI (PR #106980)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V] Emit DebugTypeBasic for NonSemantic DI (PR #106980)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V] Emit DebugTypeBasic for NonSemantic DI (PR #106980)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V] Emit DebugTypeBasic for NonSemantic DI (PR #106980)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V] Emit DebugTypeBasic for NonSemantic DI (PR #106980)   Vyacheslav Levytskyy via llvm-commits
• [clang] [llvm] [SPIRV][RFC] Rework / extend support for memory scopes (PR #106429)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V] Align memory scopes with SPIR-V specification and LLVM expectations and change default mem scope value (PR #108528)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V] Align memory scopes with SPIR-V specification and LLVM expectations and change default mem scope value (PR #108528)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V] Align memory scopes with SPIR-V specification and LLVM expectations and change default mem scope value (PR #108528)   Vyacheslav Levytskyy via llvm-commits
• [clang] [llvm] [SPIRV][RFC] Rework / extend support for memory scopes (PR #106429)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V] Fix incorrect emission of G_SPLAT_VECTOR for fixed vectors (PR #108534)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [Transforms] Vectorizing Mem2Reg Pass (PR #107688)   William Junda Huang via llvm-commits
• [llvm] [Transforms] Vectorizing Mem2Reg Pass (PR #107688)   William Junda Huang via llvm-commits
• [llvm] [Transforms] Vectorizing Mem2Reg Pass (PR #107688)   William Junda Huang via llvm-commits
• [llvm] [Transforms] Vectorizing Mem2Reg Pass (PR #107688)   William Junda Huang via llvm-commits
• [compiler-rt] [rtsan] Ensure pthread is initialized in test (PR #108040)   Wu Yingcong via llvm-commits
• [compiler-rt] [rtsan][compiler-rt] Add 64 bit file interceptors, test for _FILE_OFFSET_BITS (PR #108057)   Wu Yingcong via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   Xiang Li via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   Xiang Li via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   Xiang Li via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   Xiang Li via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   Xiang Li via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   Xiang Li via llvm-commits
• [llvm] [DirectX] generate resource table for PSV part (PR #106607)   Xiang Li via llvm-commits
• [llvm] [DirectX] generate resource table for PSV part (PR #106607)   Xiang Li via llvm-commits
• [clang] [llvm] [HLSL] Implement elementwise popcount (PR #108121)   Xiang Li via llvm-commits
• [clang] [llvm] [HLSL] Implement elementwise popcount (PR #108121)   Xiang Li via llvm-commits
• [clang] [llvm] [clang][hlsl] Add atan2 intrinsic part 1 (PR #107923)   Xiang Li via llvm-commits
• [llvm] [DirectX] Preserve value names in DXILOpLowering. NFC (PR #108089)   Xiang Li via llvm-commits
• [llvm] [DirectX] generate resource table for PSV part (PR #106607)   Xiang Li via llvm-commits
• [llvm] [DirectX] fix fail test (PR #108468)   Xiang Li via llvm-commits
• [llvm] [DirectX] generate resource table for PSV part (PR #106607)   Xiang Li via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   Xiang Li via llvm-commits
• [llvm] [DXIL] Consume Metadata Analysis information in passes (PR #108034)   Xiang Li via llvm-commits
• [llvm] [NFC][DirectX] Remove rcp dx intrinsic (PR #108626)   Xiang Li via llvm-commits
• [llvm] update llvm-dis header with available options (PR #108073)   Xiaofeng Tian via llvm-commits
• [llvm] update llvm-dis header with available options (PR #108073)   Xiaofeng Tian via llvm-commits
• [llvm] update llvm-dis header with available options (PR #108073)   Xiaofeng Tian via llvm-commits
• [llvm] update llvm-dis header with available options (PR #108073)   Xiaofeng Tian via llvm-commits
• [llvm] update llvm-dis header with available options (PR #108073)   Xiaofeng Tian via llvm-commits
• [llvm] update llvm-dis header with available options (PR #108073)   Xiaofeng Tian via llvm-commits
• [lld] [lld][WebAssembly]: Restore non-pie dynamic-linking executable (PR #108146)   YAMAMOTO Takashi via llvm-commits
• [lld] [lld][WebAssembly]: Restore non-pie dynamic-linking executable (PR #108146)   YAMAMOTO Takashi via llvm-commits
• [lld] [lld][WebAssembly]: Restore non-pie dynamic-linking executable (PR #108146)   YAMAMOTO Takashi via llvm-commits
• [lld] [lld][WebAssembly]: Restore non-pie dynamic-linking executable (PR #108146)   YAMAMOTO Takashi via llvm-commits
• [lld] [lld][WebAssembly]: Restore non-pie dynamic-linking executable (PR #108146)   YAMAMOTO Takashi via llvm-commits
• [lld] [lld][WebAssembly]: Restore non-pie dynamic-linking executable (PR #108146)   YAMAMOTO Takashi via llvm-commits
• [llvm] [loongarch][DAG][FREEZE] Fix crash when FREEZE a half(f16) type on loongarch (PR #107791)   YANG Xudong via llvm-commits
• [llvm] [loongarch][DAG][FREEZE] Fix crash when FREEZE a half(f16) type on loongarch (PR #107791)   YANG Xudong via llvm-commits
• [llvm] [loongarch][DAG][FREEZE] Fix crash when FREEZE a half(f16) type on loongarch (PR #107791)   YANG Xudong via llvm-commits
• [llvm] [loongarch][DAG][FREEZE] Fix crash when FREEZE a half(f16) type on loongarch (PR #107791)   YANG Xudong via llvm-commits
• [llvm] [loongarch][DAG][FREEZE] Fix crash when FREEZE a half(f16) type on loongarch (PR #107791)   YANG Xudong via llvm-commits
• [llvm] [loongarch][DAG][FREEZE] Fix crash when FREEZE a half(f16) type on loongarch (PR #107791)   YANG Xudong via llvm-commits
• [llvm] [loongarch][DAG][FREEZE] Fix crash when FREEZE a half(f16) type on loongarch (PR #107791)   YANG Xudong via llvm-commits
• [llvm] [loongarch][DAG][FREEZE] Fix crash when FREEZE a half(f16) type on loongarch (PR #107791)   YANG Xudong via llvm-commits
• [llvm] [loongarch][DAG][FREEZE] Fix crash when FREEZE a half(f16) type on loongarch (PR #107791)   YANG Xudong via llvm-commits
• [llvm] [loongarch][DAG][FREEZE] Fix crash when FREEZE a half(f16) type on loongarch (PR #107791)   YANG Xudong via llvm-commits
• [llvm] [loongarch][DAG][FREEZE] Fix crash when FREEZE a half(f16) type on loongarch (PR #107791)   YANG Xudong via llvm-commits
• [llvm] [llvm][docs] Document how to get admin permissions for a worker (PR #108561)   Yanzuo Liu via llvm-commits
• [llvm] [InstCombine] Replace an integer comparison of a `phi` node with multiple `ucmp`/`scmp` operands and a constant with `phi` of individual comparisons of original intrinsic's arguments (PR #107769)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Replace an integer comparison of a `phi` node with multiple `ucmp`/`scmp` operands and a constant with `phi` of individual comparisons of original intrinsic's arguments (PR #107769)   Yingwei Zheng via llvm-commits
• [llvm] [IPSCCP] Infer attributes on arguments (PR #107114)   Yingwei Zheng via llvm-commits
• [llvm] [IPSCCP] Infer attributes on arguments (PR #107114)   Yingwei Zheng via llvm-commits
• [llvm] [IPSCCP] Infer attributes on arguments (PR #107114)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)   Yingwei Zheng via llvm-commits
• [llvm] [LoongArch][ISel] Check the number of sign bits in `PatGprGpr_32` (PR #107432)   Yingwei Zheng via llvm-commits
• [llvm] [LoongArch][ISel] Check the number of sign bits in `PatGprGpr_32` (PR #107432)   Yingwei Zheng via llvm-commits
• [llvm] [MemCpyOpt] Allow memcpy elision for non-noalias arguments (PR #107860)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Replace an integer comparison of a `phi` node with multiple `ucmp`/`scmp` operands and a constant with `phi` of individual comparisons of original intrinsic's arguments (PR #107769)   Yingwei Zheng via llvm-commits
• [llvm] [ValueTracking] Infer is-power-of-2 from assumptions. (PR #107745)   Yingwei Zheng via llvm-commits
• [llvm] [LoongArch] Eliminate the redundant sign extension of division (PR #107971)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Generalize `icmp (shl nuw C2, Y), C -> icmp Y, C3` (PR #104696)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Generalize `icmp (shl nuw C2, Y), C -> icmp Y, C3` (PR #104696)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Generalize `icmp (shl nuw C2, Y), C -> icmp Y, C3` (PR #104696)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Generalize `icmp (shl nuw C2, Y), C -> icmp Y, C3` (PR #104696)   Yingwei Zheng via llvm-commits
• [llvm] [LoopUnroll] Remove unused lifetime marker pairs (PR #106858)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Generalize `icmp (shl nuw C2, Y), C -> icmp Y, C3` (PR #104696)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Generalize `icmp (shl nuw C2, Y), C -> icmp Y, C3` (PR #104696)   Yingwei Zheng via llvm-commits
• [llvm] [ValueTracking] Infer is-power-of-2 from dominating conditions (PR #107994)   Yingwei Zheng via llvm-commits
• [llvm] [ConstraintElim] Generalize IV logic to chain of exiting blocks. (PR #108031)   Yingwei Zheng via llvm-commits
• [llvm] [ConstraintElim] Generalize IV logic to chain of exiting blocks. (PR #108031)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV] Expand mul X, C where C=2^N*(3, 5, 9)*(3, 5, 9) (PR #108100)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV] Expand mul X, C where C=2^N*(3, 5, 9)*(3, 5, 9) (PR #108100)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV] Expand mul X, C where C=2^N*(3, 5, 9)*(3, 5, 9) (PR #108100)   Yingwei Zheng via llvm-commits
• [llvm] [ConstraintElim] Generalize IV logic to chain of exiting blocks. (PR #108031)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV] Expand mul X, C where C=2^N*(3, 5, 9)*(3, 5, 9) (PR #108100)   Yingwei Zheng via llvm-commits
• [llvm] [TableGen] Avoid repeated hash lookups (NFC) (PR #108138)   Yingwei Zheng via llvm-commits
• [llvm] [LoopDeletion] Unblock loop deletion with `llvm.experimental.noalias.scope.decl` (PR #108144)   Yingwei Zheng via llvm-commits
• [llvm] [LoopDeletion] Unblock loop deletion with `llvm.experimental.noalias.scope.decl` (PR #108144)   Yingwei Zheng via llvm-commits
• [llvm] Decompose gep of complex type struct to its element type (PR #107848)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV][MachineCombiner] Combine `fadd X, (fneg Y)` to `fsub X, Y` (PR #107803)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV] Expand Zfa fli+fneg cases during lowering instead of during isel. (PR #108316)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV] Expand Zfa fli+fneg cases during lowering instead of during isel. (PR #108316)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV] Expand Zfa fli+fneg cases during lowering instead of during isel. (PR #108316)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV] Enable floating point CSR alias mnemonics for Zfinx. (PR #108464)   Yingwei Zheng via llvm-commits
• [clang] [llvm] [RISCV] Add Syntacore SCR7 processor definition (PR #108406)   Yingwei Zheng via llvm-commits
• [llvm] [ValueTracking] Infer is-power-of-2 from dominating conditions (PR #107994)   Yingwei Zheng via llvm-commits
• [clang] [llvm] [RISCV] Add Syntacore SCR7 processor definition (PR #108406)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV] Make Zicclsm imply unaligned scalar and vector access (PR #108551)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV] Bump hwprobe support to Linux 6.11 (PR #108578)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV] Bump hwprobe support to Linux 6.11 (PR #108578)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `(x == y) ? 0 : (x > y ? 1 : -1)` into `ucmp/scmp(x,y)` (PR #107314)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV] Bump hwprobe support to Linux 6.11 (PR #108578)   Yingwei Zheng via llvm-commits
• [llvm] [TLI] Add basic support for fdim libcall (PR #108702)   Yingwei Zheng via llvm-commits
• [llvm] [TLI] Add basic support for fdim libcall (PR #108702)   Yingwei Zheng via llvm-commits
• [llvm] [VectorCombine] Don't shrink lshr if the shamt is not less than bitwidth (PR #108705)   Yingwei Zheng via llvm-commits
• [llvm] [VectorCombine] Don't shrink lshr if the shamt is not less than bitwidth (PR #108705)   Yingwei Zheng via llvm-commits
• [llvm] [LLVM][IR] Add constant range support for floating-point types (PR #86483)   Yingwei Zheng via llvm-commits
• [llvm] [LLVM][IR] Add constant range support for floating-point types (PR #86483)   Yingwei Zheng via llvm-commits
• [llvm] [VectorCombine] Don't shrink lshr if the shamt is not less than bitwidth (PR #108705)   Yingwei Zheng via llvm-commits
• [llvm] [X86,SimplifyCFG] Use passthru to reduce select (PR #108754)   Yingwei Zheng via llvm-commits
• [llvm] [X86,SimplifyCFG] Use passthru to reduce select (PR #108754)   Yingwei Zheng via llvm-commits
• [llvm] [X86,SimplifyCFG] Use passthru to reduce select (PR #108754)   Yingwei Zheng via llvm-commits
• [llvm] [X86,SimplifyCFG] Use passthru to reduce select (PR #108754)   Yingwei Zheng via llvm-commits
• [llvm] [LLVM][IR] Add constant range support for floating-point types (PR #86483)   Yingwei Zheng via llvm-commits
• [llvm] [LLVM][IR] Add constant range support for floating-point types (PR #86483)   Yingwei Zheng via llvm-commits
• [llvm] [LLVM][IR] Add constant range support for floating-point types (PR #86483)   Yingwei Zheng via llvm-commits
• [llvm] [LLVM][IR] Add constant range support for floating-point types (PR #86483)   Yingwei Zheng via llvm-commits
• [llvm] [LLVM][IR] Add constant range support for floating-point types (PR #86483)   Yingwei Zheng via llvm-commits
• [llvm] [LLVM][IR] Add constant range support for floating-point types (PR #86483)   Yingwei Zheng via llvm-commits
• [llvm] [LLVM][IR] Add constant range support for floating-point types (PR #86483)   Yingwei Zheng via llvm-commits
• [llvm] [X86,SimplifyCFG] Use passthru to reduce select (PR #108754)   Yingwei Zheng via llvm-commits
• [clang] [clang-tools-extra] [llvm] [clang] WIP: Improved Context Declaration tracking (PR #107942)   Younan Zhang via llvm-commits
• [clang] [clang-tools-extra] [llvm] [clang] WIP: Improved Context Declaration tracking (PR #107942)   Younan Zhang via llvm-commits
• [clang] [clang-tools-extra] [llvm] [clang] WIP: Improved Context Declaration tracking (PR #107942)   Younan Zhang via llvm-commits
• [clang] [clang-tools-extra] [llvm] [clang] WIP: Improved Context Declaration tracking (PR #107942)   Younan Zhang via llvm-commits
• [clang] [clang-tools-extra] [llvm] [clang] WIP: Improved Context Declaration tracking (PR #107942)   Younan Zhang via llvm-commits
• [clang] [clang-tools-extra] [llvm] [clang] WIP: Improved Context Declaration tracking (PR #107942)   Younan Zhang via llvm-commits
• [clang] [clang-tools-extra] [llvm] [clang] WIP: Improved Context Declaration tracking (PR #107942)   Younan Zhang via llvm-commits
• [clang] [clang-tools-extra] [llvm] [clang] WIP: Improved Context Declaration tracking (PR #107942)   Younan Zhang via llvm-commits
• [clang] [clang-tools-extra] [llvm] [clang] WIP: Improved Context Declaration tracking (PR #107942)   Younan Zhang via llvm-commits
• [clang] [clang-tools-extra] [llvm] [clang] WIP: Improved Context Declaration tracking (PR #107942)   Younan Zhang via llvm-commits
• [clang] [clang-tools-extra] [llvm] [clang] WIP: Improved Context Declaration tracking (PR #107942)   Younan Zhang via llvm-commits
• [clang] [clang-tools-extra] [llvm] [clang] WIP: Improved Context Declaration tracking (PR #107942)   Younan Zhang via llvm-commits
• [clang] [clang-tools-extra] [llvm] [clang] WIP: Improved Context Declaration tracking (PR #107942)   Younan Zhang via llvm-commits
• [llvm] [llvm][CodeGen] Avoid 'raw_string_ostream::str' (NFC) (PR #97318)   Youngsuk Kim via llvm-commits
• [llvm] [DebugInfo] Avoid repeated hash lookups (NFC) (PR #108486)   Youngsuk Kim via llvm-commits
• [llvm] [IR] Avoid repeated hash lookups (NFC) (PR #108485)   Youngsuk Kim via llvm-commits
• [llvm] [llvm-size] Avoid unneeded uses of 'raw_string_ostream::str' (NFC) (PR #108490)   Youngsuk Kim via llvm-commits
• [llvm] [llvm-size] Avoid unneeded uses of 'raw_string_ostream::str' (NFC) (PR #108490)   Youngsuk Kim via llvm-commits
• [llvm] [llvm-size] Avoid unneeded uses of 'raw_string_ostream::str' (NFC) (PR #108490)   Youngsuk Kim via llvm-commits
• [llvm] [llvm-size] Avoid unneeded uses of 'raw_string_ostream::str' (NFC) (PR #108490)   Youngsuk Kim via llvm-commits
• [llvm] [llvm] Fix typo in comments (PR #108230)   Youngsuk Kim via llvm-commits
• [llvm] [llvm] Fix typo in comments (PR #108230)   Youngsuk Kim via llvm-commits
• [llvm] [llvm-size] Avoid unneeded uses of 'raw_string_ostream::str' (NFC) (PR #108490)   Youngsuk Kim via llvm-commits
• [llvm] AArch64: Add FMINNUM_IEEE and FMAXNUM_IEEE support (PR #107855)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG: Remove unneeded getSelectCC in expandFMINIMUMNUM_FMAXIMUMNUM (PR #107416)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG: Remove unneeded getSelectCC in expandFMINIMUMNUM_FMAXIMUMNUM (PR #107416)   YunQiang Su via llvm-commits
• [llvm] MIPSr6: Add llvm.is.fpclasss intrinsic support (PR #107857)   YunQiang Su via llvm-commits
• [llvm] AArch64: Add FCANONICALIZE (PR #104429)   YunQiang Su via llvm-commits
• [llvm] [Mips] Add test file for 'xor' and 'and' instructions (PR #106679)   YunQiang Su via llvm-commits
• [llvm] [MIPS] Fix -msingle-float doesn't work with double on O32 (PR #107543)   YunQiang Su via llvm-commits
• [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)   YunQiang Su via llvm-commits
• [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)   YunQiang Su via llvm-commits
• [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)   YunQiang Su via llvm-commits
• [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)   YunQiang Su via llvm-commits
• [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)   YunQiang Su via llvm-commits
• [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)   YunQiang Su via llvm-commits
• [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)   YunQiang Su via llvm-commits
• [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)   YunQiang Su via llvm-commits
• [llvm] [Mips] Fix mfhi/mflo hazard miscompilation about div and mult (PR #91449)   YunQiang Su via llvm-commits
• [llvm] [Mips] Fix mfhi/mflo hazard miscompilation about div and mult (PR #91449)   YunQiang Su via llvm-commits
• [llvm] AArch64: Add FMINNUM_IEEE and FMAXNUM_IEEE support (PR #107855)   YunQiang Su via llvm-commits
• [llvm] [MIPS] Fix -msingle-float doesn't work with double on O32 (PR #107543)   YunQiang Su via llvm-commits
• [llvm] [MIPS] Fix -msingle-float doesn't work with double on O32 (PR #107543)   YunQiang Su via llvm-commits
• [llvm] [MIPS] Fix -msingle-float doesn't work with double on O32 (PR #107543)   YunQiang Su via llvm-commits
• [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)   YunQiang Su via llvm-commits
• [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)   YunQiang Su via llvm-commits
• [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)   YunQiang Su via llvm-commits
• [llvm] AArch64: Add FMINNUM_IEEE and FMAXNUM_IEEE support (PR #107855)   YunQiang Su via llvm-commits
• [llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)   YunQiang Su via llvm-commits
• [llvm] MIPSr6: Add llvm.is.fpclasss intrinsic support (PR #107857)   YunQiang Su via llvm-commits
• [llvm] AArch64: Add FMINNUM_IEEE and FMAXNUM_IEEE support (PR #107855)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG: Remove unneeded getSelectCC in expandFMINIMUMNUM_FMAXIMUMNUM (PR #107416)   YunQiang Su via llvm-commits
• [llvm] AArch64: Add FCANONICALIZE (PR #104429)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG/expandFMINIMUMNUM_FMAXIMUMNUM: FCANONICALIZE is needed only for sNaN (PR #108180)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG/expandFMINIMUMNUM_FMAXIMUMNUM: FCANONICALIZE is needed only for sNaN (PR #108180)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG/expandFMINIMUMNUM_FMAXIMUMNUM: FCANONICALIZE is needed only for sNaN (PR #108180)   YunQiang Su via llvm-commits
• [llvm] [MIPS] Fix -msingle-float doesn't work with double on O32 (PR #107543)   YunQiang Su via llvm-commits
• [llvm] [MIPS] Fix -msingle-float doesn't work with double on O32 (PR #107543)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG/expandFMINIMUMNUM_FMAXIMUMNUM: FCANONICALIZE is needed only for sNaN (PR #108180)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG: Support nofpclass (PR #108350)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG/expandFMINIMUMNUM_FMAXIMUMNUM: FCANONICALIZE is needed only for sNaN (PR #108180)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG/expandFMINIMUMNUM_FMAXIMUMNUM: FCANONICALIZE is needed only for sNaN (PR #108180)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG/expandFMINIMUMNUM_FMAXIMUMNUM: FCANONICALIZE is needed only for sNaN (PR #108180)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG/expandFMINIMUMNUM_FMAXIMUMNUM: FCANONICALIZE is needed only for sNaN (PR #108180)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG: Support nofpclass (PR #108350)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG: Support nofpclass (PR #108350)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG: Support nofpclass (PR #108350)   YunQiang Su via llvm-commits
• [llvm] [llvm][Mips] Bail on underaligned loads/stores in FastISel. (PR #106231)   YunQiang Su via llvm-commits
• [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, shift)` to `ins` (PR #103017)   YunQiang Su via llvm-commits
• [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, shift)` to `ins` (PR #103017)   YunQiang Su via llvm-commits
• [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, shift)` to `ins` (PR #103017)   YunQiang Su via llvm-commits
• [llvm] [Mips] Optimize `or (and $src1, mask), (shl $src2, shift)` to `ins` (PR #103017)   YunQiang Su via llvm-commits
• [llvm] [Mips] Optimize `or (and $src1, mask), (shl $src2, shift)` to `ins` (PR #103017)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG: Support nofpclass (PR #108350)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG: Support nofpclass (PR #108350)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG: Support nofpclass (PR #108350)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG: Support nofpclass (PR #108350)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG: Support nofpclass (PR #108350)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG: Support nofpclass (PR #108350)   YunQiang Su via llvm-commits
• [llvm] [MachinePipeliner] Improve loop carried dependence analysis (PR #94185)   Yuta Mukai via llvm-commits
• [llvm] [LLVM][Coroutines] Switch CoroAnnotationElidePass to a FunctionPass (PR #107897)   Yuxuan Chen via llvm-commits
• [llvm] [LLVM][Coroutines] Switch CoroAnnotationElidePass to a FunctionPass (PR #107897)   Yuxuan Chen via llvm-commits
• [llvm] [LLVM][Coroutines] Switch CoroAnnotationElidePass to a FunctionPass (PR #107897)   Yuxuan Chen via llvm-commits
• [llvm] [LLVM][Coroutines] Switch CoroAnnotationElidePass to a FunctionPass (PR #107897)   Yuxuan Chen via llvm-commits
• [clang] [llvm] [LLVM][Coroutines] Transform "coro_elide_safe" calls to switch ABI coroutines to the `noalloc` variant (PR #99285)   Yuxuan Chen via llvm-commits
• [llvm] [Coroutines] Make CoroSplit properly update CallGraph (PR #107935)   Yuxuan Chen via llvm-commits
• [llvm] [LLVM][Coroutines] Switch CoroAnnotationElidePass to a FunctionPass (PR #107897)   Yuxuan Chen via llvm-commits
• [llvm] [Coroutines] Split buildCoroutineFrame into normalization and frame building (PR #108076)   Yuxuan Chen via llvm-commits
• [llvm] [Coroutines] Make CoroSplit properly update CallGraph (PR #107935)   Yuxuan Chen via llvm-commits
• [llvm] [Coroutines] Make CoroSplit properly update CallGraph (PR #107935)   Yuxuan Chen via llvm-commits
• [llvm] [Coroutines] Make CoroSplit properly update CallGraph (PR #107935)   Yuxuan Chen via llvm-commits
• [llvm] [Coroutines] Make CoroSplit properly update CallGraph (PR #107935)   Yuxuan Chen via llvm-commits
• [llvm] [Coroutines] Make CoroSplit properly update CallGraph (PR #107935)   Yuxuan Chen via llvm-commits
• [llvm] [Coroutines] properly update CallGraph in CoroSplit (PR #107935)   Yuxuan Chen via llvm-commits
• [llvm] [Coroutines] properly update CallGraph in CoroSplit (PR #107935)   Yuxuan Chen via llvm-commits
• [llvm] [Coroutines] properly update CallGraph in CoroSplit (PR #107935)   Yuxuan Chen via llvm-commits
• [llvm] [Coroutines] properly update CallGraph in CoroSplit (PR #107935)   Yuxuan Chen via llvm-commits
• [llvm] [Coroutines] properly update CallGraph in CoroSplit (PR #107935)   Yuxuan Chen via llvm-commits
• [llvm] [Coroutines] properly update CallGraph in CoroSplit (PR #107935)   Yuxuan Chen via llvm-commits
• [llvm] [Coroutines] properly update CallGraph in CoroSplit (PR #107935)   Yuxuan Chen via llvm-commits
• [llvm] [Coroutines] properly update CallGraph in CoroSplit (PR #107935)   Yuxuan Chen via llvm-commits
• [llvm] [PowerPC] Respect endianness when bitcasting to fp128 (PR #95931)   Zaara Syeda via llvm-commits
• [llvm] [PowerPC] Fix assert exposed by PR 95931 in LowerBITCAST (PR #108062)   Zaara Syeda via llvm-commits
• [llvm] [PowerPC] Fix assert exposed by PR 95931 in LowerBITCAST (PR #108062)   Zaara Syeda via llvm-commits
• [llvm] [PowerPC] Fix assert exposed by PR 95931 in LowerBITCAST (PR #108062)   Zaara Syeda via llvm-commits
• [llvm] [PowerPC] Fix assert exposed by PR 95931 in LowerBITCAST (PR #108062)   Zaara Syeda via llvm-commits
• [llvm] [PowerPC] Fix assert exposed by PR 95931 in LowerBITCAST (PR #108062)   Zaara Syeda via llvm-commits
• [llvm] [PowerPC] Fix assert exposed by PR 95931 in LowerBITCAST (PR #108062)   Zaara Syeda via llvm-commits
• [compiler-rt] [llvm] [Coverage] Ignore unused functions if the count is 0. (PR #107661)   Zequan Wu via llvm-commits
• [compiler-rt] [llvm] [Coverage] Ignore unused functions if the count is 0. (PR #107661)   Zequan Wu via llvm-commits
• [compiler-rt] [llvm] Revert "[Coverage] Ignore unused functions if the count is 0." (PR #107901)   Zequan Wu via llvm-commits
• [compiler-rt] [llvm] Revert "[Coverage] Ignore unused functions if the count is 0." (PR #107901)   Zequan Wu via llvm-commits
• [llvm] [Coverage] Skip empty profile name section (PR #108480)   Zequan Wu via llvm-commits
• [llvm] [MacroFusion] Support commutable instructions (PR #82751)   Zi Xuan Wu via llvm-commits
• [llvm] [MacroFusion] Support commutable instructions (PR #82751)   Zi Xuan Wu via llvm-commits
• [llvm] [MacroFusion] Support commutable instructions (PR #82751)   Zi Xuan Wu via llvm-commits
• [llvm] [MacroFusion] Support commutable instructions (PR #82751)   Zi Xuan Wu via llvm-commits
• [llvm] [MacroFusion] Support commutable instructions (PR #82751)   Zi Xuan Wu via llvm-commits
• [llvm] [MacroFusion] Support commutable instructions (PR #82751)   Zi Xuan Wu via llvm-commits
• [llvm] [MacroFusion] Support commutable instructions (PR #82751)   Zi Xuan Wu via llvm-commits
• [llvm] [MacroFusion] Support commutable instructions (PR #82751)   Zi Xuan Wu via llvm-commits
• [llvm] [SystemZ][z/OS] Enable lit testing for z/OS (PR #107631)   Zibi Sarbinowski via llvm-commits
• [llvm] [SystemZ][z/OS] Enable lit testing for z/OS (PR #107631)   Zibi Sarbinowski via llvm-commits
• [llvm] [SystemZ][z/OS] Enable lit testing for z/OS (PR #107631)   Zibi Sarbinowski via llvm-commits
• [llvm] [dsymutil] Fix whitespace issues and typo in HelpText. (PR #108310)   Зишан Мирза via llvm-commits
• [llvm] Fix mistake in comment regarding dyn_cast_or_null (PR #108026)   ofri frishman via llvm-commits
• [llvm] Fix mistake in comment regarding dyn_cast_or_null (PR #108026)   ofri frishman via llvm-commits
• [llvm] Fix mistake in comment regarding dyn_cast_or_null (PR #108026)   ofri frishman via llvm-commits
• [llvm] 9347b66 - Reland "[AMDGPU] Graph-based Module Splitting Rewrite (#104763)" (#107076)   via llvm-commits
• [llvm] [ARM] Fix VBICimm and VORRimm generation under Big endian. (PR #107813)   via llvm-commits
• [llvm] [llvm-exegesis] Use MCRegister instead of unsigned to hold registers (PR #107820)   via llvm-commits
• [llvm] 3b1146e - [llvm-exegesis] Use MCRegister instead of unsigned to hold registers (#107820)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Implement selectVaStartAAPCS (PR #106979)   via llvm-commits
• [llvm] [DAG] Fixing the non-optimal code with the following: `select i1 %0, float 1.0, float 0.0`. (PR #107732)   via llvm-commits
• [llvm] [RISCV] Fix same mask vmerge peephole discarding false operand (PR #107827)   via llvm-commits
• [llvm] d57be19 - [AArch64] replace SVE intrinsics with no active lanes with zero (#107413)   via llvm-commits
• [llvm] [AArch64] replace SVE intrinsics with no active lanes with zero (PR #107413)   via llvm-commits
• [llvm] [AMDGPU] eliminate frame index v add wave32 test (PR #107832)   via llvm-commits
• [compiler-rt] [Sanitizer] Call Die() instead of Abort() when failed to reserve shadow memory range (PR #107833)   via llvm-commits
• [compiler-rt] [Sanitizer] Call Die() instead of Abort() when failed to reserve shadow memory range (PR #107833)   via llvm-commits
• [clang] [llvm] Double run offloading (PR #107834)   via llvm-commits
• [clang] [llvm] Double run offloading (PR #107834)   via llvm-commits
• [llvm] [RFC] IR: Define noalias.addrspace metadata (PR #102461)   via llvm-commits
• [llvm] b8b8fbe - [NFC][TableGen] Migrate LLVM Attribute Emitter to const RecordKeeper (#107698)   via llvm-commits
• [lld] [lld][AArch64] Fix getImplicitAddend in big-endian mode. (PR #107845)   via llvm-commits
• [llvm] 959d840 - [AMDGPU] Remove unused SplitGraph::Node::getFullCost   via llvm-commits
• [llvm] [AMDGPU] Fix leak and self-assignment in copy assignment operator (PR #107847)   via llvm-commits
• [llvm] 7a930ce - [DWARF] Emit a minimal line-table for totally empty functions (#107267)   via llvm-commits
• [llvm] Decompos gep of complex type struct to its element type (PR #107848)   via llvm-commits
• [llvm] Decompos gep of complex type struct to its element type (PR #107848)   via llvm-commits
• [llvm] [DWARF] Emit a worst-case prologue_end flag for pathological inputs (PR #107849)   via llvm-commits
• [flang] [llvm] [Frontend][OpenMP] Follow compound construct clause restrictions (PR #107853)   via llvm-commits
• [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)   via llvm-commits
• [llvm] cf8fb43 - [AArch64] Implement NEON vamin/vamax intrinsics (#99041)   via llvm-commits
• [llvm] AArch64: Add FMINNUM_IEEE and FMAXNUM_IEEE support (PR #107855)   via llvm-commits
• [llvm] [ADT] Require base equality in indexed_accessor_iterator::operator==() (PR #107856)   via llvm-commits
• [llvm] [MemCpyOpt] Allow memcpy elision for non-noalias arguments (PR #107860)   via llvm-commits
• [libc] [llvm] [libc][bazel] Update bazel overlay for math functions and their tests. (PR #107862)   via llvm-commits
• [libc] [llvm] [libc][bazel] Update bazel overlay for math functions and their tests. (PR #107862)   via llvm-commits
• [llvm] eaac4a2 - [AMDGPU] Document & Finalize GFX12 Memory Model (#98599)   via llvm-commits
• [llvm] 620b8d9 - [hurd] Fix accessing f_type field of statvfs (#71851)   via llvm-commits
• [llvm] [PowerPC] Utilize getReservedRegs to find asm clobberable registers. (PR #107863)   via llvm-commits
• [llvm] 563dc22 - [Analysis] Avoid repeated hash lookups (NFC) (#107794)   via llvm-commits
• [llvm] 3940a1b - [Float2Int] Avoid repeated hash lookups (NFC) (#107795)   via llvm-commits
• [llvm] ab95ed5 - [IPO] Avoid repeated hash lookups (NFC) (#107796)   via llvm-commits
• [llvm] a2f659c - [StructurizeCFG] Avoid repeated hash lookups (NFC) (#107797)   via llvm-commits
• [llvm] [TableGen] Change CGIOperandList::OperandInfo::Rec to const pointer (PR #107858)   via llvm-commits
• [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)   via llvm-commits
• [llvm] 2d338be - [CodeGen] Refactor DeadMIElim isDead and GISel isTriviallyDead (#105956)   via llvm-commits
• [llvm] AMDGPU: Drop and upgrade llvm.amdgcn.atomic.csub/cond.sub to atomicrmw (PR #105553)   via llvm-commits
• [llvm] [mlir] Add usub_cond and usub_sat operations to atomicrmw (PR #105568)   via llvm-commits
• [llvm] 111932d - [RISCV] Fix same mask vmerge peephole discarding false operand (#107827)   via llvm-commits
• [llvm] e46f03b - [MemProf] Remove unnecessary data structure (NFC) (#107643)   via llvm-commits
• [llvm] [GlobalIsel] update inline-memset.mir test (PR #107874)   via llvm-commits
• [llvm] [GlobalIsel] update inline-memset.mir test (PR #107874)   via llvm-commits
• [llvm] [ARM] Apply sign-return-address attribute to outlined function (PR #107877)   via llvm-commits
• [llvm] [SandboxIR] Boilerplate code (PR #95814)   via llvm-commits
• [llvm] [ARM] Apply sign-return-address attribute to outlined function (PR #107877)   via llvm-commits
• [llvm] [SandboxVec] Implement Pass class (PR #107617)   via llvm-commits
• [llvm] 1651014 - [TableGen] Change SetTheory set/vec to use const Record * (#107692)   via llvm-commits
• [llvm] ea2da57 - [Coroutines] Move the SuspendCrossingInfo analysis helper into its own header/source (#106306)   via llvm-commits
• [llvm] [SPIR-V] Address the case when optimization uses GEP operator and GenCode creates G_PTR_ADD to convey the semantics (PR #107880)   via llvm-commits
• [llvm] [AMDGPU] Overload image atomic swap to allow float as well. (PR #107283)   via llvm-commits
• [llvm] 914ab36 - [AMDGPU] Overload image atomic swap to allow float as well. (#107283)   via llvm-commits
• [llvm] [AMDGPU] Overload image atomic swap to allow float as well. (PR #107283)   via llvm-commits
• [llvm] [SandboxVec] Implement Pass class (PR #107617)   via llvm-commits
• [llvm] [llvm/llvm-project][Coroutines] Move spill related methods to a Spill utils (PR #107884)   via llvm-commits
• [llvm] [InitUndef] Don't use largest super class (PR #107885)   via llvm-commits
• [llvm] [SandboxVec] Implement Pass class (PR #107617)   via llvm-commits
• [llvm] [SandboxVec] Implement Pass class (PR #107617)   via llvm-commits
• [lld] 5c8fd1e - [lld][WebAssembly] Fix use of uninitialized stack data with --wasm64 (#107780)   via llvm-commits
• [llvm] [AMDGPU] Simplify and improve codegen for llvm.amdgcn.set.inactive (PR #107889)   via llvm-commits
• [llvm] 60f052e - [CMake] Passthrough variables for packages to subbuilds (#107611)   via llvm-commits
• [llvm] 7d37172 - [NFCI][BitcodeReader]Read real GUID from VI as opposed to storing it in map (#107735)   via llvm-commits
• [llvm] c36c462 - [LTO] Simplify calculateCallGraphRoot (NFC) (#107765)   via llvm-commits
• [llvm] [SandboxVec] Implement Pass class (PR #107617)   via llvm-commits
• [llvm] [SystemZ][z/OS] Enable lit testing for z/OS (PR #107631)   via llvm-commits
• [llvm] [bolt][tests] Skip tests that use perf when perf counters are unavailable (PR #107892)   via llvm-commits
• [llvm] [SandboxVec] Implement Pass class (PR #107617)   via llvm-commits
• [llvm] 7543d09 - [llvm-ml] Fix RIP-relative addressing for ptr operands (#107618)   via llvm-commits
• [llvm] [Transform] Remove redundant condition (PR #107893)   via llvm-commits
• [llvm] [VPlan] Add initial loop-invariant code motion transform. (PR #107894)   via llvm-commits
• [llvm] Improving ThinLTO error message for inline assembly errors (PR #102211)   via llvm-commits
• [compiler-rt] [llvm] Recommit "[FunctionAttrs] deduce attr `cold` on functions if all CG paths call a `cold` function" (PR #105559)   via llvm-commits
• [llvm] [llvm-exegesis] Refactor getting register number from name to LLVMState (PR #107895)   via llvm-commits
• [llvm] [SandboxVec] Implement Pass class (PR #107617)   via llvm-commits
• [llvm] [SandboxVec] Implement Pass class (PR #107617)   via llvm-commits
• [llvm] 6850410 - [Coverage] Ignore unused functions if the count is 0. (#107661)   via llvm-commits
• [libc] [llvm] [libc][bazel] Update bazel overlay for math functions and their tests. (PR #107862)   via llvm-commits
• [llvm] 09b231c - Re-apply "[NFCI][LTO][lld] Optimize away symbol copies within LTO global resolution in ELF" (#107792)   via llvm-commits
• [llvm] [MLGO] Fix logging verbosity in scripts (PR #107818)   via llvm-commits
• [llvm] [LLVM][Coroutines] Switch CoroAnnotationElidePass to a FunctionPass (PR #107897)   via llvm-commits
• [llvm] a7c26aa - Revert "[Coverage] Ignore unused functions if the count is 0." (#107901)   via llvm-commits
• [compiler-rt] [llvm] Revert "[Coverage] Ignore unused functions if the count is 0." (PR #107901)   via llvm-commits
• [llvm] 99ea357 - [MLGO] Fix logging verbosity in scripts (#107818)   via llvm-commits
• [llvm] 78c1009 - [NFC][TableGen] DirectiveEmitter code cleanup (#107775)   via llvm-commits
• [llvm] eec1ee8 - [SystemZ][z/OS] Enable lit testing for z/OS (#107631)   via llvm-commits
• [compiler-rt] [scudo] Add fragmentation info for each memory group (PR #107475)   via llvm-commits
• [compiler-rt] [scudo] Add fragmentation info for each memory group (PR #107475)   via llvm-commits
• [llvm] ab82f83 - [LTO][NFC] Fix forward declaration (#107902)   via llvm-commits
• [llvm] [SandboxIR][Bench] Benchmark RUOW (PR #107456)   via llvm-commits
• [compiler-rt] [scudo] Update secondary cache time-based release logic. (PR #107507)   via llvm-commits
• [compiler-rt] [scudo] Update secondary cache time-based release logic. (PR #107507)   via llvm-commits
• [compiler-rt] [scudo] Update secondary cache time-based release logic. (PR #107507)   via llvm-commits
• [llvm] [GlobalIsel] Update MIR gallery (PR #107903)   via llvm-commits
• [llvm] [SandboxIR] Add missing VectorType functions (PR #107650)   via llvm-commits
• [llvm] [SandboxIR] Add missing VectorType functions (PR #107650)   via llvm-commits
• [llvm] [SandboxIR] Add missing VectorType functions (PR #107650)   via llvm-commits
• [llvm] [SandboxIR] Add missing VectorType functions (PR #107650)   via llvm-commits
• [clang] [clang-tools-extra] [llvm] [SystemZ][z/OS] Propagate IsText parameter to open text files as text (PR #107906)   via llvm-commits
• [llvm] [SandboxIR] Add missing VectorType functions (PR #107650)   via llvm-commits
• [llvm] [RISCV] Separate more of scalar FP in CC_RISCV. (PR #107908)   via llvm-commits
• [llvm] goldsteinn/lower setcc and shifts (PR #107910)   via llvm-commits
• [llvm] goldsteinn/lower setcc and shifts (PR #107910)   via llvm-commits
• [llvm] [X86] Handle shifts + and in `LowerSELECTWithCmpZero` (PR #107910)   via llvm-commits
• [llvm] [X86] Handle shifts + and in `LowerSELECTWithCmpZero` (PR #107910)   via llvm-commits
• [llvm] [X86] Handle shifts + and in `LowerSELECTWithCmpZero` (PR #107910)   via llvm-commits
• [llvm] 985600d - [TableGen] Migrate CodeGenHWModes to use const RecordKeeper (#107851)   via llvm-commits
• [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)   via llvm-commits
• [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)   via llvm-commits
• [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)   via llvm-commits
• [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)   via llvm-commits
• [llvm] [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (PR #95305)   via llvm-commits
• [llvm] [SimplifyCFG] Preserve common TBAA metadata when hoisting instructions. (PR #97158)   via llvm-commits
• [clang] [lld] [llvm] [clang][MIPS] Add support for mipsel-windows-* targets (PR #107744)   via llvm-commits
• [llvm] 3f22756 - [DirectX] Lower `@llvm.dx.typedBufferLoad` to DXIL ops   via llvm-commits
• [compiler-rt] 53a81d4 - Reland [asan][windows] Eliminate the static asan runtime on windows (#107899)   via llvm-commits
• [llvm] [SandboxIR] Add missing VectorType functions (PR #107650)   via llvm-commits
• [llvm] [InstCombine] Fold fmod to frem if we know it does not set errno. (PR #107912)   via llvm-commits
• [llvm] [SandboxIR] Add missing VectorType functions (PR #107650)   via llvm-commits
• [llvm] 6f8d278 - [SandboxIR] Add missing VectorType functions (#107650)   via llvm-commits
• [llvm] [SandboxIR] Add missing VectorType functions (PR #107650)   via llvm-commits
• [clang] [llvm] [RFC][BPF] Do atomic_fetch_*() pattern matching with memory ordering (PR #107343)   via llvm-commits
• [clang] [llvm] [RFC][BPF] Do atomic_fetch_*() pattern matching with memory ordering (PR #107343)   via llvm-commits
• [clang] [llvm] [RFC][BPF] Do atomic_fetch_*() pattern matching with memory ordering (PR #107343)   via llvm-commits
• [compiler-rt] d9a9960 - [scudo] Add fragmentation info for each memory group (#107475)   via llvm-commits
• [compiler-rt] [scudo] Add fragmentation info for each memory group (PR #107475)   via llvm-commits
• [clang] [llvm] [RFC][BPF] Do atomic_fetch_*() pattern matching with memory ordering (PR #107343)   via llvm-commits
• [clang] [llvm] [RFC][BPF] Do atomic_fetch_*() pattern matching with memory ordering (PR #107343)   via llvm-commits
• [llvm] 66e9078 - [LTO] Fix a use-after-free in legacy LTO C APIs (#107896)   via llvm-commits
• [llvm] Use TargetABI to assign default-target features in getDefaultSubtargetFeatures (PR #100833)   via llvm-commits
• [llvm] It is really the byte order of the target that matters (PR #107915)   via llvm-commits
• [llvm] It is really the byte order of the target that matters (PR #107915)   via llvm-commits
• [llvm] It is really the byte order of the target that matters (PR #107915)   via llvm-commits
• [llvm] [WebAssembly] Add assembly support for final EH proposal (PR #107917)   via llvm-commits
• [llvm] a9a5a18 - [SPIRV] Add sign intrinsic part 1 (#101987)   via llvm-commits
• [llvm] [MemProf] Streamline and avoid unnecessary context id duplication (PR #107918)   via llvm-commits
• [llvm] bdf0224 - [TableGen] Change CGIOperandList::OperandInfo::Rec to const pointer (#107858)   via llvm-commits
• [llvm] [NVPTX] Restrict combining to properly aligned v16i8 vectors. (PR #107919)   via llvm-commits
• [clang] [llvm] [clang][hlsl] Add atan2 intrinsic part 1 (PR #107923)   via llvm-commits
• [clang] [llvm] [clang][hlsl] Add atan2 intrinsic part 1 (PR #107923)   via llvm-commits
• [llvm] [InstCombine] Improve folds for `and/or cmp, cmp` (PR #72965)   via llvm-commits
• [llvm] [ValueTracking] Implement `isKnownNonZero`/`computeKnownBits` for `llvm.vector.reduce.{add,mul}` (PR #88410)   via llvm-commits
• [llvm] [X86] Handle shifts + and in `LowerSELECTWithCmpZero` (PR #107910)   via llvm-commits
• [compiler-rt] [Fuzzer] Passthrough zlib CMake paths into the test (PR #107926)   via llvm-commits
• [llvm] [DSE] Optimizing shrinking of memory intrinsic (PR #106425)   via llvm-commits
• [compiler-rt] [scudo] Fix the logic of MaxAllowedFragmentedPages (PR #107927)   via llvm-commits
• [compiler-rt] [scudo] Fix the logic of MaxAllowedFragmentedPages (PR #107927)   via llvm-commits
• [compiler-rt] [scudo] Fix the logic of MaxAllowedFragmentedPages (PR #107927)   via llvm-commits
• [llvm] [SandboxVec] Implement Pass class (PR #107617)   via llvm-commits
• [llvm] [InstCombine] Extend folding of aggregate construction to cases when source aggregates are partially available (PR #100828)   via llvm-commits
• [llvm] [SandboxVec] Implement Pass class (PR #107617)   via llvm-commits
• [llvm] f12e10b - [SandboxVec] Implement Pass class (#107617)   via llvm-commits
• [llvm] [SandboxVec] Implement Pass class (PR #107617)   via llvm-commits
• [lld] [LLD][COFF][NFC] Create import thunks in ImportFile::parse. (PR #107929)   via llvm-commits
• [lld] [LLD][COFF][NFC] Create import thunks in ImportFile::parse. (PR #107929)   via llvm-commits
• [llvm] [SandboxIR] Implement FixedVectorType (PR #107930)   via llvm-commits
• [lld] [LLD][COFF] Add support for ARM64EC import call thunks. (PR #107931)   via llvm-commits
• [llvm] [SandboxVec] Implement Pass class (PR #107617)   via llvm-commits
• [llvm] [SandboxIR] PassManager (PR #107932)   via llvm-commits
• [llvm] Add DIExpression::foldConstantMath to CoroSplit (PR #107933)   via llvm-commits
• [llvm] [SandboxIR] PassManager (PR #107932)   via llvm-commits
• [compiler-rt] [NFC][sanitizer] Extract GetDTLSRange (PR #107934)   via llvm-commits
• [llvm] 26b786a - [NVPTX] Restrict combining to properly aligned v16i8 vectors. (#107919)   via llvm-commits
• [llvm] [X86] Handle shifts + and in `LowerSELECTWithCmpZero` (PR #107910)   via llvm-commits
• [llvm] [SandboxIR] Implement FixedVectorType (PR #107930)   via llvm-commits
• [llvm] [SandboxIR] Implement FixedVectorType (PR #107930)   via llvm-commits
• [llvm] [SandboxIR] Implement FixedVectorType (PR #107930)   via llvm-commits
• [clang] [llvm] [NVPTX] Remove nvvm.bitcast.* intrinsics (PR #107936)   via llvm-commits
• [llvm] [SandboxIR] PassManager (PR #107932)   via llvm-commits
• [llvm] [SandboxIR] PassManager (PR #107932)   via llvm-commits
• [llvm] [SandboxIR] PassManager (PR #107932)   via llvm-commits
• [llvm] ae02211 - [SandboxIR] Implement UndefValue (#107628)   via llvm-commits
• [llvm] [SandboxIR] Implement UndefValue (PR #107628)   via llvm-commits
• [llvm] [SandboxIR] Implement BlockAddress (PR #107940)   via llvm-commits
• [compiler-rt] 81ef8e2 - [NFC][sanitizer] Extract GetDTLSRange (#107934)   via llvm-commits
• [clang] [lld] [llvm] [clang][MIPS] Add support for mipsel-windows-* targets (PR #107744)   via llvm-commits
• [llvm] b0d2411 - [NVPTX] Support copysign PTX instruction (#107800)   via llvm-commits
• [llvm] [RISCV] Don't outline pcrel_lo when the function has a section prefix (PR #107943)   via llvm-commits
• [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)   via llvm-commits
• [llvm] 3b22618 - [ctx_prof] Insert the ctx prof flattener after the module inliner (#107499)   via llvm-commits
• [llvm] [IR] Make UnaryInstruction::classof recognize FreezeInst. (PR #107944)   via llvm-commits
• [llvm] [LoongArch][ISel] Check the number of sign bits in `PatGprGpr_32` (PR #107432)   via llvm-commits
• [llvm] a111f91 - [LoongArch][ISel] Check the number of sign bits in `PatGprGpr_32` (#107432)   via llvm-commits
• [llvm] [IR] Make UnaryInstruction::classof recognize FreezeInst. (PR #107944)   via llvm-commits
• [clang] [llvm] [RFC][BPF] Do atomic_fetch_*() pattern matching with memory ordering (PR #107343)   via llvm-commits
• [clang] [llvm] [RFC][BPF] Do atomic_fetch_*() pattern matching with memory ordering (PR #107343)   via llvm-commits
• [clang] [llvm] [RFC][BPF] Do atomic_fetch_*() pattern matching with memory ordering (PR #107343)   via llvm-commits
• [clang] [llvm] [RFC][BPF] Do atomic_fetch_*() pattern matching with memory ordering (PR #107343)   via llvm-commits
• [clang] [llvm] [RFC][BPF] Do atomic_fetch_*() pattern matching with memory ordering (PR #107343)   via llvm-commits
• [clang] [llvm] [RFC][BPF] Do atomic_fetch_*() pattern matching with memory ordering (PR #107343)   via llvm-commits
• [clang] [llvm] [RFC][BPF] Do atomic_fetch_*() pattern matching with memory ordering (PR #107343)   via llvm-commits
• [llvm] [TableGen] Change CodeGenInstruction record members to const (PR #107921)   via llvm-commits
• [llvm] f7479b5 - [NFC][TableGen] Simplify DirectiveEmitter using range for loops (#107909)   via llvm-commits
• [llvm] [LoongArch][ISel] Check the number of sign bits in `PatGprGpr_32` (PR #107432)   via llvm-commits
• [llvm] [loongarch][DAG][FREEZE] Fix crash when FREEZE a half(f16) type on loongarch (PR #107791)   via llvm-commits
• [llvm] 1ca411c - [LoongArch] Codegen for concat_vectors with LASX   via llvm-commits
• [llvm] [LoongArch] Codegen for concat_vectors with LASX (PR #107523)   via llvm-commits
• [llvm] [LoongArch] Codegen for concat_vectors with LASX (PR #107523)   via llvm-commits
• [llvm] [bazel][libc][NFC] Add missing layering deps (PR #107947)   via llvm-commits
• [llvm] [LoongArch] Codegen for concat_vectors with LASX (PR #107523)   via llvm-commits
• [llvm] [DSE] Split memory intrinsics if they are dead in the middle (PR #75478)   via llvm-commits
• [llvm] [DSE] Split memory intrinsics if they are dead in the middle (PR #75478)   via llvm-commits
• [llvm] [DSE] Split memory intrinsics if they are dead in the middle (PR #75478)   via llvm-commits
• [llvm] [DSE] Split memory intrinsics if they are dead in the middle (PR #75478)   via llvm-commits
• [llvm] [DSE] Split memory intrinsics if they are dead in the middle (PR #75478)   via llvm-commits
• [llvm] [LoongArch] Codegen for concat_vectors with LASX (PR #107523)   via llvm-commits
• [llvm] [MemCpyOpt] Allow memcpy elision for non-noalias arguments (PR #107860)   via llvm-commits
• [llvm] 761bf33 - [LLVM][Coroutines] Switch CoroAnnotationElidePass to a FunctionPass (#107897)   via llvm-commits
• [compiler-rt] eb0e4b1 - [Fuzzer] Passthrough zlib CMake paths into the test (#107926)   via llvm-commits
• [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)   via llvm-commits
• [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)   via llvm-commits
• [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)   via llvm-commits
• [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)   via llvm-commits
• [llvm] ffcff4a - [ValueTracking] Infer is-power-of-2 from assumptions. (#107745)   via llvm-commits
• [llvm] [llvm][Docs] Update guide to include ``pip install lit`` (PR #106526)   via llvm-commits
• [llvm] [loongarch][DAG][FREEZE] Fix crash when FREEZE a half(f16) type on loongarch (PR #107791)   via llvm-commits
• [llvm] [bazel][libc][NFC] Add missing layering deps (PR #107947)   via llvm-commits
• [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)   via llvm-commits
• [llvm] [bazel][libc][NFC] Add missing dep for standalone compile (PR #107957)   via llvm-commits
• [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)   via llvm-commits
• [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)   via llvm-commits
• [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)   via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)   via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)   via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)   via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)   via llvm-commits
• [llvm] 094e6b8 - [IR] Make UnaryInstruction::classof recognize FreezeInst. (#107944)   via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)   via llvm-commits
• [llvm] [LoongArch] Eliminate the redundant sign extension of division (PR #107971)   via llvm-commits
• [llvm] [LoongArch] Eliminate the redundant sign extension of division (PR #107971)   via llvm-commits
• [llvm] [LoongArch] Eliminate the redundant sign extension of division (PR #107971)   via llvm-commits
• [llvm] [LoongArch] Eliminate the redundant sign extension of division (PR #107971)   via llvm-commits
• [llvm] [mlir] [tosa-fuser] Affine Fusion Pass (PR #107383)   via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)   via llvm-commits
• [clang-tools-extra] [llvm] Full path names are used in several unittests instead of the binary name. Fix up the testcase failures (PR #107974)   via llvm-commits
• [clang-tools-extra] [llvm] Full path names are used in several unittests instead of the binary name. Fix up the testcase failures (PR #107974)   via llvm-commits
• [clang-tools-extra] [llvm] Full path names are used in several unittests instead of the binary name. Fix up the testcase failures (PR #107974)   via llvm-commits
• [llvm] 06c3311 - [PowerPC] Implement llvm.set.rounding intrinsic (#67302)   via llvm-commits
• [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)   via llvm-commits
• [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)   via llvm-commits
• [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)   via llvm-commits
• [llvm] bece0d7 - [GlobalIsel] Update MIR gallery (#107903)   via llvm-commits
• [llvm] 1c334de - [llvm][Support] Determine the max thread length on Haiku (#107801)   via llvm-commits
• [llvm] [LoongArch] Eliminate the redundant sign extension of division (PR #107971)   via llvm-commits
• [clang] [llvm] [sanitizer] Document AddressSanitizer security considerations (PR #100937)   via llvm-commits
• [clang] [llvm] [sanitizer] Document AddressSanitizer security considerations (PR #100937)   via llvm-commits
• [compiler-rt] [sanitizer] Disable writes to log files for binaries in a secure context. (PR #92593)   via llvm-commits
• [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)   via llvm-commits
• [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)   via llvm-commits
• [llvm] [NFC][EarlyIfConverter] Turn SSAIfConv into a local variable (PR #107390)   via llvm-commits
• [llvm] [LLVM Demangler] Set `InConstraintExpr` to `true` when demangling a c… (PR #107385)   via llvm-commits
• [llvm] [LLVM Demangler] Set `InConstraintExpr` to `true` when demangling a c… (PR #107385)   via llvm-commits
• [llvm] [WebAssembly] Misc. refactoring in AsmTypeCheck (NFC) (PR #107978)   via llvm-commits
• [libcxxabi] [llvm] [LLVM Demangler] Set `InConstraintExpr` to `true` when demangling a c… (PR #107385)   via llvm-commits
• [llvm] [WebAssembly] Add a colon to type error message (PR #107980)   via llvm-commits
• [llvm] [MIPS] Fix -msingle-float doesn't work with double on O32 (PR #107543)   via llvm-commits
• [libcxxabi] [llvm] [LLVM Demangler] Set `InConstraintExpr` to `true` when demangling a c… (PR #107385)   via llvm-commits
• [llvm] [MIPS] Fix -msingle-float doesn't work with double on O32 (PR #107543)   via llvm-commits
• [libcxxabi] [llvm] [LLVM Demangler] Set `InConstraintExpr` to `true` when demangling a c… (PR #107385)   via llvm-commits
• [libcxxabi] [llvm] [LLVM Demangler] Set `InConstraintExpr` to `true` when demangling a c… (PR #107385)   via llvm-commits
• [libcxxabi] [llvm] [LLVM Demangler] Set `InConstraintExpr` to `true` when demangling a c… (PR #107385)   via llvm-commits
• [libcxxabi] [llvm] [LLVM Demangler] Set `InConstraintExpr` to `true` when demangling a c… (PR #107385)   via llvm-commits
• [libcxxabi] [llvm] [LLVM Demangler] Set `InConstraintExpr` to `true` when demangling a c… (PR #107385)   via llvm-commits
• [libcxxabi] [llvm] [LLVM Demangler] Set `InConstraintExpr` to `true` when demangling a c… (PR #107385)   via llvm-commits
• [libcxxabi] [llvm] [LLVM Demangler] Set `InConstraintExpr` to `true` when demangling a c… (PR #107385)   via llvm-commits
• [libcxxabi] [llvm] [LLVM Demangler] Set `InConstraintExpr` to `true` when demangling a c… (PR #107385)   via llvm-commits
• [libcxxabi] [llvm] [LLVM Demangler] Set `InConstraintExpr` to `true` when demangling a c… (PR #107385)   via llvm-commits
• [libcxxabi] [llvm] [LLVM Demangler] Set `InConstraintExpr` to `true` when demangling a c… (PR #107385)   via llvm-commits
• [llvm] 918222b - [MLIR] Add f6E3M2FN type (#105573)   via llvm-commits
• [llvm] [DAG] Fold trunc(srl(extract_elt(vec,c1),c2)) -> extract_elt(bitcast(vec),c3) (PR #107987)   via llvm-commits
• [llvm] [DAG] Fold trunc(srl(extract_elt(vec,c1),c2)) -> extract_elt(bitcast(vec),c3) (PR #107987)   via llvm-commits
• [llvm] 0f47e3a - [LoongArch] Eliminate the redundant sign extension of division (#107971)   via llvm-commits
• [llvm] [LoongArch] Eliminate the redundant sign extension of division (PR #107971)   via llvm-commits
• [libcxxabi] [llvm] [LLVM Demangler] Set `InConstraintExpr` to `true` when demangling a c… (PR #107385)   via llvm-commits
• [llvm] [LoongArch] Eliminate the redundant sign extension of division (PR #107971)   via llvm-commits
• [llvm] [LoongArch] Eliminate the redundant sign extension of division (PR #107971)   via llvm-commits
• [libcxxabi] [llvm] [LLVM Demangler] Set `InConstraintExpr` to `true` when demangling a c… (PR #107385)   via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle] Set `InConstraintExpr` to `true` when demangling a c… (PR #107385)   via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle] Set `InConstraintExpr` to `true` when demangling a c… (PR #107385)   via llvm-commits
• [llvm] [LoongArch] Eliminate the redundant sign extension of division (PR #107971)   via llvm-commits
• [llvm] bf69484 - [VectorCombine] Add type shrinking and zext propagation for fixed-width vector types (#104606)   via llvm-commits
• [llvm] edbe8fa - [llvm][Docs] Update guide to include ``pip install lit`` (#106526)   via llvm-commits
• [llvm] [llvm][Docs] Update guide to include ``pip install lit`` (PR #106526)   via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle] Set `InConstraintExpr` to `true` when demangling a c… (PR #107385)   via llvm-commits
• [compiler-rt] [NFC][ASan] Replace calls to Report() and Die() with ReportIncompatibleRT() in AsanCheckIncompatibleRT() (PR #107991)   via llvm-commits
• [compiler-rt] [NFC][ASan] Replace calls to Report() and Die() with ReportIncompatibleRT() in AsanCheckIncompatibleRT() (PR #107991)   via llvm-commits
• [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)   via llvm-commits
• [llvm] a794ee4 - [VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (#95305)   via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle] Set `InConstraintExpr` to `true` when demangling a c… (PR #107385)   via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle] Set `InConstraintExpr` to `true` when demangling a c… (PR #107385)   via llvm-commits
• [llvm] [RISCV] Rematerialize vmv.v.x (PR #107993)   via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle] Set `InConstraintExpr` to `true` when demangling a c… (PR #107385)   via llvm-commits
• [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)   via llvm-commits
• [clang] [llvm] [Clang][LLVM][AArch64] Add intrinsic for MOVT SME2 instruction (PR #97602)   via llvm-commits
• [clang] [llvm] [Clang][LLVM][AArch64] Add intrinsic for LUTI4 SME2 instruction (PR #97755)   via llvm-commits
• [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)   via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle] Set `InConstraintExpr` to `true` when demangling a c… (PR #107385)   via llvm-commits
• [llvm] [ValueTracking] Infer is-power-of-2 from dominating conditions (PR #107994)   via llvm-commits
• [llvm] 23595d1 - [AArch64] Lower __builtin_bswap16 to rev16 if bswap followed by any_extend (#105375)   via llvm-commits
• [llvm] [AArch64] Lower __builtin_bswap16 to rev16 if bswap followed by any_extend (PR #105375)   via llvm-commits
• [llvm] 516f08b - [LLVM][AArch64] Refactor sve-b16b16 instruction definitions. (#107265)   via llvm-commits
• [llvm] [Mips] Fix mfhi/mflo hazard miscompilation about div and mult (PR #91449)   via llvm-commits
• [llvm] [Mips] Fix mfhi/mflo hazard miscompilation about div and mult (PR #91449)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Implement selectVaStartAAPCS (PR #106979)   via llvm-commits
• [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)   via llvm-commits
• [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)   via llvm-commits
• [llvm] 44556e6 - [amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic (#105822)   via llvm-commits
• [lld] daf2085 - [lld][AArch64] Fix getImplicitAddend in big-endian mode. (#107845)   via llvm-commits
• [llvm] [GlobalIsel][NFC] update inline-memset.mir test (PR #108006)   via llvm-commits
• [llvm] [RISCV] Rematerialize vfmv.v.f (PR #108007)   via llvm-commits
• [llvm] b0ffaa7 - [AArch64] Prevent the AArch64LoadStoreOptimizer from reordering CFI instructions (#101317)   via llvm-commits
• [llvm] [RISCV] Rematerialize vmv.s.x and vfmv.s.f (PR #108012)   via llvm-commits
• [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)   via llvm-commits
• [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)   via llvm-commits
• [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)   via llvm-commits
• [llvm] [SPIR-V] Emit DebugTypeBasic for NonSemantic DI (PR #106980)   via llvm-commits
• [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)   via llvm-commits
• [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)   via llvm-commits
• [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)   via llvm-commits
• [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)   via llvm-commits
• [llvm] [SPIR-V] Emit DebugTypeBasic for NonSemantic DI (PR #106980)   via llvm-commits
• [llvm] [SPIR-V] Emit DebugTypeBasic for NonSemantic DI (PR #106980)   via llvm-commits
• [llvm] [LoopVectorize] Amend check for IV increments in collectUsersInEntryB… (PR #108020)   via llvm-commits
• [llvm] 0ccc609 - [VectorCombine] Add foldShuffleOfIntrinsics. (#106502)   via llvm-commits
• [llvm] [InstCombine] Fold mul (lshr exact (X, N)), 2^N + 1 -> add (X , lshr exact (X, N)) (PR #95042)   via llvm-commits
• [clang] [compiler-rt] [llvm] [FMV][AArch64] Unify ls64, ls64_v and ls64_accdata. (PR #108024)   via llvm-commits
• [llvm] Fix mistake in comment regarding dyn_cast_or_null (PR #108026)   via llvm-commits
• [llvm] Fix mistake in comment regarding dyn_cast_or_null (PR #108026)   via llvm-commits
• [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)   via llvm-commits
• [llvm] 69828c4 - [GlobalIsel][NFC] update inline-memset.mir test (#108006)   via llvm-commits
• [llvm] bca2b6d - [SPIR-V] Expose an API call to initialize SPIRV target and translate input LLVM IR module to SPIR-V (#107216)   via llvm-commits
• [lld] [lld][AArch64] Fix getImplicitAddend in big-endian mode. (PR #107845)   via llvm-commits
• [llvm] 0f52545 - [CGData][MachineOutliner] Global Outlining (#90074)   via llvm-commits
• [llvm] [AMDGPU] Fix selection of s_load_b96 on GFX11 (PR #108029)   via llvm-commits
• [llvm] 5823ac0 - [llvm-exegesis] Refactor getting register number from name to LLVMState (#107895)   via llvm-commits
• [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)   via llvm-commits
• [llvm] [SPIR-V] Emit DebugTypeBasic for NonSemantic DI (PR #106980)   via llvm-commits
• [llvm] [ConstraintElim] Generalize IV logic to chain of exiting blocks. (PR #108031)   via llvm-commits
• [llvm] [SPIR-V] Emit DebugTypeBasic for NonSemantic DI (PR #106980)   via llvm-commits
• [clang] [llvm] [RFC][BPF] Do atomic_fetch_*() pattern matching with memory ordering (PR #107343)   via llvm-commits
• [clang] [llvm] [RFC][BPF] Do atomic_fetch_*() pattern matching with memory ordering (PR #107343)   via llvm-commits
• [llvm] [mlir] [ADT] Make DenseMap/DenseSet more resilient agains OOM situations (PR #107251)   via llvm-commits
• [llvm] [mlir] [ADT] Make DenseMap/DenseSet more resilient agains OOM situations (PR #107251)   via llvm-commits
• [compiler-rt] [rtsan] Ensure pthread is initialized in test (PR #108040)   via llvm-commits
• [llvm] 56a0334 - [Attributor] Keep track of reached returns in AAPointerInfo (#107479)   via llvm-commits
• [llvm] bf68403 - Attempt to fix [CGData][MachineOutliner] Global Outlining (#90074) (#108037)   via llvm-commits
• [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)   via llvm-commits
• [llvm] [SandboxIR] PassManager (PR #107932)   via llvm-commits
• [llvm] AArch64: Add FMINNUM_IEEE and FMAXNUM_IEEE support (PR #107855)   via llvm-commits
• [llvm] Fix for Attempt to fix [CGData][MachineOutliner] Global Outlining (#90074) #108037 (PR #108047)   via llvm-commits
• [llvm] Fix for Attempt to fix [CGData][MachineOutliner] Global Outlining (#90074) #108037 (PR #108047)   via llvm-commits
• [llvm] ba2aa1d - Fix for Attempt to fix [CGData][MachineOutliner] Global Outlining (#90074) #108037 (#108047)   via llvm-commits
• [llvm] [llvm] Support llvm::Any across shared libraries on windows (PR #108051)   via llvm-commits
• [llvm] [llvm] Support llvm::Any across shared libraries on windows (PR #108051)   via llvm-commits
• [llvm] Fix for llvm/test/CodeGen/RISCV/O3-pipeline.ll (PR #108050)   via llvm-commits
• [llvm] 2cfdcfb - Fix for llvm/test/CodeGen/RISCV/O3-pipeline.ll (#108050)   via llvm-commits
• [llvm] 14b4356 - [RISCV] Separate more of scalar FP in CC_RISCV. NFC (#107908)   via llvm-commits
• [clang] [llvm] [Clang][LLVM][AArch64] Add intrinsic for LUTI4 SME2 instruction (PR #97755)   via llvm-commits
• [clang] [llvm] [Clang][LLVM][AArch64] Add intrinsic for LUTI4 SME2 instruction (PR #97755)   via llvm-commits
• [clang] [llvm] [Clang][LLVM][AArch64] Add intrinsic for LUTI4 SME2 instruction (PR #97755)   via llvm-commits
• [clang] [llvm] [Clang][LLVM][AArch64] Add intrinsic for LUTI4 SME2 instruction (PR #97755)   via llvm-commits
• [clang] [llvm] [Clang][LLVM][AArch64] Add intrinsic for LUTI4 SME2 instruction (PR #97755)   via llvm-commits
• [llvm] [offload] Fix link issues when LLVM_LINK_LLVM_DYLIB on (PR #106583)   via llvm-commits
• [llvm] Revert "[amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic" (PR #108054)   via llvm-commits
• [llvm] c7a7767 - Revert "[amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic" (#108054)   via llvm-commits
• [llvm] DO NOT MERGE: Reland "[amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic" (PR #108055)   via llvm-commits
• [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)   via llvm-commits
• [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)   via llvm-commits
• [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)   via llvm-commits
• [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)   via llvm-commits
• [llvm] 524a028 - [MemProf] Streamline and avoid unnecessary context id duplication (#107918)   via llvm-commits
• [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)   via llvm-commits
• [compiler-rt] [rtsan][compiler-rt] Add 64 bit file interceptors, test for _FILE_OFFSET_BITS (PR #108057)   via llvm-commits
• [compiler-rt] [compiler-rt][NFC] Add preprocessor definitions for 64 bit file interceptors that were missing (PR #108059)   via llvm-commits
• [llvm] 7fb19cb - [ADT] Require base equality in indexed_accessor_iterator::operator==() (#107856)   via llvm-commits
• [llvm] Reland [llvm-ml] Fix RIP-relative addressing for ptr operands (PR #108061)   via llvm-commits
• [llvm] 90e8411 - [DirectX] Lower `@llvm.dx.typedBufferStore` to DXIL ops   via llvm-commits
• [llvm] [X86][AVX10.2] Support AVX10.2-COMEF new instructions. (PR #108063)   via llvm-commits
• [llvm] [X86][AVX10.2] Support AVX10.2-COMEF new instructions. (PR #108063)   via llvm-commits
• [llvm] [X86][AVX10.2] Support AVX10.2-COMEF new instructions. (PR #108063)   via llvm-commits
• [llvm] [ValueTracking] Infer is-power-of-2 from dominating conditions (PR #107994)   via llvm-commits
• [llvm] [X86][AVX10.2] Support AVX10.2-COMEF new instructions. (PR #108063)   via llvm-commits
• [llvm] [X86][AVX10.2] Support AVX10.2-COMEF new instructions. (PR #108063)   via llvm-commits
• [llvm] [InstCombine] Replace an integer comparison of a `phi` node with multiple `ucmp`/`scmp` operands and a constant with `phi` of individual comparisons of original intrinsic's arguments (PR #107769)   via llvm-commits
• [llvm] c8ed2b8 - [WebAssembly] Add a colon to type error message (#107980)   via llvm-commits
• [llvm] [AMDGPU][MC] Implement fft and rotate modes for ds_swizzle_b32 (PR #108064)   via llvm-commits
• [llvm] [AMDGPU][MC] Implement fft and rotate modes for ds_swizzle_b32 (PR #108064)   via llvm-commits
• [llvm] Revert "[NVPTX] Support copysign PTX instruction (#107800)" (PR #108066)   via llvm-commits
• [llvm] 22067a8 - [PowerPC] Fix assert exposed by PR 95931 in LowerBITCAST (#108062)   via llvm-commits
• [llvm] 02c943a - Revert "[NVPTX] Support copysign PTX instruction (#107800)" (#108066)   via llvm-commits
• [llvm] 7a91af4 - Add DIExpression::foldConstantMath to CoroSplit (#107933)   via llvm-commits
• [llvm] [PowerPC] Fix assert exposed by PR 95931 in LowerBITCAST (PR #108062)   via llvm-commits
• [llvm] [LLVM][NVPTX] Add support for tensormap.cp_fenceproxy (PR #107555)   via llvm-commits
• [clang] [lld] [llvm] [clang][MIPS] Add support for mipsel-windows-* targets (PR #107744)   via llvm-commits
• [clang] [llvm] [RFC][BPF] Do atomic_fetch_*() pattern matching with memory ordering (PR #107343)   via llvm-commits
• [compiler-rt] [rtsan][compiler-rt] Add 64 bit file interceptors, test for _FILE_OFFSET_BITS (PR #108057)   via llvm-commits
• [compiler-rt] [rtsan] Ensure pthread is initialized in test (PR #108040)   via llvm-commits
• [compiler-rt] [compiler-rt][rtsan] Improve error message wording to match ASan style (PR #107620)   via llvm-commits
• [llvm] update llvm-dis header with available options (PR #108073)   via llvm-commits
• [llvm] becb03f - [DirectX] Add DirectXTargetCodeGenInfo (#104856)   via llvm-commits
• [llvm] [gn] Sync some chromium flags on windows (PR #108074)   via llvm-commits
• [llvm] f4e2d7b - [Coroutines] Move spill related methods to a Spill utils (#107884)   via llvm-commits
• [llvm] [gn] Sync some chromium flags on windows (PR #108074)   via llvm-commits
• [llvm] delete MF.verify from PPCMIPeephole pass (PR #108075)   via llvm-commits
• [llvm] [Coroutines] Split buildCoroutineFrame into normalization and frame building (PR #108076)   via llvm-commits
• [llvm] [Coroutines] Split buildCoroutineFrame into normalization and frame building (PR #108076)   via llvm-commits
• [compiler-rt] 0b12cd2 - [rtsan] Ensure pthread is initialized in test (#108040)   via llvm-commits
• [llvm] [SandboxIR] PassManager (PR #107932)   via llvm-commits
• [llvm] [SandboxIR] PassManager (PR #107932)   via llvm-commits
• [llvm] [SandboxIR] Fix base class of FenceInst. Verify instructions when building a BB in debug mode. (PR #108078)   via llvm-commits
• [llvm] [SandboxIR] Fix base class of FenceInst. Verify instructions when building a BB in debug mode. (PR #108078)   via llvm-commits
• [llvm] [SandboxIR] Fix base class of FenceInst. Verify instructions when building a BB in debug mode. (PR #108078)   via llvm-commits
• [llvm] [SandboxIR] Fix base class of FenceInst. Verify instructions when building a BB in debug mode. (PR #108078)   via llvm-commits
• [llvm] 3363760 - [SandboxIR] PassManager (#107932)   via llvm-commits
• [llvm] [SandboxIR] PassManager (PR #107932)   via llvm-commits
• [clang-tools-extra] [llvm] Full path names are used in several unittests instead of the binary name. Fix up the testcase failures (PR #107974)   via llvm-commits
• [llvm] [InstCombine] Use the select condition to try to constant fold binops into select (PR #84696)   via llvm-commits
• [llvm] [llvm-debuginfod-find] Enable multicall driver (PR #108082)   via llvm-commits
• [llvm] [llvm-debuginfod-find] Enable multicall driver (PR #108082)   via llvm-commits
• [llvm] 0f56ba1 - [llvm-lit] Process ANSI color codes in test output when formatting (#106776)   via llvm-commits
• [llvm] [SandboxIR] Pass registry (PR #108084)   via llvm-commits
• [llvm] delete MF.verify from PPCMIPeephole pass (PR #108075)   via llvm-commits
• [llvm] delete MF.verify from PPCMIPeephole pass (PR #108075)   via llvm-commits
• [llvm] Use TargetABI to assign default-target features in getDefaultSubtargetFeatures (PR #100833)   via llvm-commits
• [llvm] [MemProf] Convert CallContextInfo to a struct (NFC) (PR #108086)   via llvm-commits
• [llvm] [DirectX] Implement typedBufferLoad_checkbit (PR #108087)   via llvm-commits
• [llvm] LAA: generalize strides over unequal type sizes (PR #108088)   via llvm-commits
• [llvm] [DirectX] Preserve value names in DXILOpLowering. NFC (PR #108089)   via llvm-commits
• [llvm] [RISC-V][GISEL] Select G_BITCAST for scalable vectors (PR #101486)   via llvm-commits
• [llvm] [COFF] Add MIPS relocation types (PR #107814)   via llvm-commits
• [llvm] [DirectX] Implement typedBufferLoad_checkbit (PR #108087)   via llvm-commits
• [llvm] [SandboxIR] Pass registry (PR #108084)   via llvm-commits
• [llvm] [SandboxIR] Pass registry (PR #108084)   via llvm-commits
• [llvm] [SandboxIR] Pass registry (PR #108084)   via llvm-commits
• [compiler-rt] 5a2071b - [compiler-rt][rtsan] Improve error message wording to match ASan style (#107620)   via llvm-commits
• [llvm] LAA: improve code in a couple of routines (NFC) (PR #108092)   via llvm-commits
• [llvm] 5495c36 - [WebAssembly] Misc. refactoring in AsmTypeCheck (NFC) (#107978)   via llvm-commits
• [compiler-rt] [scudo] Fix the logic of MaxAllowedFragmentedPages (PR #107927)   via llvm-commits
• [compiler-rt] [scudo] Fix the logic of MaxAllowedFragmentedPages (PR #107927)   via llvm-commits
• [compiler-rt] [scudo] Fix the logic of MaxAllowedFragmentedPages (PR #107927)   via llvm-commits
• [llvm] ace6d5f - [SandboxIR] Fix base class of FenceInst. Verify instructions when building a BB in debug mode. (#108078)   via llvm-commits
• [llvm] [Coroutines] Verify normalization was not missed (PR #108096)   via llvm-commits
• [llvm] 2ddf21b - [SandboxIR] Pass registry (#108084)   via llvm-commits
• [llvm] [SandboxIR] Pass registry (PR #108084)   via llvm-commits
• [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)   via llvm-commits
• [compiler-rt] [scudo] Add EnableMultiRegions mode (PR #98076)   via llvm-commits
• [compiler-rt] [scudo] Add EnableMultiRegions mode (PR #98076)   via llvm-commits
• [compiler-rt] [scudo] Add EnableMultiRegions mode (PR #98076)   via llvm-commits
• [compiler-rt] [scudo] Add EnableMultiRegions mode (PR #98076)   via llvm-commits
• [compiler-rt] [scudo] Add EnableMultiRegions mode (PR #98076)   via llvm-commits
• [compiler-rt] [scudo] Add EnableMultiRegions mode (PR #98076)   via llvm-commits
• [compiler-rt] [scudo] Add EnableMultiRegions mode (PR #98076)   via llvm-commits
• [llvm] [RISCV] Expand mul X, C where C=2^N*(3, 5, 9)*(3, 5, 9) (PR #108100)   via llvm-commits
• [llvm] [RISCV] Expand mul X, C where C=2^N*(3, 5, 9)*(3, 5, 9) (PR #108100)   via llvm-commits
• [llvm] [llvm-lit] Process ANSI color codes in test output when formatting (PR #106776)   via llvm-commits
• [compiler-rt] 957af73 - [sanitizer] Add CHECKs to validate calculated TLS range (#107941)   via llvm-commits
• [llvm] [SandboxIR][PassRegistry] Parse pipeline string (PR #108103)   via llvm-commits
• [llvm] Revert "[llvm-lit] Process ANSI color codes in test output when formatting" (PR #108104)   via llvm-commits
• [llvm] [SandboxIR] Implement FixedVectorType (PR #107930)   via llvm-commits
• [llvm] 6007ad7 - Revert "[llvm-lit] Process ANSI color codes in test output when formatting" (#108104)   via llvm-commits
• [llvm] Bail out jump threading on indirect branches (PR #103688)   via llvm-commits
• [compiler-rt] [compiler-rt] Hardcode uptr/sptr typedefs on Linux Arm (PR #108105)   via llvm-commits
• [llvm] d14a600 - [SandboxIR] Implement BlockAddress (#107940)   via llvm-commits
• [llvm] [SandboxIR] Implement BlockAddress (PR #107940)   via llvm-commits
• [compiler-rt] [compiler-rt] Hardcode uptr/sptr typedefs on Linux Arm (PR #108105)   via llvm-commits
• [llvm] [SandboxIR] Implement ConstantTokenNone (PR #108106)   via llvm-commits
• [llvm] [SandboxIR] Implement FixedVectorType (PR #107930)   via llvm-commits
• [llvm] [SandboxIR] Implement FixedVectorType (PR #107930)   via llvm-commits
• [llvm] Reland "[llvm-lit] Process ANSI color codes in test output when forma… (PR #108107)   via llvm-commits
• [llvm] bb72865 - [SandboxIR] Implement FixedVectorType (#107930)   via llvm-commits
• [llvm] [SandboxIR] Implement FixedVectorType (PR #107930)   via llvm-commits
• [llvm] Reland "[llvm-lit] Process ANSI color codes in test output when forma… (PR #108107)   via llvm-commits
• [llvm] [X86] Speed up X86 Domain Reassignment pass by early return (PR #108108)   via llvm-commits
• [llvm] [X86] Speed up X86 Domain Reassignment pass by early return (PR #108108)   via llvm-commits
• [llvm] [LLVM][NVPTX] Add support for tensormap.cp_fenceproxy (PR #107555)   via llvm-commits
• [compiler-rt] [scudo] Fix the logic of MaxAllowedFragmentedPages (PR #107927)   via llvm-commits
• [compiler-rt] [scudo] Fix the logic of MaxAllowedFragmentedPages (PR #107927)   via llvm-commits
• [llvm] [LTO] Remove unused includes (NFC) (PR #108110)   via llvm-commits
• [llvm] [HWASan] optimize AttrInfer fix for selective HWASan (PR #108111)   via llvm-commits
• [llvm] [LV]Initial support for safe distance in predicated DataWithEVL vectorization mode. (PR #102897)   via llvm-commits
• [llvm] [LV]Initial support for safe distance in predicated DataWithEVL vectorization mode. (PR #102897)   via llvm-commits
• [llvm] [LV]Initial support for safe distance in predicated DataWithEVL vectorization mode. (PR #102897)   via llvm-commits
• [llvm] [LV]Initial support for safe distance in predicated DataWithEVL vectorization mode. (PR #102897)   via llvm-commits
• [llvm] [LV]Initial support for safe distance in predicated DataWithEVL vectorization mode. (PR #102897)   via llvm-commits
• [llvm] [LV]Initial support for safe distance in predicated DataWithEVL vectorization mode. (PR #102897)   via llvm-commits
• [llvm] [LV]Initial support for safe distance in predicated DataWithEVL vectorization mode. (PR #102897)   via llvm-commits
• [llvm] [LV]Initial support for safe distance in predicated DataWithEVL vectorization mode. (PR #102897)   via llvm-commits
• [llvm] [LV]Initial support for safe distance in predicated DataWithEVL vectorization mode. (PR #102897)   via llvm-commits
• [llvm] [LV]Initial support for safe distance in predicated DataWithEVL vectorization mode. (PR #102897)   via llvm-commits
• [llvm] [LV]Initial support for safe distance in predicated DataWithEVL vectorization mode. (PR #102897)   via llvm-commits
• [llvm] [LV]Initial support for safe distance in predicated DataWithEVL vectorization mode. (PR #102897)   via llvm-commits
• [llvm] [LV]Initial support for safe distance in predicated DataWithEVL vectorization mode. (PR #102897)   via llvm-commits
• [llvm] [LV]Initial support for safe distance in predicated DataWithEVL vectorization mode. (PR #102897)   via llvm-commits
• [llvm] [LV]Initial support for safe distance in predicated DataWithEVL vectorization mode. (PR #102897)   via llvm-commits
• [llvm] [LV]Initial support for safe distance in predicated DataWithEVL vectorization mode. (PR #102897)   via llvm-commits
• [llvm] [LV]Initial support for safe distance in predicated DataWithEVL vectorization mode. (PR #102897)   via llvm-commits
• [llvm] [LV]Initial support for safe distance in predicated DataWithEVL vectorization mode. (PR #102897)   via llvm-commits
• [llvm] [LV]Initial support for safe distance in predicated DataWithEVL vectorization mode. (PR #102897)   via llvm-commits
• [llvm] [LV]Initial support for safe distance in predicated DataWithEVL vectorization mode. (PR #102897)   via llvm-commits
• [llvm] [LV]Initial support for safe distance in predicated DataWithEVL vectorization mode. (PR #102897)   via llvm-commits
• [llvm] [LV]Initial support for safe distance in predicated DataWithEVL vectorization mode. (PR #102897)   via llvm-commits
• [llvm] [LV]Initial support for safe distance in predicated DataWithEVL vectorization mode. (PR #102897)   via llvm-commits
• [compiler-rt] Revert "[sanitizer] Add CHECKs to validate calculated TLS range" (PR #108112)   via llvm-commits
• [compiler-rt] 5804193 - Revert "[sanitizer] Add CHECKs to validate calculated TLS range" (#108112)   via llvm-commits
• [llvm] 829ea59 - [docs] Add a section on AI-generated content to the developer policy (#91014)   via llvm-commits
• [llvm] ae5f1a7 - [MemProf] Convert CallContextInfo to a struct (NFC) (#108086)   via llvm-commits
• [llvm] [SandboxIR] Add remaining SelectInst methods and track swapValues() (PR #108114)   via llvm-commits
• [compiler-rt] db7e8f2 - [compiler-rt] Hardcode uptr/sptr typedefs on Linux Arm (#108105)   via llvm-commits
• [llvm] [WebAssembly] Support BUILD_VECTOR with F16x8. (PR #108117)   via llvm-commits
• [llvm] [WebAssembly] Fix lane index size for f16x8 extract_lane. (PR #108118)   via llvm-commits
• [llvm] [WebAssembly] Add load and store patterns for V8F16. (PR #108119)   via llvm-commits
• [compiler-rt] [NFC][sanitizer] Remove DTLS_on_libc_memalign (PR #108120)   via llvm-commits
• [clang] [llvm] [HLSL] Implement elementwise popcount (PR #108121)   via llvm-commits
• [clang] [llvm] [HLSL] Implement elementwise popcount (PR #108121)   via llvm-commits
• [compiler-rt] 6e854a6 - [scudo] Fix the logic of MaxAllowedFragmentedPages (#107927)   via llvm-commits
• [compiler-rt] [scudo] Fix the logic of MaxAllowedFragmentedPages (PR #107927)   via llvm-commits
• [compiler-rt] Reland "[sanitizer] Add CHECKs to validate calculated TLS range" (PR #108122)   via llvm-commits
• [llvm] 68f31aa - [ORC][Runtime] Add `dlupdate` for MachO (#97441)   via llvm-commits
• [llvm] [SandboxIR] Implement ScalableVectorType (PR #108124)   via llvm-commits
• [llvm] [SandboxIR] Implement ScalableVectorType (PR #108124)   via llvm-commits
• [llvm] [CodeGen] Fix documentation for ISD::ATOMIC_STORE (PR #108126)   via llvm-commits
• [llvm] Reland "[NVPTX] Support copysign PTX instruction" (PR #108125)   via llvm-commits
• [llvm] [CodeGen] Fix documentation for ISD::ATOMIC_STORE (PR #108126)   via llvm-commits
• [llvm] [SandboxIR] Implement ScalableVectorType (PR #108124)   via llvm-commits
• [llvm] 77fc8da - [RISCV] Rematerialize vmv.v.x (#107993)   via llvm-commits
• [llvm] [ARM] Fix VBICimm and VORRimm generation under Big endian. (PR #107813)   via llvm-commits
• [llvm] [SandboxIR] Implement ScalableVectorType (PR #108124)   via llvm-commits
• [llvm] [SandboxIR] Add remaining SelectInst methods and track swapValues() (PR #108114)   via llvm-commits
• [llvm] [SandboxIR] Add remaining SelectInst methods and track swapValues() (PR #108114)   via llvm-commits
• [llvm] [SandboxIR] Add remaining SelectInst methods and track swapValues() (PR #108114)   via llvm-commits
• [llvm] c641b61 - MIPSr6: Add llvm.is.fpclasss intrinsic support (#107857)   via llvm-commits
• [llvm] 21a0176 - [RISCV] Rematerialize vfmv.v.f (#108007)   via llvm-commits
• [llvm] [llvm-debuginfod-find] Enable multicall driver (PR #108082)   via llvm-commits
• [llvm] [llvm-debuginfod-find] Enable multicall driver (PR #108082)   via llvm-commits
• [llvm] [MIPS] Fix -msingle-float doesn't work with double on O32 (PR #107543)   via llvm-commits
• [llvm] 933fc63 - [RISCV] Rematerialize vmv.s.x and vfmv.s.f (#108012)   via llvm-commits
• [llvm] 1253001 - [RISCV] Add reductions to list of roots in tryToReduceVL (#107595)   via llvm-commits
• [llvm] 5773adb - SelectionDAG: Remove unneeded getSelectCC in expandFMINIMUMNUM_FMAXIMUMNUM (#107416)   via llvm-commits
• [compiler-rt] Revert "[scudo] Fix the logic of MaxAllowedFragmentedPages" (PR #108130)   via llvm-commits
• [compiler-rt] Revert "[scudo] Fix the logic of MaxAllowedFragmentedPages" (PR #108130)   via llvm-commits
• [compiler-rt] Revert "[scudo] Fix the logic of MaxAllowedFragmentedPages" (PR #108130)   via llvm-commits
• [compiler-rt] 76151c4 - Revert "[scudo] Fix the logic of MaxAllowedFragmentedPages" (#108130)   via llvm-commits
• [compiler-rt] Revert "[scudo] Fix the logic of MaxAllowedFragmentedPages" (PR #108130)   via llvm-commits
• [llvm] [AArch64] Fix sched model of Neoverse N2 (PR #106376)   via llvm-commits
• [llvm] [SandboxIR] Implement ScalableVectorType (PR #108124)   via llvm-commits
• [compiler-rt] Reapply "[scudo] Fix the logic of MaxAllowedFragmentedPages" (#108130) (PR #108134)   via llvm-commits
• [compiler-rt] Reapply "[scudo] Fix the logic of MaxAllowedFragmentedPages" (#108130) (PR #108134)   via llvm-commits
• [llvm] 3b4e7c9 - [SandboxIR] Implement ScalableVectorType (#108124)   via llvm-commits
• [llvm] [SandboxIR] Implement ScalableVectorType (PR #108124)   via llvm-commits
• [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)   via llvm-commits
• [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)   via llvm-commits
• [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)   via llvm-commits
• [llvm] 3dad29b - [LTO] Remove unused includes (NFC) (#108110)   via llvm-commits
• [llvm] [AMDGPU] Enable reordering of VMEM loads during clustering (PR #107986)   via llvm-commits
• [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)   via llvm-commits
• [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)   via llvm-commits
• [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)   via llvm-commits
• [llvm] [TableGen] Avoid repeated hash lookps (NFC) (PR #108138)   via llvm-commits
• [llvm] [LoopDeletion] Unblock loop deletion with `llvm.experimental.noalias.scope.decl` (PR #108144)   via llvm-commits
• [llvm] [LoopDeletion] Unblock loop deletion with `llvm.experimental.noalias.scope.decl` (PR #108144)   via llvm-commits
• [llvm] [X86][AVX10.2] Support AVX10.2-COMEF new instructions. (PR #108063)   via llvm-commits
• [llvm] 6bbf7f0 - [WebAssembly] Add assembly support for final EH proposal (#107917)   via llvm-commits
• [compiler-rt] 323911d - Reapply "[scudo] Fix the logic of MaxAllowedFragmentedPages" (#108130) (#108134)   via llvm-commits
• [compiler-rt] Reapply "[scudo] Fix the logic of MaxAllowedFragmentedPages" (#108130) (PR #108134)   via llvm-commits
• [llvm] 3c9022c - Bail out jump threading on indirect branches (#103688)   via llvm-commits
• [llvm] Bail out jump threading on indirect branches (PR #103688)   via llvm-commits
• [llvm] bc152fb - [llvm-debuginfod-find] Enable multicall driver (#108082)   via llvm-commits
• [llvm] [llvm-debuginfod-find] Enable multicall driver (PR #108082)   via llvm-commits
• [lld] [lld][WebAssembly]: Restore non-pie dynamic-linking executable (PR #108146)   via llvm-commits
• [llvm] [X86][AVX10.2] Support AVX10.2-COMEF new instructions. (PR #108063)   via llvm-commits
• [llvm] 1e3a24d - [InitUndef] Don't use largest super class (#107885)   via llvm-commits
• [llvm] [MemCpyOpt] Allow memcpy elision for non-noalias arguments (PR #107860)   via llvm-commits
• [llvm] [ADT] Clang-format DenseMap and DenseSet (PR #108162)   via llvm-commits
• [llvm] 2afe678 - [MemCpyOpt] Allow memcpy elision for non-noalias arguments (#107860)   via llvm-commits
• [llvm] [Mips] Add test file for 'xor' and 'and' instructions (PR #106679)   via llvm-commits
• [llvm] [Mips] Add test file for 'xor' and 'and' instructions (PR #106679)   via llvm-commits
• [llvm] [Mips] Add test file for 'xor' and 'and' instructions (PR #106679)   via llvm-commits
• [llvm] b4bb2f8 - [LoopDeletion] Unblock loop deletion with `llvm.experimental.noalias.scope.decl` (#108144)   via llvm-commits
• [llvm] [AMDGPU] Simplify and improve codegen for llvm.amdgcn.set.inactive (PR #107889)   via llvm-commits
• [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)   via llvm-commits
• [llvm] 596e7cc - [RISCV][doc] Add note to RISCVUsage about supported atomics ABIs (#103879)   via llvm-commits
• [llvm] [AMDGPU] Shrink a live interval instead of recomputing it. NFCI. (PR #108171)   via llvm-commits
• [llvm] f4dd1bc - [AMDGPU] Fix leak and self-assignment in copy assignment operator (#107847)   via llvm-commits
• [llvm] Reland "[amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic" (#108054)" (PR #108173)   via llvm-commits
• [llvm] Reland "[amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic" (#108054)" (PR #108173)   via llvm-commits
• [llvm] [LV][NFC] When widening operations with vector-predication intrinsics… (PR #108177)   via llvm-commits
• [llvm] [LV][NFC] When widening operations with vector-predication intrinsics… (PR #108177)   via llvm-commits
• [clang] [lldb] [llvm] Test branch1 (PR #108178)   via llvm-commits
• [llvm] [AArch64] add optimisation for MATCH/NMATCH instruction (PR #108179)   via llvm-commits
• [clang] [lldb] [llvm] Test branch1 (PR #108178)   via llvm-commits
• [llvm] [AArch64] add optimisation for MATCH/NMATCH instruction (PR #108179)   via llvm-commits
• [llvm] [AArch64] add optimisation for MATCH/NMATCH instruction (PR #108179)   via llvm-commits
• [clang] [lldb] [llvm] Test branch1 (PR #108178)   via llvm-commits
• [llvm] [LV][NFC] [LV][NFC] When widening operations with vector-predication intrinsics with explicit vector length, unified printing format (PR #108177)   via llvm-commits
• [llvm] [LV][NFC] [LV][NFC] When widening operations with vector-predication intrinsics with explicit vector length, unified printing format (PR #108177)   via llvm-commits
• [clang] [lldb] [llvm] Test branch1 (PR #108178)   via llvm-commits
• [llvm] SelectionDAG/expandFMINIMUMNUM_FMAXIMUMNUM: FCANONICALIZE is needed only for sNaN (PR #108180)   via llvm-commits
• [clang] [lldb] [llvm] Test branch1 (PR #108178)   via llvm-commits
• [clang] [lldb] [llvm] Test branch1 (PR #108178)   via llvm-commits
• [llvm] [SDAG] Simplify divergence verification (PR #108182)   via llvm-commits
• [lld] 7e0008d - [LLD][COFF][NFC] Create import thunks in ImportFile::parse. (#107929)   via llvm-commits
• [llvm] e1ee07d - [AMDGPU][NewPM] Port SIPeepholeSDWA pass to NPM (#107049)   via llvm-commits
• [llvm] [AArch64] Extend and rewrite load zero and load undef patterns (PR #108185)   via llvm-commits
• [llvm] [X86][AVX10.2] Support AVX10.2-COMEF new instructions. (PR #108063)   via llvm-commits
• [llvm] [AMDGPU] Make more use of getWaveMaskRegClass. NFC. (PR #108186)   via llvm-commits
• [llvm] [AArch64] add optimisation for MATCH/NMATCH instruction (PR #108179)   via llvm-commits
• [llvm] [AArch64] add optimisation for MATCH/NMATCH instruction (PR #108179)   via llvm-commits
• [llvm] [Codegen][LegalizeIntegerTypes] Improve shift through stack (PR #96151)   via llvm-commits
• [llvm] [LV] Vectorize Epilogues for loops with small VF but high IC (PR #108190)   via llvm-commits
• [llvm] [llvm-objcopy][ELF] Disable huge section offset (PR #97036)   via llvm-commits
• [llvm] VPlan/PatternMatch: mark match functions const (NFC) (PR #108191)   via llvm-commits
• [llvm] [AMDGPU] Remove dead code in SIISelLowering (NFC) (PR #108198)   via llvm-commits
• [compiler-rt] [ASan][test] XFAIL global-overflow.cpp etc. on SPARC (PR #108200)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Implement selectVaStartAAPCS (PR #106979)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Implement selectVaStartAAPCS (PR #106979)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Implement selectVaStartAAPCS (PR #106979)   via llvm-commits
• [llvm] [RISCV] Add fixed length vector patterns for vfwmaccbf16.vv (PR #108204)   via llvm-commits
• [compiler-rt] [sanitizer_common][test] Disable sanitizer_coverage_trace_pc_guard.cp… (PR #108206)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Implement selectVaStartAAPCS (PR #106979)   via llvm-commits
• [llvm] ed22029 - [SPIR-V] Address the case when optimization uses GEP operator and GenCode creates G_PTR_ADD to convey the semantics (#107880)   via llvm-commits
• [llvm] Fix for logic in combineExtract() (PR #108208)   via llvm-commits
• [llvm] [NFC][Analysis] Add more SCEV tests for ptr inductions (PR #108210)   via llvm-commits
• [llvm] 49b57df - DXIL: Use correct type ID when writing ValueAsMetadata. (#94337)   via llvm-commits
• [llvm] [LoongArch] Implement Statepoint lowering (PR #108212)   via llvm-commits
• [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)   via llvm-commits
• [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)   via llvm-commits
• [lld] 99a2354 - [LLD][COFF] Add support for ARM64EC import call thunks. (#107931)   via llvm-commits
• [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Implement selectVaStartAAPCS (PR #106979)   via llvm-commits
• [clang] [llvm] [DLCov 4/5] Track coverage and origins through IRBuilder (PR #108214)   via llvm-commits
• [llvm] 5904448 - Avoid exposing password and token from git repositories (#105220)   via llvm-commits
• [llvm] 5f25b89 - [TableGen] Migrate Option Emitters to const RecordKeeper (#107696)   via llvm-commits
• [clang] [llvm] [DLCov 4/5] Track coverage and origins through IRBuilder (PR #108214)   via llvm-commits
• [clang] [llvm] [DLCov 4/5] Track coverage and origins through IRBuilder (PR #108214)   via llvm-commits
• [llvm] ba4bcce - [GlobalIsel] Combine trunc of binop (#107721)   via llvm-commits
• [llvm] [RISCV][GISEL] Legalize G_INSERT and G_EXTRACT for scalable vectors (PR #108220)   via llvm-commits
• [llvm] [AMDGPU] Use std::optional in InstCombine of amdgcn_fmed3. NFC. (PR #108223)   via llvm-commits
• [llvm] 7dfaedf - [TableGen] Avoid repeated hash lookups (NFC) (#108138)   via llvm-commits
• [llvm] 01967e2 - [AMDGPU] Shrink a live interval instead of recomputing it. NFCI. (#108171)   via llvm-commits
• [llvm] [VectorCombine] Fix trunc generated between PHINodes (PR #108228)   via llvm-commits
• [llvm] 7a30b9c - [AMDGPU] Make more use of getWaveMaskRegClass. NFC. (#108186)   via llvm-commits
• [llvm] ccc4fa1 - [TableGen] Fix MacOS failure in Option Emitter. (#108225)   via llvm-commits
• [llvm] [llvm] Fix typo in comments (PR #108230)   via llvm-commits
• [llvm] [llvm] Fix typo in comments (PR #108230)   via llvm-commits
• [llvm] [llvm] Fix typo in comments (PR #108230)   via llvm-commits
• [llvm] [LoopVectorize] Use new getUniqueLatchExitBlock routine (PR #108231)   via llvm-commits
• [llvm] 9a9f155 - [Coroutines] Split buildCoroutineFrame into normalization and frame building (#108076)   via llvm-commits
• [llvm] 65e0574 - [RISCV] Expand mul X, C where C=2^N*(3, 5, 9)*(3, 5, 9) (#108100)   via llvm-commits
• [llvm] [RISCV] Expand bf16 vector truncstores and extloads (PR #108235)   via llvm-commits
• [llvm] 35e27c0 - [AMDGPU][True16][MC] 16bit vsrc and vdst support in MC (#104510)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Implement selectVaStartAAPCS (PR #106979)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Implement selectVaStartAAPCS (PR #106979)   via llvm-commits
• [llvm] [AMDGPU] Fold llvm.amdgcn.cvt.pkrtz when either operand is fpext (PR #108237)   via llvm-commits
• [llvm] [AMDGPU] Fold llvm.amdgcn.cvt.pkrtz when either operand is fpext (PR #108237)   via llvm-commits
• [llvm] ccc52a8 - [AMDGPU] Remove dead code in SIISelLowering (NFC) (#108198)   via llvm-commits
• [llvm] 2a4992e - Fix mistake in comment regarding dyn_cast_or_null (#108026)   via llvm-commits
• [llvm] Fix mistake in comment regarding dyn_cast_or_null (PR #108026)   via llvm-commits
• [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)   via llvm-commits
• [llvm] [SandboxVec] Boilerplate (PR #107431)   via llvm-commits
• [llvm] [NFC] Add explicit #include config.h where its macros are used. (PR #108077)   via llvm-commits
• [llvm] [Coroutines] Move materialization code into its own utils (PR #108240)   via llvm-commits
• [llvm] [Transforms][IPO] Add func suffix in ArgumentPromotion and DeadArgume… (PR #105742)   via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   via llvm-commits
• [llvm] [VPlan] Implement interleaving as VPlan-to-VPlan transform. (PR #95842)   via llvm-commits
• [llvm] 3786568 - [TableGen] Change CodeGenInstruction record members to const (#107921)   via llvm-commits
• [llvm] 2b452b4 - [TableGen] Change SubtargetFeatureInfo to use const Record pointers (#108013)   via llvm-commits
• [llvm] 7c6592f - [TableGen] Change CodeGenRegister to use const Record pointer (#108027)   via llvm-commits
• [llvm] [llvm][ARM]Add ARM widen strings pass (PR #107120)   via llvm-commits
• [compiler-rt] [llvm] [ORC][Runtime] Enhancing ELF Platform with Push-Request Model for Initializers (PR #102846)   via llvm-commits
• [lld] [CGData] LLD for MachO (PR #90166)   via llvm-commits
• [compiler-rt] [llvm] [ORC][Runtime] Enhancing ELF Platform with Push-Request Model for Initializers (PR #102846)   via llvm-commits
• [llvm] ff7eb1d - [AMDGPU] Simplify API of matchFPExtFromF16. NFC. (#108223)   via llvm-commits
• [llvm] 3cfc733 - [ADT][NFC] Clang-format DenseMap and DenseSet (#108162)   via llvm-commits
• [llvm] [Coroutines] Move Shape to its own header (PR #108242)   via llvm-commits
• [llvm] [ADT][NFC] Constexpr-ify if in DenseMap::clear (PR #108243)   via llvm-commits
• [clang] [compiler-rt] [libcxx] [lldb] [llvm] Rename Sanitizer Coverage => Coverage Sanitizer (PR #106505)   via llvm-commits
• [llvm] e55d6f5 - [AMDGPU] Simplify and improve codegen for llvm.amdgcn.set.inactive (#107889)   via llvm-commits
• [compiler-rt] [llvm] [ORC][Runtime] Enhancing ELF Platform with Push-Request Model for Initializers (PR #102846)   via llvm-commits
• [llvm] [RISCV] Expand bf16 FNEG/FABS/FCOPYSIGN (PR #108245)   via llvm-commits
• [llvm] [X86][AVX10.2] Support AVX10.2-COMEF new instructions. (PR #108063)   via llvm-commits
• [llvm] 866b93e - [RISCV] Don't outline pcrel_lo when the function has a section prefix (#107943)   via llvm-commits
• [llvm] [X86][AVX10.2] Support AVX10.2-COMEF new instructions. (PR #108063)   via llvm-commits
• [llvm] 415288a - [WebAssembly] Add load and store patterns for V8F16. (#108119)   via llvm-commits
• [llvm] [RISCV][GISEL] Legalize G_INSERT_VECTOR_ELT (PR #108250)   via llvm-commits
• [llvm] [RISCV][GISEL] Legalize G_INSERT_VECTOR_ELT (PR #108250)   via llvm-commits
• [llvm] c076638 - [WebAssembly] Support BUILD_VECTOR with F16x8. (#108117)   via llvm-commits
• [llvm] [DebugInfo] Don't apply is_stmt on MBB branches that preserve lines (PR #108251)   via llvm-commits
• [llvm] [gn] Add "/Zc:preprocessor" build flag on windows (PR #108252)   via llvm-commits
• [llvm] [libc][bazel] Enable epoll_pwait2 on bazel (PR #108254)   via llvm-commits
• [compiler-rt] [lsan] Fix free(NULL) interception during initialization (PR #106912)   via llvm-commits
• [compiler-rt] [lsan] Fix free(NULL) interception during initialization (PR #106912)   via llvm-commits
• [llvm] [RISCV] Don't outline pcrel_lo when the function has a section prefix (PR #107943)   via llvm-commits
• [llvm] [RISCV] Don't outline pcrel_lo when the function has a section prefix (PR #107943)   via llvm-commits
• [llvm] update P7 v4i8 load cost (PR #108261)   via llvm-commits
• [llvm] update P7 v4i8 load cost (PR #108261)   via llvm-commits
• [llvm] update P7 v4i8 load cost (PR #108261)   via llvm-commits
• [lld] [lld][WebAssembly] Reject shared libraries when `-static`/`-Bstatic` is used (PR #108263)   via llvm-commits
• [libc] [llvm] [libc] Fix undefined behavior for nan functions. (PR #106468)   via llvm-commits
• [llvm] [libc][bazel] Enable epoll_pwait2 on bazel (PR #108254)   via llvm-commits
• [lld] [lld][WebAssembly] -r: force -Bstatic (PR #108264)   via llvm-commits
• [lld] [lld][WebAssembly] -r: force -Bstatic (PR #108264)   via llvm-commits
• [llvm] [ctx_prof] Relax the "profile use" case around `PGOOpt` (PR #108265)   via llvm-commits
• [lld] be770ed - [lld][WebAssembly] Reject shared libraries when `-static`/`-Bstatic` is used (#108263)   via llvm-commits
• [llvm] e3f936e - Don't rely on undefined behavior to store how a `User` object's allocation is laid out (#105714)   via llvm-commits
• [llvm] [SandboxIR][Bench] Add tests with tracking enabled (PR #108273)   via llvm-commits
• [llvm] c3d39cb - [ADT][NFC] Constexpr-ify if in DenseMap::clear (#108243)   via llvm-commits
• [compiler-rt] [scudo] Add thread-safety annotation on getMemoryGroupFragmentationIn… (PR #108277)   via llvm-commits
• [compiler-rt] [scudo] Add thread-safety annotation on getMemoryGroupFragmentationIn… (PR #108277)   via llvm-commits
• [llvm] [SandboxIR][Bench] Add tests with tracking enabled (PR #108273)   via llvm-commits
• [compiler-rt] [scudo] Add thread-safety annotation on getMemoryGroupFragmentationIn… (PR #108277)   via llvm-commits
• [llvm] [SandboxIR][Bench] Add tests with tracking enabled (PR #108273)   via llvm-commits
• [llvm] 0cfa5ab - [SandboxIR][Bench] Add tests with tracking enabled (#108273)   via llvm-commits
• [llvm] [SandboxIR][Bench] Add tests with tracking enabled (PR #108273)   via llvm-commits
• [llvm] [SandboxIR][Bench] SandboxIR creation (PR #108278)   via llvm-commits
• [llvm] [SandboxIR][Bench] SandboxIR creation (PR #108278)   via llvm-commits
• [llvm] [SandboxIR][Bench] SandboxIR creation (PR #108278)   via llvm-commits
• [llvm] [RISCV] Generalize RISCVDAGToDAGISel::selectFPImm to handle bitcasts from int to FP. (PR #108284)   via llvm-commits
• [llvm] [SCCP] Add testcase with indirect gotos (PR #102347)   via llvm-commits
• [llvm] [SCCP] Add testcase with indirect gotos (PR #102347)   via llvm-commits
• [llvm] 956591b - [SandboxIR] Add remaining SelectInst methods and track swapValues() (#108114)   via llvm-commits
• [llvm] [RISCV] Don't outline pcrel_lo when the function has a section prefix (PR #107943)   via llvm-commits
• [llvm] 9c0ba62 - [ctx_prof] Relax the "profile use" case around `PGOOpt` (#108265)   via llvm-commits
• [llvm] Bail out jump threading on indirect branches (PR #103688)   via llvm-commits
• [compiler-rt] [rtsan] Fix va_args handling in open functions (PR #108291)   via llvm-commits
• [compiler-rt] 63d8bd2 - [scudo] Add thread-safety annotation on getMemoryGroupFragmentationIn… (#108277)   via llvm-commits
• [compiler-rt] [scudo] Add thread-safety annotation on getMemoryGroupFragmentationIn… (PR #108277)   via llvm-commits
• [llvm] [tools][llvm-as] Fix file input extension description (PR #108295)   via llvm-commits
• [compiler-rt] ec7c8cd - [compiler-rt][NFC] Add preprocessor definitions for 64 bit file interceptors that were missing (#108059)   via llvm-commits
• [compiler-rt] [NFC][sanitizer] Commit test for #106912 (PR #108289)   via llvm-commits
• [llvm] [RISCV] Lower f16/bf16 splat_vector by bitcasting to i16 instead of promoting to f16. (PR #108298)   via llvm-commits
• [compiler-rt] 1797174 - [NFC][sanitizer] Commit test for #106912 (#108289)   via llvm-commits
• [compiler-rt] [lsan] Fix free(NULL) interception during initialization (PR #106912)   via llvm-commits
• [compiler-rt] [lsan] Fix free(NULL) interception during initialization (PR #106912)   via llvm-commits
• [llvm] [SandboxIR][Bench] SandboxIR creation (PR #108278)   via llvm-commits
• [llvm] [AMDGPU] Avoid unneded waitcounts before spill stores (PR #108303)   via llvm-commits
• [llvm] 07a7bdc - [WebAssembly] Fix lane index size for f16x8 extract_lane. (#108118)   via llvm-commits
• [llvm] 31d4837 - [SandboxIR][Bench] SandboxIR creation (#108278)   via llvm-commits
• [llvm] [SandboxIR][Bench] SandboxIR creation (PR #108278)   via llvm-commits
• [compiler-rt] ae0ed3d - [lsan] Fix free(NULL) interception during initialization (#106912)   via llvm-commits
• [clang-tools-extra] [llvm] [llvm] add support for mustache templating language (PR #105893)   via llvm-commits
• [clang-tools-extra] [llvm] [llvm] add support for mustache templating language (PR #105893)   via llvm-commits
• [llvm] 1b3e64a - [RISCV][TTI] Add vp.cmp intrinsic cost with functionalOPC. (#107504)   via llvm-commits
• [llvm] [Coroutines] Make CoroSplit properly update CallGraph (PR #107935)   via llvm-commits
• [llvm] 34e20f1 - [DirectX] Implement typedBufferLoad_checkbit (#108087)   via llvm-commits
• [clang] [llvm] Add step builtins and step HLSL function to DirectX and SPIR-V backend (PR #106471)   via llvm-commits
• [lld] [LLD][COFF] Add support for ARM64EC auxiliary IAT (PR #108304)   via llvm-commits
• [llvm] 8287831 - Reland "[llvm-lit] Process ANSI color codes in test output when forma… (#108107)   via llvm-commits
• [llvm] [GlobalIsel] Combine zext of trunc (episode II) (PR #108305)   via llvm-commits
• [llvm] [dsymutil] Fix whitespace issues and typo in HelpText. (PR #108310)   via llvm-commits
• [llvm] [dsymutil] Fix whitespace issues and typo in HelpText. (PR #108310)   via llvm-commits
• [llvm] [LegacyPM][DirectX] Add legacy scalarizer back for use in the DirectX backend (PR #107427)   via llvm-commits
• [llvm] [dsymutil] Fix whitespace issues and typo in HelpText. (PR #108310)   via llvm-commits
• [llvm] workflows/commit-access-review: Use get_collaborators() function (PR #108313)   via llvm-commits
• [llvm] [X86] Recognize VPXORDZrr as a zero-idiom on Znver4 (PR #108314)   via llvm-commits
• [llvm] Decompos gep of complex type struct to its element type (PR #107848)   via llvm-commits
• [llvm] [SandboxIR] Implement ConstantTokenNone (PR #108106)   via llvm-commits
• [llvm] [SandboxIR] Implement ConstantTokenNone (PR #108106)   via llvm-commits
• [llvm] 3d12901 - [DirectX] Preserve value names in DXILOpLowering. NFC (#108089)   via llvm-commits
• [llvm] [RISCV] Expand Zfa fli+fneg cases during lowering instead of during isel. (PR #108316)   via llvm-commits
• [llvm] c9ab697 - [SandboxIR] Implement ConstantTokenNone (#108106)   via llvm-commits
• [llvm] [SandboxIR] Implement ConstantTokenNone (PR #108106)   via llvm-commits
• [llvm] [LoongArch] Implement Statepoint lowering (PR #108212)   via llvm-commits
• [llvm] [SandboxIR] Implement GlobalValue (PR #108317)   via llvm-commits
• [llvm] [llvm] Fix typo in comments (PR #108230)   via llvm-commits
• [llvm] Fixes #104875 (PR #107741)   via llvm-commits
• [llvm] [WIP][SPARC] Allow overaligned `alloca`s (PR #107223)   via llvm-commits
• [llvm] [WIP][SPARC] Allow overaligned `alloca`s (PR #107223)   via llvm-commits
• [llvm] [SimplifyCFG] Avoid increasing too many phi entries when removing empty blocks (PR #104887)   via llvm-commits
• [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)   via llvm-commits
• [llvm] Optimize fptrunc(x)>=C1 --> x>=C2 (PR #99475)   via llvm-commits
• [llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)   via llvm-commits
• [llvm] [Mips] Fix mfhi/mflo hazard miscompilation about div and mult (PR #91449)   via llvm-commits
• [llvm] [Mips] Fix mfhi/mflo hazard miscompilation about div and mult (PR #91449)   via llvm-commits
• [llvm] [Mips] Fix mfhi/mflo hazard miscompilation about div and mult (PR #91449)   via llvm-commits
• [llvm] [LV][NFC] When widening operations with vector-predication intrinsics with explicit vector length, unified printing format (PR #108177)   via llvm-commits
• [llvm] 08740a6 - [CodeGen] Fix documentation for ISD::ATOMIC_STORE. NFC (#108126)   via llvm-commits
• [llvm] [CodeGen] Fix documentation for ISD::ATOMIC_STORE. NFC (PR #108126)   via llvm-commits
• [llvm] 8c17ed1 - [RISCV] Generalize RISCVDAGToDAGISel::selectFPImm to handle bitcasts from int to FP. (#108284)   via llvm-commits
• [compiler-rt] [asan][windows] use __builtin_function_address to avoid problematic codegen in weak function registration (PR #108327)   via llvm-commits
• [clang] [llvm] [SanitizerCoverage] Add an option to gate the invocation of the tracing callbacks (PR #108328)   via llvm-commits
• [clang] [llvm] [SanitizerCoverage] Add an option to gate the invocation of the tracing callbacks (PR #108328)   via llvm-commits
• [clang] [llvm] [SanitizerCoverage] Add an option to gate the invocation of the tracing callbacks (PR #108328)   via llvm-commits
• [compiler-rt] [asan][windows] use __builtin_function_address to avoid problematic codegen in weak function registration (PR #108327)   via llvm-commits
• [compiler-rt] [asan] add the new/delete code back to RTAsan_dynamic (PR #108329)   via llvm-commits
• [llvm] [SandboxVec] Boilerplate (PR #107431)   via llvm-commits
• [llvm] cbcf531 - [RISCV] Expand bf16 FNEG/FABS/FCOPYSIGN (#108245)   via llvm-commits
• [llvm] b2e8b8f - [RISCV] Lower f16/bf16 splat_vector by bitcasting to i16 instead of promoting to f32. (#108298)   via llvm-commits
• [llvm] Changing `auto` to `auto&` to avoid unnecessary copies (PR #108335)   via llvm-commits
• [llvm] Changing `auto` to `const auto&` to avoid unnecessary copies (PR #108335)   via llvm-commits
• [llvm] e2723c2 - [InitUndef] Only compute DeadLaneDetector if subreg liveness enabled (NFC) (#108279)   via llvm-commits
• [llvm] c22b68c - [ItaniumDemangle] Set `InConstraintExpr` to `true` when demangling a constraint expression (#107385)   via llvm-commits
• [llvm] [MIPS] Fix -msingle-float doesn't work with double on O32 (PR #107543)   via llvm-commits
• [llvm] 703ebca - Reland "[amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic" (#108054)" (#108173)   via llvm-commits
• [llvm] [MIPS] Fix -msingle-float doesn't work with double on O32 (PR #107543)   via llvm-commits
• [llvm] [RISCV] Lower bf16 {S,U}INT_TO_FP, FP_TO_{S,U}INT and VP variants (PR #108338)   via llvm-commits
• [llvm] Changing `auto` to `const auto&` to avoid unnecessary copies (PR #108335)   via llvm-commits
• [compiler-rt] b07f1be - [sanitizer] Remove DTLS_on_libc_memalign (#108120)   via llvm-commits
• [llvm] Revert "Reland "[amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic" (#108054)"" (PR #108341)   via llvm-commits
• [llvm] Revert "Reland "[amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic" (#108054)"" (PR #108341)   via llvm-commits
• [clang] [llvm] Delete the clang-format Visual Studio plugin code (PR #108342)   via llvm-commits
• [clang] [llvm] Delete the clang-format Visual Studio plugin code (PR #108342)   via llvm-commits
• [llvm] [X86][AVX10.2] Support AVX10.2-COMEF new instructions. (PR #108063)   via llvm-commits
• [llvm] [X86][AVX10.2] Support AVX10.2-COMEF new instructions. (PR #108063)   via llvm-commits
• [llvm] 7792b4a - Revert "Reland "[amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic" (#108054)"" (#108341)   via llvm-commits
• [llvm] [gn] Add "/Zc:preprocessor" build flag on windows (PR #108252)   via llvm-commits
• [compiler-rt] [sanitizer] Change GetDTLSRange (PR #108345)   via llvm-commits
• [llvm] [gn] Add "/Zc:preprocessor" build flag on windows (PR #108252)   via llvm-commits
• [llvm] [gn] Add "/Zc:preprocessor" build flag on windows (PR #108252)   via llvm-commits
• [llvm] [AMDGPU] GCNHazardRecognizer: refactor getWaitStatesSince (NFCI) (PR #108347)   via llvm-commits
• [llvm] [gn] Add "/Zc:preprocessor" build flag on windows (PR #108252)   via llvm-commits
• [llvm] SelectionDAG: Support nofpclass (PR #108350)   via llvm-commits
• [llvm] 128bb29 - [gn] Add "/Zc:preprocessor" build flag on windows when using cl.exe (#108252)   via llvm-commits
• [llvm] [gn] Add "/Zc:preprocessor" build flag on windows (PR #108252)   via llvm-commits
• [llvm] 958a337 - [VectorCombine] Fix trunc generated between PHINodes (#108228)   via llvm-commits
• [llvm] [LV][EVL] Support cast instruction with EVL-vectorization (PR #108351)   via llvm-commits
• [llvm] [LV][EVL] Support cast instruction with EVL-vectorization (PR #108351)   via llvm-commits
• [clang] [llvm] [alpha.webkit.NoUncheckedPtrMemberChecker] Introduce member variable checker for CheckedPtr/CheckedRef (PR #108352)   via llvm-commits
• [llvm] [LV][EVL] Support cast instruction with EVL-vectorization (PR #108351)   via llvm-commits
• [llvm] [InitUndef] Enable the InitUndef pass on all targets (PR #108353)   via llvm-commits
• [clang] [llvm] [alpha.webkit.NoUncheckedPtrMemberChecker] Introduce member variable checker for CheckedPtr/CheckedRef (PR #108352)   via llvm-commits
• [llvm] [LV][EVL] Support cast instruction with EVL-vectorization (PR #108351)   via llvm-commits
• [clang-tools-extra] [llvm] [llvm] add support for mustache templating language (PR #105893)   via llvm-commits
• [llvm] ffcebcd - [LoongArch] Implement Statepoint lowering (#108212)   via llvm-commits
• [libcxx] [libcxxabi] [libunwind] [llvm] [runtimes] Probe for -nostdlib++ and -nostdinc++ with the C compiler (PR #108357)   via llvm-commits
• [libcxx] [libcxxabi] [libunwind] [llvm] [runtimes] Probe for -nostdlib++ and -nostdinc++ with the C compiler (PR #108357)   via llvm-commits
• [clang-tools-extra] [llvm] [llvm] add support for mustache templating language (PR #105893)   via llvm-commits
• [llvm] [WIP][SPARC] Allow overaligned `alloca`s (PR #107223)   via llvm-commits
• [compiler-rt] [tsan] Allow unloading of ignored libraries (PR #105660)   via llvm-commits
• [llvm] [RISCV] Handle zvfhmin promotion to f32 in half arith costs (PR #108361)   via llvm-commits
• [clang-tools-extra] [llvm] [llvm] add support for mustache templating language (PR #105893)   via llvm-commits
• [clang-tools-extra] [llvm] [mlir] [NFC][MLIR] Fix some typos (PR #108355)   via llvm-commits
• [llvm] ddd2af3 - Delete the clang-format Visual Studio plugin code (#108342)   via llvm-commits
• [clang] [llvm] Delete the clang-format Visual Studio plugin code (PR #108342)   via llvm-commits
• [llvm] [Codegen][LegalizeIntegerTypes] Improve shift through stack (PR #96151)   via llvm-commits
• [llvm] [RISCV] Account for zvfhmin and zvfbfmin promotion in register usage (PR #108370)   via llvm-commits
• [llvm] d5d6b44 - [Support] Add automatic index assignment in formatv (#107459)   via llvm-commits
• [llvm] [LLVM][NVPTX] Add support for tensormap.cp_fenceproxy (PR #107555)   via llvm-commits
• [clang-tools-extra] [llvm] [llvm] add support for mustache templating language (PR #105893)   via llvm-commits
• [llvm] [AMDGPU] Autogenerate checks for phi-vgpr-input-moveimm.mir (PR #108372)   via llvm-commits
• [llvm] 36ad072 - [AMDGPU] Autogenerate checks for phi-vgpr-input-moveimm.mir (#108372)   via llvm-commits
• [llvm] [ADT][NFC] Refactor/optimize DenseMap::copyFrom (PR #108377)   via llvm-commits
• [llvm] [SPIR-V] Emit DebugTypeBasic for NonSemantic DI (PR #106980)   via llvm-commits
• [llvm] [VPlan] Remove loop region in optimizeForVFAndUF. (PR #108378)   via llvm-commits
• [llvm] 36adf8e - [NFC][Analysis] Add more SCEV tests for ptr inductions (#108210)   via llvm-commits
• [llvm] c657a6f - [AMDGPU] Fix selection of s_load_b96 on GFX11 (#108029)   via llvm-commits
• [llvm] [NFC][LoopVectorize] Avoid passing ScalarEvolution to VPlanTransforms::optimize (PR #108380)   via llvm-commits
• [llvm] [dsymutil] Fix whitespace issues and typo in HelpText. (PR #108310)   via llvm-commits
• [llvm] [SPIR-V] Emit DebugTypeBasic for NonSemantic DI (PR #106980)   via llvm-commits
• [llvm] [ADT][NFC] Remove unused parameter from DenseMap::InsertIntoBucketImpl (PR #108382)   via llvm-commits
• [clang] [compiler-rt] [llvm] [FMV][AArch64] Remove feature sha1 from FMV. (PR #108383)   via llvm-commits
• [llvm] bf8101e - [CodeGen] Clear InitUndef pass new register cache between pass runs (#90967)   via llvm-commits
• [llvm] [CodeGen] Clear InitUndef pass new register cache between pass runs (PR #90967)   via llvm-commits
• [llvm] BPF: Generate locked insn for __sync_fetch_and_add() with cpu v1/v2 (PR #106494)   via llvm-commits
• [llvm] 229f391 - [dsymutil] Fix whitespace issues and typo in HelpText. (#108310)   via llvm-commits
• [llvm] [MCA][ResourceManager] Fix a bug in the instruction issue logic. (PR #108386)   via llvm-commits
• [llvm] [MCA][ResourceManager] Fix a bug in the instruction issue logic. (PR #108386)   via llvm-commits
• [llvm] [AMDGPU] Precommit and Modify `phi_moveimm_subreg_input` testcase (PR #108389)   via llvm-commits
• [llvm] [SPIR-V] Emit DebugTypeBasic for NonSemantic DI (PR #106980)   via llvm-commits
• [llvm] 5237f0d - [AMDGPU] Precommit and Modify `phi_moveimm_subreg_input` testcase (#108389)   via llvm-commits
• [llvm] [SPIR-V] Emit DebugTypeBasic for NonSemantic DI (PR #106980)   via llvm-commits
• [llvm] [RL78 patch 1] Recognize RL78 in triple parsing code. (PR #108395)   via llvm-commits
• [llvm] [RL78 patch 1] Recognize RL78 in triple parsing code. (PR #108395)   via llvm-commits
• [llvm] [AArch64] Initial sched model for Neoverse N3 (PR #106371)   via llvm-commits
• [llvm] [AArch64] Initial sched model for Neoverse N3 (PR #106371)   via llvm-commits
• [llvm] [AArch64] Initial sched model for Neoverse N3 (PR #106371)   via llvm-commits
• [llvm] [RL78 patch 1] Recognize RL78 in triple parsing code. (PR #108395)   via llvm-commits
• [llvm] c0b3e49 - [llvm][Mips] Bail on underaligned loads/stores in FastISel. (#106231)   via llvm-commits
• [llvm] [DAGCombiner] cache negative result from getMergeStoreCandidates() (PR #106949)   via llvm-commits
• [llvm] [VectorCombine] Refactor Insertion Point setting in shrinkType (PR #108398)   via llvm-commits
• [llvm] [llvm-dwarfdump] Rename manaully-generate-unit-index. (PR #108399)   via llvm-commits
• [llvm] [llvm-dwarfdump] Rename manaully-generate-unit-index. (PR #108399)   via llvm-commits
• [llvm] [SPIR-V] Emit DebugTypeBasic for NonSemantic DI (PR #106980)   via llvm-commits
• [llvm] [SPIR-V] Emit DebugTypeBasic for NonSemantic DI (PR #106980)   via llvm-commits
• [llvm] MemCpyOpt: clarify logic in processStoreOfLoad (NFC) (PR #108400)   via llvm-commits
• [llvm] [Support] Fix bugs in formatv automatic index assignment (PR #108384)   via llvm-commits
• [llvm] ef7a847 - [LoopUnswitch] Remove redundant condition. (NFC) (#107893)   via llvm-commits
• [llvm] [SDAG] Avoid creating redundant stack slots when lowering FSINCOS (PR #108401)   via llvm-commits
• [llvm] a409ebc - [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (#102592)   via llvm-commits
• [llvm] [RISCV] Lower interleave + deinterleave for zvfhmin and zvfbfmin (PR #108404)   via llvm-commits
• [llvm] [AArch64] Initial sched model for Neoverse N3 (PR #106371)   via llvm-commits
• [llvm] [AArch64] Initial sched model for Neoverse N3 (PR #106371)   via llvm-commits
• [llvm] [AArch64] Initial sched model for Neoverse N3 (PR #106371)   via llvm-commits
• [llvm] [AArch64] Initial sched model for Neoverse N3 (PR #106371)   via llvm-commits
• [llvm] MemCpyOpt: avoid unnecessary getMemorySSA (NFC) (PR #108405)   via llvm-commits
• [libc] [llvm] [libc][math] Add floating-point cast independent of compiler runtime (PR #105152)   via llvm-commits
• [llvm] 8c05515 - [LegalizeIntegerTypes] Simplify ExpandIntRes_FP_TO_XINT when operand needs to be SoftPromoted. (#107634)   via llvm-commits
• [libc] [llvm] [libc][math] Add floating-point cast independent of compiler runtime (PR #105152)   via llvm-commits
• [clang] [llvm] [RISCV] Add Syntacore SCR7 processor definition (PR #108406)   via llvm-commits
• [clang] [llvm] [RISCV] Add Syntacore SCR7 processor definition (PR #108406)   via llvm-commits
• [llvm] 859b785 - [RISCV] Restructure CC_RISCV_FastCC to reduce code duplication. NFC (#107671)   via llvm-commits
• [llvm] [MemProf] Refactor context node creation into a new helper (NFC) (PR #108408)   via llvm-commits
• [llvm] e42f473 - Reland "[NVPTX] Support copysign PTX instruction" (#108125)   via llvm-commits
• [llvm] [Offload] Introduce offload-tblgen and initial new API implementation (PR #108413)   via llvm-commits
• [llvm] [Offload] Introduce offload-tblgen and initial new API implementation (PR #108413)   via llvm-commits
• [llvm] 1ad84d7 - [Mips] Optimize `or (and $src1, mask), (shl $src2, shift)` to `ins` (#103017)   via llvm-commits
• [llvm] c6ca13d - [RISCV] Lower interleave + deinterleave for zvfhmin and zvfbfmin (#108404)   via llvm-commits
• [llvm] workflows/commit-access-review: Use get_collaborators() function (PR #108313)   via llvm-commits
• [llvm] LICM: hoist BO assoc for FAdd and FMul (PR #108415)   via llvm-commits
• [llvm] [AMDGPU] Assert no bad shift operations will happen (PR #108416)   via llvm-commits
• [llvm] ee40ffd - [X86] Recognize VPXORDZrr as a zero-idiom on Znver4 (#108314)   via llvm-commits
• [llvm] [NFC][AMDGPU][Attributor] Only iterate over filtered functions when creating AAs (PR #108417)   via llvm-commits
• [llvm] [Offload] Introduce offload-tblgen and initial new API implementation (PR #108413)   via llvm-commits
• [llvm] [RISCV][TTI] Reduce cost of a build_vector pattern (PR #108419)   via llvm-commits
• [llvm] workflows/release-binaries: Fix automatic upload (PR #107315)   via llvm-commits
• [clang] [llvm] [Utils] Add new --update-tests flag to llvm-lit (PR #108425)   via llvm-commits
• [clang] [llvm] [Utils] Add new --update-tests flag to llvm-lit (PR #108425)   via llvm-commits
• [clang] [llvm] [Utils] Add new --update-tests flag to llvm-lit (PR #108425)   via llvm-commits
• [llvm] bea2f25 - [gn build] Port win asan runtime rules (#108293)   via llvm-commits
• [llvm] 9e2bb41 - [ADT][NFC] Remove unused parameter from DenseMap::InsertIntoBucketImpl (#108382)   via llvm-commits
• [llvm] [AMDGPU] Default-initialize uninitialized class member variables (PR #108428)   via llvm-commits
• [llvm] 2d47a0b - Add step builtins and step HLSL function to DirectX and SPIR-V backend (#106471)   via llvm-commits
• [compiler-rt] ee92645 - [sanitizer] Change GetDTLSRange (#108345)   via llvm-commits
• [llvm] [AArch64] Initial sched model for Neoverse N3 (PR #106371)   via llvm-commits
• [compiler-rt] 81935c5 - [compiler-rt] [MSVC] Detect MSVC as a compiler-id for lit. (#108255)   via llvm-commits
• [llvm] [SLP]Add subvector vectorization for non-load nodes (PR #108430)   via llvm-commits
• [llvm] 7a6945f - [AArch64][SLP] Add NFC test cases for floating point reductions (#106507)   via llvm-commits
• [llvm] 0446b40 - [NFC][AMDGPU][Attributor] Only iterate over filtered functions when creating AAs (#108417)   via llvm-commits
• [llvm] 853bff2 - [Coroutines] properly update CallGraph in CoroSplit (#107935)   via llvm-commits
• [lld] [lld] select a default eflags for hexagon (PR #108431)   via llvm-commits
• [llvm] [RISCV][TTI] Reduce cost of a build_vector pattern (PR #108419)   via llvm-commits
• [llvm] [X86][AVX10.2] Support AVX10.2-COMEF new instructions. (PR #108063)   via llvm-commits
• [llvm] 0989a77 - [Coroutines] Verify normalization was not missed (#108096)   via llvm-commits
• [llvm] 2670565 - [Coroutines] Move materialization code into its own utils (#108240)   via llvm-commits
• [llvm] [SystemZ] Introduce new AsmStreamer for z/OS specific HLASM format output (PR #108433)   via llvm-commits
• [llvm] [SystemZ] Introduce new AsmStreamer for z/OS specific HLASM format output (PR #108433)   via llvm-commits
• [llvm] [MC][SystemZ] Introduce new AsmStreamer for z/OS specific HLASM format output (PR #108433)   via llvm-commits
• [llvm] [SystemZ] Introduce new AsmStreamer for z/OS specific HLASM format output (PR #108433)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Prefer to use Vector Truncate (PR #105692)   via llvm-commits
• [llvm] [MC] Introduce ability to add target specific AsmStreamer (PR #107415)   via llvm-commits
• [llvm] [SystemZ] Introduce new AsmStreamer for z/OS specific HLASM format output (PR #108433)   via llvm-commits
• [llvm] [SystemZ][z/OS] Introduce new AsmStreamer for z/OS specific HLASM format output (PR #108433)   via llvm-commits
• [llvm] BPF: Generate locked insn for __sync_fetch_and_add() with cpu v1/v2 (PR #106494)   via llvm-commits
• [clang] [compiler-rt] [llvm] [FMV][AArch64] Unify ls64, ls64_v and ls64_accdata. (PR #108024)   via llvm-commits
• [clang] [lldb] [llvm] Extending LLDB to work on AIX (PR #102601)   via llvm-commits
• [compiler-rt] [scudo] Update secondary cache time-based release logic. (PR #107507)   via llvm-commits
• [compiler-rt] [scudo] Update secondary cache time-based release logic. (PR #107507)   via llvm-commits
• [compiler-rt] [scudo] Update secondary cache time-based release logic. (PR #107507)   via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   via llvm-commits
• [llvm] [RISCV][GISel] Legalize G_STACKSAVE/RESTORE. (PR #108438)   via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   via llvm-commits
• [lld] [lld] select a default eflags for hexagon (PR #108431)   via llvm-commits
• [compiler-rt] [test][compiler-rt] Mark dlsym_alloc.c as unsupported on macos (PR #108439)   via llvm-commits
• [compiler-rt] [rtsan] Fix comment in fcntl, fix va_args type (PR #108440)   via llvm-commits
• [llvm] [SLP][AArch64] Fix test failure for PR #106507 (PR #108442)   via llvm-commits
• [llvm] d37d057 - [SLP][AArch64] Fix test failure for PR #106507 (#108442)   via llvm-commits
• [llvm] 159e5b3 - MemCpyOpt: avoid unnecessary getMemorySSA (NFC) (#108405)   via llvm-commits
• [llvm] c05e29b - [LegacyPM][DirectX] Add legacy scalarizer back for use in the DirectX backend (#107427)   via llvm-commits
• [compiler-rt] [scudo] Update secondary cache time-based release logic. (PR #107507)   via llvm-commits
• [llvm] [InstCombine] Pass DomTree and DomTreeCacheto LibCallSimplifier (PR #108446)   via llvm-commits
• [llvm] 7e9bd12 - MemCpyOpt: clarify logic in processStoreOfLoad (NFC) (#108400)   via llvm-commits
• [lld] 82a3646 - [LLD][COFF] Add support for ARM64EC auxiliary IAT (#108304)   via llvm-commits
• [llvm] [NFC][Attributor] Use unsigned integer for address space tracking (PR #108447)   via llvm-commits
• [llvm] [AMDGPU][True16][MC] true16 for more VOP1 instructions (PR #108412)   via llvm-commits
• [compiler-rt] dd66aaf - [sanitizer] Allow to override GetDTLSRange (#108348)   via llvm-commits
• [llvm] [LLVM][NVPTX] Add support for tensormap.cp_fenceproxy (PR #107555)   via llvm-commits
• [libc] [llvm] [libc][math] Add floating-point cast independent of compiler runtime (PR #105152)   via llvm-commits
• [llvm] 4808842 - [NFC][Attributor] Use unsigned integer for address space tracking (#108447)   via llvm-commits
• [compiler-rt] [sanitizers] convert some errant CRLF line endings to LF (PR #108454)   via llvm-commits
• [compiler-rt] [sanitizers] convert some errant CRLF line endings to LF (PR #108454)   via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   via llvm-commits
• [compiler-rt] [scudo] Update secondary cache time-based release logic. (PR #107507)   via llvm-commits
• [compiler-rt] [scudo] Update secondary cache time-based release logic. (PR #107507)   via llvm-commits
• [lld] [LLD][COFF][NFC] Store live flag in ImportThunkChunk. (PR #108459)   via llvm-commits
• [llvm] 2e58d92 - [NVPTX] Check Before inserting AddrSpaceCastInst in NVPTXLoweringAlloca (#106127)   via llvm-commits
• [lld] [LLD][COFF] Add Support for ARM64EC Import Thunks (PR #108460)   via llvm-commits
• [llvm] [llvm-dwarfdump] Rename manaully-generate-unit-index. (PR #108399)   via llvm-commits
• [llvm] [RISCV] Enable floating point CSR alias mnemonics for Zfinx. (PR #108464)   via llvm-commits
• [llvm] 853bb8f - [ADT][NFC] Refactor/optimize DenseMap::copyFrom (#108377)   via llvm-commits
• [llvm] 48088dc - [llvm-dwarfdump] Rename manaully-generate-unit-index. (#108399)   via llvm-commits
• [llvm] [ctx_prof] Fix checks in `PGOCtxprofFlattening` (PR #108467)   via llvm-commits
• [llvm] [ctx_prof] Fix checks in `PGOCtxprofFlattening` (PR #108467)   via llvm-commits
• [llvm] [DirectX] fix fail test (PR #108468)   via llvm-commits
• [llvm] [RISCV] Use CCValAssign::getCustomReg for fixed vector arguments/returns with RVV. (PR #108470)   via llvm-commits
• [llvm] [RISCV] Use CCValAssign::getCustomReg for fixed vector arguments/returns with RVV. (PR #108470)   via llvm-commits
• [llvm] 6d859c1 - [SandboxIR] Implement GlobalValue (#108317)   via llvm-commits
• [llvm] [SandboxIR] Implement GlobalValue (PR #108317)   via llvm-commits
• [llvm] [ctx_prof] Factor the callsite instrumentation exclusion criteria (PR #108471)   via llvm-commits
• [llvm] [EH] Create separate file for EH assembly tests (PR #108472)   via llvm-commits
• [llvm] [SandboxIR] Implement DSOLocalEquivalent (PR #108473)   via llvm-commits
• [llvm] 981bb9d - [DirectX] generate resource table for PSV part (#106607)   via llvm-commits
• [llvm] 13280d9 - [loongarch][DAG][FREEZE] Fix crash when FREEZE a half(f16) type on loongarch (#107791)   via llvm-commits
• [llvm] [loongarch][DAG][FREEZE] Fix crash when FREEZE a half(f16) type on loongarch (PR #107791)   via llvm-commits
• [llvm] 2ca75df - [ValueTracking] Infer is-power-of-2 from dominating conditions (#107994)   via llvm-commits
• [llvm] ec1922b - [DirectX] fix fail test (#108468)   via llvm-commits
• [llvm] Decompose gep of complex type struct to its element type (PR #107848)   via llvm-commits
• [llvm] 7ba4968 - [RISCV] Enable floating point CSR alias mnemonics for Zfinx. (#108464)   via llvm-commits
• [clang] [llvm] [RISCV] Implement Clang Builtins for XCValu Extension in CV32E40P (PR #100684)   via llvm-commits
• [llvm] [ARM] Fix VBICimm and VORRimm generation under Big endian. (PR #107813)   via llvm-commits
• [llvm] [Coverage] Skip empty profile name section (PR #108480)   via llvm-commits
• [llvm] [Coverage] Skip empty profile name section (PR #108480)   via llvm-commits
• [llvm] [RISCV] Rename XCValu cv.slet(u) to cv.sle(u). (PR #108481)   via llvm-commits
• [llvm] [RISCV] Rename XCValu cv.slet(u) to cv.sle(u). (PR #108481)   via llvm-commits
• [clang] [llvm] [RISCV] Implement Clang Builtins for XCValu Extension in CV32E40P (PR #100684)   via llvm-commits
• [llvm] [IRSim] Avoid repeated hash lookups (NFC) (PR #108483)   via llvm-commits
• [llvm] [LiveDebugValues] Avoid repeated hash lookups (NFC) (PR #108484)   via llvm-commits
• [llvm] [IR] Avoid repeated hash lookups (NFC) (PR #108485)   via llvm-commits
• [llvm] [DebugInfo] Avoid repeated hash lookups (NFC) (PR #108486)   via llvm-commits
• [llvm] c00c62c - [BOLT] Add pseudo probe inline tree to YAML profile   via llvm-commits
• [compiler-rt] d9ed8b0 - [test][compiler-rt] Mark dlsym_alloc.c as unsupported on macos (#108439)   via llvm-commits
• [clang] [llvm] [RISCV] Implement Clang Builtins for XCValu Extension in CV32E40P (PR #100684)   via llvm-commits
• [clang] [llvm] [RISCV] Implement Clang Builtins for XCValu Extension in CV32E40P (PR #100684)   via llvm-commits
• [llvm] 9d9d2b4 - [RISCV] Rename XCValu cv.slet(u) to cv.sle(u). (#108481)   via llvm-commits
• [llvm] 587d4cc - [RISCV] Lower bf16 {S,U}INT_TO_FP, FP_TO_{S,U}INT and VP variants (#108338)   via llvm-commits
• [llvm] [AMDGPU][Attributor] Add an option to turn on internalization (PR #108420)   via llvm-commits
• [llvm] [llvm-size] Avoid unneeded uses of 'raw_string_ostream::str' (NFC) (PR #108490)   via llvm-commits
• [llvm] [AMDGPU] Handle subregisters properly in generic operand legalizer (PR #108496)   via llvm-commits
• [llvm] 04f45aa - [DebugInfo] Avoid repeated hash lookups (NFC) (#108486)   via llvm-commits
• [llvm] a4d7464 - [IR] Avoid repeated hash lookups (NFC) (#108485)   via llvm-commits
• [llvm] 6e410bc - [RISCV][GISel] Legalize G_STACKSAVE/RESTORE. (#108438)   via llvm-commits
• [llvm] [CodeGen] Use DenseMap::operator[] (NFC) (PR #108489)   via llvm-commits
• [compiler-rt] [sanitizer] Disable new test on powerpc64le (PR #108505)   via llvm-commits
• [compiler-rt] f0b3287 - [sanitizer] Disable new test on powerpc64le (#108505)   via llvm-commits
• [llvm] 520ddf2 - [TableGen] Remove duplicate code in applyMnemonicAliases when target uses DefaultAsmParserVariant. (#108494)   via llvm-commits
• [llvm] [RL78 patch 1] Recognize RL78 in triple parsing code. (PR #108395)   via llvm-commits
• [llvm] [LV][NFC] Unified printing format with vector-predication intrinsics with explicit vector length (PR #108177)   via llvm-commits
• [llvm] [X86][AVX10.2] Support AVX10.2-COMEF new instructions. (PR #108063)   via llvm-commits
• [llvm] [X86] Use MCRegister in X86AsmParser. (PR #108509)   via llvm-commits
• [llvm] c0e308b - [InstCombine] Pass DomTree and DomTreeCacheto LibCallSimplifier (#108446)   via llvm-commits
• [llvm] BPF: Generate locked insn for __sync_fetch_and_add() with cpu v1/v2 (PR #106494)   via llvm-commits
• [llvm] [RL78 patch 1] Recognize RL78 in triple parsing code. (PR #108395)   via llvm-commits
• [llvm] [RL78 patch 1] Recognize RL78 in triple parsing code. (PR #108395)   via llvm-commits
• [llvm] [X86][AVX10.2] Support AVX10.2-COMEF new instructions. (PR #108063)   via llvm-commits
• [llvm] Reland "[amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic" (PR #108512)   via llvm-commits
• [llvm] 991c842 - [AMDGPU] eliminate frame index v_add wave32 test (#107832)   via llvm-commits
• [llvm] 09a4c23 - [NFC][EarlyIfConverter] Turn SSAIfConv into a local variable (#107390)   via llvm-commits
• [llvm] c78d056 - [llvm] Fix typo in comments (#108230)   via llvm-commits
• [llvm] [llvm] Fix typo in comments (PR #108230)   via llvm-commits
• [llvm] [X86][AVX10.2] Support AVX10.2-COMEF new instructions. (PR #108063)   via llvm-commits
• [llvm] [NFC][EarlyIfConverter] Replace boolean Preadicate for a class (PR #108519)   via llvm-commits
• [llvm] [NFC][EarlyIfConverter] Replace boolean Preadicate for a class (PR #108519)   via llvm-commits
• [llvm] [NFC][EarlyIfConverter] Replace boolean Preadicate for a class (PR #108519)   via llvm-commits
• [llvm] [X86][AVX10.2] Support AVX10.2-COMEF new instructions. (PR #108063)   via llvm-commits
• [llvm] 1b57cbc - [VectorCombine] Refactor Insertion Point setting in shrinkType (#108398)   via llvm-commits
• [llvm] [X86][AVX10.2] Support AVX10.2-COMEF new instructions. (PR #108063)   via llvm-commits
• [llvm] [LV][NFC] Unified printing format with vector-predication intrinsics with explicit vector length (PR #108177)   via llvm-commits
• [llvm] [AArch64] Consider histcnt smaller than i32 in the cost model (PR #108521)   via llvm-commits
• [llvm] [AArch64] Consider histcnt smaller than i32 in the cost model (PR #108521)   via llvm-commits
• [llvm] d4f6ad5 - [llvm-size] Avoid unneeded uses of 'raw_string_ostream::str' (NFC) (#108490)   via llvm-commits
• [llvm] 3356208 - Reland "[amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic" (#108512)   via llvm-commits
• [llvm] 637aa61 - [ARM] Fix VBICimm and VORRimm generation under Big endian. (#107813)   via llvm-commits
• [clang] [llvm] Prefer std::getenv to ::getenv (PR #108529)   via llvm-commits
• [llvm] [DebugInfo] Transfer strcmp DILocation to generated inline code (PR #108531)   via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)   via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)   via llvm-commits
• [llvm] [LV][EVL] Support icmp/fcmp instruction with EVL-vectorization (PR #108533)   via llvm-commits
• [clang] [llvm] [Instrumentation] Move out to Utils (NFC) (PR #108532)   via llvm-commits
• [clang] [llvm] [Instrumentation] Move out to Utils (NFC) (PR #108532)   via llvm-commits
• [clang] [llvm] [Instrumentation] Move out to Utils (NFC) (PR #108532)   via llvm-commits
• [llvm] [LV][EVL] Support icmp/fcmp instruction with EVL-vectorization (PR #108533)   via llvm-commits
• [llvm] 6c0b1e7 - [llvm][tools] Strip unneeded uses of raw_string_ostream::str() (NFC)   via llvm-commits
• [clang] [lldb] [llvm] Extending LLDB to work on AIX (PR #102601)   via llvm-commits
• [clang] [lldb] [llvm] Extending LLDB to work on AIX (PR #102601)   via llvm-commits
• [clang] [llvm] [Instrumentation] Move out to Utils (NFC) (PR #108532)   via llvm-commits
• [llvm] f3029b3 - [NFC][LoopVectorize] Avoid passing ScalarEvolution to VPlanTransforms::optimize (#108380)   via llvm-commits
• [llvm] [SPIR-V] Fix incorrect emission of G_SPLAT_VECTOR for fixed vectors (PR #108534)   via llvm-commits
• [llvm] eb11f57 - [llvm][tools] Strip unneeded uses of raw_string_ostream::str() (NFC)   via llvm-commits
• [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)   via llvm-commits
• [llvm] 7574e1d - Reland [llvm-ml] Fix RIP-relative addressing for ptr operands (#108061)   via llvm-commits
• [llvm] MemCpyOpt: replace an AA query with MSSA query (PR #108535)   via llvm-commits
• [lldb] [llvm] [lldb][RISCV] function calls support in lldb expressions (PR #99336)   via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2 MOVZXC new Instructions. (PR #108537)   via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2 MOVZXC new Instructions. (PR #108537)   via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2 MOVZXC new Instructions. (PR #108537)   via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2 MOVZXC new Instructions. (PR #108537)   via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle] Add template name to the substituions list during d… (PR #108538)   via llvm-commits
• [llvm] [X86][AVX10.2] Support AVX10.2-COMEF new instructions. (PR #108063)   via llvm-commits
• [llvm] [X86][AVX10.2] Support AVX10.2-COMEF new instructions. (PR #108063)   via llvm-commits
• [llvm] [NFC][LoopVectorize] Dont pass LLVMContext to VPTypeAnalysis constructor (PR #108540)   via llvm-commits
• [llvm] [NewPM][CodeGen][WIP] Add callback style CodeGen pass pipeline builder (PR #104725)   via llvm-commits
• [clang] [llvm] [AMDGPU] Change CF intrinsics lowering to reconverge on predecessors. (PR #92809)   via llvm-commits
• [compiler-rt] [ASan] Disable InstallAtForkHandler on Linux/sparc64 (PR #108542)   via llvm-commits
• [llvm] [NFC][LoopVectorize] Rename variable in replaceVPBBWithIRVPBB (PR #108543)   via llvm-commits
• [llvm] [Instrumentation] Move test coverage in Transforms (NFC) (PR #108544)   via llvm-commits
• [llvm] [MIR] Allow overriding isSSA, noPhis, noVRegs in MIR input (PR #108546)   via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)   via llvm-commits
• [llvm] [TLI] Support inferring function attributes for sincos[f|l] (PR #108554)   via llvm-commits
• [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)   via llvm-commits
• [compiler-rt] [LoongArch][sanitizer] Fix SC_ADDRERR_{RD,WR} missing in the musl environment (PR #108557)   via llvm-commits
• [compiler-rt] [LoongArch][sanitizer] Fix SC_ADDRERR_{RD,WR} missing in the musl environment (PR #108557)   via llvm-commits
• [compiler-rt] [LoongArch][sanitizer] Fix SC_ADDRERR_{RD,WR} missing in the musl environment (PR #108557)   via llvm-commits
• [compiler-rt] [LoongArch][sanitizer] Fix SC_ADDRERR_{RD,WR} missing in the musl environment (PR #108557)   via llvm-commits
• [compiler-rt] [LoongArch][sanitizer] Fix SC_ADDRERR_{RD,WR} missing in the musl environment (PR #108557)   via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   via llvm-commits
• [llvm] [AMDGPU][Attributor] Don't run `AAAddressSpace` for graphics functions (PR #108560)   via llvm-commits
• [llvm] [LoopVectorize] Add initial support to VPRegionBlock for multiple successors (PR #108563)   via llvm-commits
• [llvm] [DebugInfo][InstCombine] Do not overwrite prior DILocation for new Insts (PR #108565)   via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)   via llvm-commits
• [llvm] 69a2115 - [DAG] Fold trunc(srl(extract_elt(vec,c1),c2)) -> extract_elt(bitcast(vec),c3) (#107987)   via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #107964)   via llvm-commits
• [llvm] a3ea018 - [X86] Use MCRegister in X86AsmParser. (#108509)   via llvm-commits
• [llvm] ee4582f - [RISCV] Use CCValAssign::getCustomReg for fixed vector arguments/returns with RVV. (#108470)   via llvm-commits
• [llvm] [X86] Add missing immediate qualifier to the (V)INSERTPS instruction names (PR #108568)   via llvm-commits
• [clang] [compiler-rt] [llvm] [PGO] Initialize GOV Writeout and Reset Functions in the Runtime on AIX (PR #108570)   via llvm-commits
• [clang] [compiler-rt] [llvm] [PGO] Initialize GOV Writeout and Reset Functions in the Runtime on AIX (PR #108570)   via llvm-commits
• [llvm] [SelectionDAG] Do not build illegal nodes with users (PR #108573)   via llvm-commits
• [llvm] [RISCV] Change Zvbb and Zvkb from 'Assembly Support' to Supported. (PR #108572)   via llvm-commits
• [llvm] [SelectionDAG] Do not build illegal nodes with users (PR #108573)   via llvm-commits
• [llvm] [RISCV] Add Zvfhmin to RISCVUsage.rst. NFC (PR #108574)   via llvm-commits
• [clang] [compiler-rt] [llvm] [PGO] Initialize GOV Writeout and Reset Functions in the Runtime on AIX (PR #108570)   via llvm-commits
• [llvm] [RISCV] Add documentation that Zvk* are supported through intrinsics. NFC (PR #108577)   via llvm-commits
• [llvm] [SelectionDAG] Do not build illegal nodes with users (PR #108573)   via llvm-commits
• [llvm] ab06a18 - [IRSim] Avoid repeated hash lookups (NFC) (#108483)   via llvm-commits
• [llvm] [SelectionDAG] Do not build illegal nodes with users (PR #108573)   via llvm-commits
• [llvm] Handle moves of non-16 size to/from CCR (PR #108581)   via llvm-commits
• [llvm] Handle moves of non-16 size to/from CCR (PR #108581)   via llvm-commits
• [llvm] [ADT] Style and nit fixes in SmallSet (PR #108582)   via llvm-commits
• [llvm] [SelectionDAG] Do not build illegal nodes with users (PR #108573)   via llvm-commits
• [lld] ea5d37f - [LLD][COFF] Add Support for ARM64EC Import Thunks (#108460)   via llvm-commits
• [llvm] [SandboxIR][PassRegistry] Parse pipeline string (PR #108103)   via llvm-commits
• [llvm] [SelectionDAG] Do not build illegal nodes with users (PR #108573)   via llvm-commits
• [llvm] [RISCV][docs] GP Relaxation and Small Data Limit (PR #108592)   via llvm-commits
• [llvm] [X86] Add missing immediate qualifier to the (V)INSERT/EXTRACT/PERM2 instruction names (PR #108593)   via llvm-commits
• [llvm] [X86] Add missing immediate qualifier to the (V)INSERT/EXTRACT/PERM2 instruction names (PR #108593)   via llvm-commits
• [llvm] [TargetMachine] Add `getFlatAddressSpace` to `TargetMachine` (PR #108594)   via llvm-commits
• [llvm] [RISCV][TTI] Adjust cost for extract/insert element when VLEN is known (PR #108595)   via llvm-commits
• [clang] [llvm] [AMDGPU] Change CF intrinsics lowering to reconverge on predecessors (PR #108596)   via llvm-commits
• [clang] [llvm] [AMDGPU] Change CF intrinsics lowering to reconverge on predecessors (PR #108596)   via llvm-commits
• [clang] [llvm] [AMDGPU] Change CF intrinsics lowering to reconverge on predecessors (PR #108596)   via llvm-commits
• [llvm] [NFC][LoopVectorize] Avoid passing ScalarEvolution to VPlanTransforms::optimize (PR #108380)   via llvm-commits
• [llvm] Handle moves of non-16 size to/from CCR (PR #108581)   via llvm-commits
• [llvm] [SandboxIR][PassRegistry] Parse pipeline string (PR #108103)   via llvm-commits
• [llvm] f0f1b70 - [SandboxIR][PassRegistry] Parse pipeline string (#108103)   via llvm-commits
• [llvm] [SandboxIR][PassRegistry] Parse pipeline string (PR #108103)   via llvm-commits
• [llvm] 8e2843b - [RISCV][Docs] Change Zvbb and Zvkb from 'Assembly Support' to Supported. NFC (#108572)   via llvm-commits
• [llvm] [SandboxVec] Boilerplate for vectorization passes (PR #108603)   via llvm-commits
• [llvm] [SandboxVec] Boilerplate for vectorization passes (PR #108603)   via llvm-commits
• [llvm] [llvm]Add a simple Telemetry framework (PR #102323)   via llvm-commits
• [llvm] fffc7fb - [SandboxIR] Implement DSOLocalEquivalent (#108473)   via llvm-commits
• [llvm] [SandboxIR] Implement DSOLocalEquivalent (PR #108473)   via llvm-commits
• [llvm] [SandboxIR] Implement GlobalObject (PR #108604)   via llvm-commits
• [clang] [llvm] [AMDGPU] Change CF intrinsics lowering to reconverge on predecessors (PR #108596)   via llvm-commits
• [clang] [llvm] [AMDGPU] Change CF intrinsics lowering to reconverge on predecessors (PR #108596)   via llvm-commits
• [llvm] b9d85b1 - [CodeGen] Use DenseMap::operator[] (NFC) (#108489)   via llvm-commits
• [llvm] [OpenMP] Fix redefining `stdint.h` types (PR #108607)   via llvm-commits
• [lld] [LLD][COFF] Redirect __imp_ Symbols to __imp_aux_ on ARM64EC for x64 sections (PR #108608)   via llvm-commits
• [llvm] [OpenMP] Fix redefining `stdint.h` types (PR #108607)   via llvm-commits
• [llvm] [SandboxVec] Boilerplate for vectorization passes (PR #108603)   via llvm-commits
• [llvm] [X86] Speed up X86 Domain Reassignment pass by early return (PR #108108)   via llvm-commits
• [lld] [LLD][COFF] Add Support for auxiliary IAT copy (PR #108610)   via llvm-commits
• [llvm] [CoroSplit][DebugInfo] Adjust heuristic for moving DIScope of funclets (PR #108611)   via llvm-commits
• [llvm] [SandboxVec] Boilerplate for vectorization passes (PR #108603)   via llvm-commits
• [clang] [llvm] [Clang][LLVM][AArch64] Add intrinsic for MOVT SME2 instruction (PR #97602)   via llvm-commits
• [clang] [llvm] [Clang][LLVM][AArch64] Add intrinsic for MOVT SME2 instruction (PR #97602)   via llvm-commits
• [clang] [llvm] [Clang][LLVM][AArch64] Add intrinsic for MOVT SME2 instruction (PR #97602)   via llvm-commits
• [clang] [llvm] [Clang][LLVM][AArch64] Add intrinsic for MOVT SME2 instruction (PR #97602)   via llvm-commits
• [clang] [llvm] [Clang][LLVM][AArch64] Add intrinsic for MOVT SME2 instruction (PR #97602)   via llvm-commits
• [clang] [llvm] [Clang][LLVM][AArch64] Add intrinsic for MOVT SME2 instruction (PR #97602)   via llvm-commits
• [llvm] AtomicExpand: Really allow incremental legalization (PR #108613)   via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2 MOVZXC new Instructions. (PR #108537)   via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2 MOVZXC new Instructions. (PR #108537)   via llvm-commits
• [llvm] 3a27458 - [LiveDebugValues] Avoid repeated hash lookups (NFC) (#108484)   via llvm-commits
• [clang] [llvm] [X86][AVX10.2] Support AVX10.2 MOVZXC new Instructions. (PR #108537)   via llvm-commits
• [llvm] [SandboxIR] Implement GlobalObject (PR #108604)   via llvm-commits
• [llvm] [SandboxVec] Boilerplate for vectorization passes (PR #108603)   via llvm-commits
• [llvm] [SandboxVec] Boilerplate for vectorization passes (PR #108603)   via llvm-commits
• [llvm] [LLVM][Option] Refactor option name comparison (PR #108219)   via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   via llvm-commits
• [llvm] [InstCombine] Fold `(X==Z || Y==Z) ? (X==Z && Y==Z) : X==Y --> X==Y` (PR #108619)   via llvm-commits
• [llvm] 4c040c0 - [Coroutines] Move Shape to its own header (#108242)   via llvm-commits
• [llvm] d0e7714 - [AMDGPU] Error on non-global pointer with s_prefetch_data (#107624)   via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   via llvm-commits
• [llvm] 9f738c8 - [SandboxIR] Implement GlobalObject (#108604)   via llvm-commits
• [llvm] [SandboxIR] Implement GlobalObject (PR #108604)   via llvm-commits
• [llvm] 39f2d2f - [SandboxVec] Boilerplate for vectorization passes (#108603)   via llvm-commits
• [llvm] [SandboxVec] Boilerplate for vectorization passes (PR #108603)   via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   via llvm-commits
• [llvm] [SandboxIR] Implement GlobalIFunc (PR #108622)   via llvm-commits
• [llvm] [Coroutines] Refactor CoroShape::buildFrom for future use by ABI objects (PR #108623)   via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   via llvm-commits
• [llvm] 0ba8b24 - [Xtensa] Lowering FRAMEADDR/RETURNADDR operations. (#107363)   via llvm-commits
• [llvm] 21e3a21 - [InstCombine] Replace an integer comparison of a `phi` node with multiple `ucmp`/`scmp` operands and a constant with `phi` of individual comparisons of original intrinsic's arguments (#107769)   via llvm-commits
• [llvm] [SandboxVec] User-defined pass pipeline (PR #108625)   via llvm-commits
• [llvm] [SandboxVec] User-defined pass pipeline (PR #108625)   via llvm-commits
• [llvm] [DirectX] Remove rcp dx intrinsic (PR #108626)   via llvm-commits
• [llvm] [NFC][DirectX] Remove rcp dx intrinsic (PR #108626)   via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   via llvm-commits
• [clang] [llvm] [RFC][BPF] Do atomic_fetch_*() pattern matching with memory ordering (PR #107343)   via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   via llvm-commits
• [clang] [llvm] [RFC][BPF] Do atomic_fetch_*() pattern matching with memory ordering (PR #107343)   via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   via llvm-commits
• [llvm] 75a57ed - VPlan/Builder: inline VPBuilder::createICmp (NFC) (#105650)   via llvm-commits
• [clang] [llvm] [RFC][BPF] Do atomic_fetch_*() pattern matching with memory ordering (PR #107343)   via llvm-commits
• [clang] [llvm] [RFC][BPF] Do atomic_fetch_*() pattern matching with memory ordering (PR #107343)   via llvm-commits
• [llvm] acf90fd - [WebAssembly] Create separate file for EH assembly tests (#108472)   via llvm-commits
• [clang] [llvm] [RFC][BPF] Do atomic_fetch_*() pattern matching with memory ordering (PR #107343)   via llvm-commits
• [llvm] [Coverage] Skip empty profile name section (PR #108480)   via llvm-commits
• [llvm] [Coverage] Skip empty profile name section (PR #108480)   via llvm-commits
• [llvm] [ValueTracking] AllowEphemerals for alignment assumptions. (PR #108632)   via llvm-commits
• [llvm] b74e779 - [x86] Add lowering for `@llvm.experimental.vector.compress` (#104904)   via llvm-commits
• [lld] [lld] select a default eflags for hexagon (PR #108431)   via llvm-commits
• [llvm] [SandboxIR] Implement GlobalIFunc (PR #108622)   via llvm-commits
• [llvm] [SandboxVec] User-defined pass pipeline (PR #108625)   via llvm-commits
• [llvm] [SandboxIR] Implement GlobalIFunc (PR #108622)   via llvm-commits
• [llvm] ae3e825 - [SandboxIR] Implement GlobalIFunc (#108622)   via llvm-commits
• [llvm] [SandboxIR] Implement GlobalIFunc (PR #108622)   via llvm-commits
• [llvm] [RISCV] Introduce VLOptimizer pass (PR #108640)   via llvm-commits
• [llvm] [SandboxIR] Implement missng Instruction::comesBefore() (PR #108635)   via llvm-commits
• [llvm] [SandboxVec] User-defined pass pipeline (PR #108625)   via llvm-commits
• [llvm] 5130f32 - [SandboxVec] User-defined pass pipeline (#108625)   via llvm-commits
• [llvm] [SandboxVec] User-defined pass pipeline (PR #108625)   via llvm-commits
• [llvm] [WebAssembly] Add type checking for 'throw' (PR #108641)   via llvm-commits
• [llvm] [SandboxIR] Implement GlobalVariable (PR #108642)   via llvm-commits
• [llvm] [SandboxVec] User-defined pass pipeline (PR #108625)   via llvm-commits
• [llvm] [NFC] Update function names in MCTargetAsmParser.h (PR #108643)   via llvm-commits
• [llvm] [NFC] Update function names in MCTargetAsmParser.h (PR #108643)   via llvm-commits
• [llvm] [NFC] Update function names in MCTargetAsmParser.h (PR #108643)   via llvm-commits
• [llvm] [NFC] Update function names in MCTargetAsmParser.h (PR #108643)   via llvm-commits
• [llvm] [SandboxIR] Implement GlobalIFunc (PR #108622)   via llvm-commits
• [clang-tools-extra] [llvm] [llvm] add support for mustache templating language (PR #105893)   via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   via llvm-commits
• [llvm] [bazel][NFC] Use globs to make `Vectorize` less brittle (PR #108644)   via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   via llvm-commits
• [llvm] [RISCV] Introduce VLOptimizer pass (PR #108640)   via llvm-commits
• [llvm] Revert "[MemProf] Streamline and avoid unnecessary context id duplication (#107918)" (PR #108652)   via llvm-commits
• [llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)   via llvm-commits
• [clang] [llvm] Thin3 (PR #108614)   via llvm-commits
• [llvm] Revert "[MemProf] Streamline and avoid unnecessary context id duplication (#107918)" (PR #108652)   via llvm-commits
• [clang-tools-extra] [llvm] [WIP] add a mustache backend (PR #108653)   via llvm-commits
• [clang-tools-extra] [llvm] [WIP] add a mustache backend (PR #108653)   via llvm-commits
• [llvm] [ctx_prof] Fix checks in `PGOCtxprofFlattening` (PR #108467)   via llvm-commits
• [llvm] [WebAssembly] Add more EH assembly test cases (PR #108654)   via llvm-commits
• [lld] d1ba432 - [lld] select a default eflags for hexagon (#108431)   via llvm-commits
• [llvm] ddcc601 - [CoroSplit][DebugInfo] Adjust heuristic for moving DIScope of funclets (#108611)   via llvm-commits
• [llvm] 77bab2a - [llvm][unittests] Strip unneeded use of raw_string_ostream::str() (NFC)   via llvm-commits
• [llvm] 52b48a7 - [llvm][unittests] Strip unneeded use of raw_string_ostream::str() (NFC)   via llvm-commits
• [llvm] 12d4769 - Revert "[MemProf] Streamline and avoid unnecessary context id duplication (#107918)" (#108652)   via llvm-commits
• [llvm] c6c3803 - [RISCV] Add documentation that Zvbc and Zvk* are supported through intrinsics. NFC (#108577)   via llvm-commits
• [llvm] 536bdc9 - [Coverage] Skip empty profile name section (#108480)   via llvm-commits
• [llvm] [Coverage] Skip empty profile name section (PR #108480)   via llvm-commits
• [llvm] [InstCombine] Fold expression using basic properties of floor and ceiling function (PR #107107)   via llvm-commits
• [llvm] c010b72 - [HEXAGON] AddrModeOpt support for HVX and optimize adds (#106368)   via llvm-commits
• [llvm] 459a82e - [llvm][unittests] Don't call raw_string_ostream::flush() (NFC)   via llvm-commits
• [llvm] [IRTranslator][RISCV] Support scalable vector zeroinitializer. (PR #108666)   via llvm-commits
• [llvm] [IRTranslator] Simplify fixed vector ConstantAggregateZero handling. NFC (PR #108667)   via llvm-commits
• [llvm] d3cdf0f - [LLVM][Option] Refactor option name comparison (#108219)   via llvm-commits
• [llvm] Make a tablegen test match-table.td more robust. (PR #106508)   via llvm-commits
• [clang] [llvm] [BPF] Do atomic_fetch_*() pattern matching with memory ordering (PR #107343)   via llvm-commits
• [llvm] 52b3c36 - [NFC][DirectX] Remove rcp dx intrinsic (#108626)   via llvm-commits
• [llvm] d6d4a48 - [WebAssembly] Add type checking for 'throw' (#108641)   via llvm-commits
• [llvm] [WebAssembly] Support assembly parsing for new EH (PR #108668)   via llvm-commits
• [llvm] [WebAssembly] Support assembly parsing for new EH (PR #108668)   via llvm-commits
• [llvm] [LV][NFC] Unified printing format with vector-predication intrinsics with explicit vector length (PR #108177)   via llvm-commits
• [llvm] [LV][NFC] Unified printing format for vector-predication intrinsics (PR #108177)   via llvm-commits
• [llvm] [LV][NFC] Unified printing format for vector-predication intrinsics (PR #108177)   via llvm-commits
• [llvm] [BOLT][AArch64] Do not relax ADR referencing the same fragment (PR #108673)   via llvm-commits
• [compiler-rt] 1825cf2 - [LoongArch][sanitizer] Fix SC_ADDRERR_{RD, WR} missing in the musl environment (#108557)   via llvm-commits
• [compiler-rt] [LoongArch][sanitizer] Fix SC_ADDRERR_{RD,WR} missing in the musl environment (PR #108557)   via llvm-commits
• [llvm] Decompose gep of complex type struct to its element type (PR #107848)   via llvm-commits
• [llvm] [Target] Avoid repeated hash lookups (NFC) (PR #108677)   via llvm-commits
• [llvm] [LoongArch] Set scheduler to register pressure (PR #95741)   via llvm-commits
• [llvm] [LoongArch] Set scheduler to register pressure (PR #95741)   via llvm-commits
• [llvm] [ADT] Remove DenseMap::{getOrInsertDefault,FindAndConstruct} (PR #108678)   via llvm-commits
• [llvm] 82266d3 - [nfc][ctx_prof] Factor the callsite instrumentation exclusion criteria (#108471)   via llvm-commits
• [llvm] [MIPS]Initial support for MIPS16 assembly. (PR #108681)   via llvm-commits
• [llvm] 947374c - [IRTranslator] Simplify fixed vector ConstantAggregateZero handling. NFC (#108667)   via llvm-commits
• [llvm] [X86] Use MCRegister in more places. NFC (PR #108682)   via llvm-commits
• [llvm] 2064557 - [WebAssembly] Add more EH assembly test cases (#108654)   via llvm-commits
• [llvm] [LV][EVL] Support cast instruction with EVL-vectorization (PR #108351)   via llvm-commits
• [llvm] 390b82d - [ADT] Remove DenseMap::{getOrInsertDefault,FindAndConstruct} (#108678)   via llvm-commits
• [llvm] [Mips] Fix mfhi/mflo hazard miscompilation about div and mult (PR #91449)   via llvm-commits
• [llvm] [Mips] Fix mfhi/mflo hazard miscompilation about div and mult (PR #91449)   via llvm-commits
• [llvm] [Mips] Fix mfhi/mflo hazard miscompilation about div and mult (PR #91449)   via llvm-commits
• [llvm] [Mips] Fix mfhi/mflo hazard miscompilation about div and mult (PR #91449)   via llvm-commits
• [compiler-rt] [compiler-rt] Implements DumpAllRegisters for windows intel archs. (PR #108688)   via llvm-commits
• [compiler-rt] [compiler-rt] Implements DumpAllRegisters for windows intel archs. (PR #108688)   via llvm-commits
• [llvm] [Mips] Fix mfhi/mflo hazard miscompilation about div and mult (PR #91449)   via llvm-commits
• [llvm] [NewPM][CodeGen] Add callback style codegen pass builder (PR #108690)   via llvm-commits
• [llvm] [llvm][Support][Memory] Add memfd based fallback for strict W^X Linux systems (PR #98538)   via llvm-commits
• [clang] [compiler-rt] [llvm] [FMV][AArch64] Unify ls64, ls64_v and ls64_accdata. (PR #108024)   via llvm-commits
• [llvm] 18f1c98 - [AMDGPU] Avoid unneeded waitcounts before spill stores (#108303)   via llvm-commits
• [libc] [libcxx] [llvm] [libcxx][libc] Hand in Hand PoC with from_chars (PR #91651)   via llvm-commits
• [llvm] [MIPS] Fix -msingle-float doesn't work with double on O32 (PR #107543)   via llvm-commits
• [llvm] [MIPS] Fix -msingle-float doesn't work with double on O32 (PR #107543)   via llvm-commits
• [llvm] [CMake] Use old DynamicLibrary symbol behavior on AIX for now (PR #108692)   via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   via llvm-commits
• [llvm] [NewPM][CodeGen] Add callback style codegen pass builder (PR #108690)   via llvm-commits
• [llvm] a20a973 - [X86] Use MCRegister in more places. NFC (#108682)   via llvm-commits
• [llvm] [TLI] Add basic support for fdim libcall (PR #108702)   via llvm-commits
• [llvm] [TLI] Add basic support for fdim libcall (PR #108702)   via llvm-commits
• [llvm] [TLI] Add basic support for fdim libcall (PR #108702)   via llvm-commits
• [llvm] [TLI] Add basic support for fdim libcall (PR #108702)   via llvm-commits
• [llvm] 1e4e1ce - [Target] Avoid repeated hash lookups (NFC) (#108677)   via llvm-commits
• [llvm] [VectorCombine] Don't shrink lshr if the shamt is not less than bitwidth (PR #108705)   via llvm-commits
• [llvm] [DAG] Fixing the non-optimal code with the following: `select i1 %0, float 1.0, float 0.0`. (PR #107732)   via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   via llvm-commits
• [compiler-rt] [compiler-rt] add check-cmp flag for nsan (PR #108707)   via llvm-commits
• [compiler-rt] [compiler-rt] add check-cmp flag for nsan (PR #108707)   via llvm-commits
• [llvm] [Attributor] Use more appropriate approach to check flat address space (PR #108713)   via llvm-commits
• [llvm] [VPlan] Add VPIRInstruction, use for exit block live-outs. (PR #100735)   via llvm-commits
• [llvm] f0c5caa - [VPlan] Add VPIRInstruction, use for exit block live-outs. (#100735)   via llvm-commits
• [llvm] [RISCV][Docs] Remove Zvbb, Zvbc and Zvk* from experimental C intrinsics section of RISCVUsage.rst. NFC (PR #108718)   via llvm-commits
• [compiler-rt] [rtsan] Fix RTTI issue, make a better c test (PR #108720)   via llvm-commits
• [llvm] [SandboxVec] Legality boilerplate (PR #108650)   via llvm-commits
• [llvm] [SandboxVec] Legality boilerplate (PR #108650)   via llvm-commits
• [llvm] 367c145 - [IRTranslator][RISCV] Support scalable vector zeroinitializer. (#108666)   via llvm-commits
• [llvm] [NewPM][CodeGen] Add callback style codegen pass builder (PR #108690)   via llvm-commits
• [llvm] [NewPM][CodeGen] Add callback style codegen pass builder (PR #108690)   via llvm-commits
• [compiler-rt] [TSan] fix the module map of main executable on darwin platforms (PR #107227)   via llvm-commits
• [compiler-rt] [compiler-rt] add check-cmp flag for nsan (PR #108707)   via llvm-commits
• [llvm] [RISCV] Add 16 bit GPR sub-register for Zhinx. (PR #107446)   via llvm-commits
• [lld] 00c0b1a - [CGData] LLD for MachO (#90166)   via llvm-commits
• [lld] Reland [CGData] LLD for MachO #90166 (PR #108733)   via llvm-commits
• [llvm] [NewPM][CodeGen] Add callback style codegen pass builder (PR #108690)   via llvm-commits
• [llvm] [X86] Complete AMD znver4 AVX512 zeroing idioms (PR #108740)   via llvm-commits
• [llvm] a75565a - [llvm][ExecutionEngine] Strip unneeded calls to raw_string_ostream::str() (NFC)   via llvm-commits
• [llvm] ddca79a - [DWARFLinker] Avoid repeated hash lookups (NFC) (#108737)   via llvm-commits
• [lld] 4b27b58 - [lld] Nits on uses of raw_string_ostream (NFC)   via llvm-commits
• [clang] [compiler-rt] [llvm] [FMV][AArch64] Unify ls64, ls64_v and ls64_accdata. (PR #108024)   via llvm-commits
• [llvm] [WebAssembly] Fix br type checking (PR #108746)   via llvm-commits
• [llvm] [WebAssembly] Fix br type checking (PR #108746)   via llvm-commits
• [llvm] [WebAssembly] Rename eh-assembly.s to -legacy.s (PR #108747)   via llvm-commits
• [llvm] [SPIR-V] Align memory scopes with SPIR-V specification and LLVM expectations and change default mem scope value (PR #108528)   via llvm-commits
• [llvm] 86f0399 - [InstCombine] Fold expression using basic properties of floor and ceiling function (#107107)   via llvm-commits
• [llvm] ba8e424 - [X86] Add missing immediate qualifier to the (V)INSERTPS instruction names (#108568)   via llvm-commits
• [llvm] [TLI] Add basic support for fdim libcall (PR #108702)   via llvm-commits
• [llvm] [WebAssembly] Fix .functype directives in tests (PR #108748)   via llvm-commits
• [llvm] 87663fd - [VectorCombine] Don't shrink lshr if the shamt is not less than bitwidth (#108705)   via llvm-commits
• [llvm] 614a064 - [X86] Add missing immediate qualifier to the (V)INSERT/EXTRACT/PERM2 instruction names (#108593)   via llvm-commits
• [llvm] [TLI] Add basic support for fdim libcall (PR #108702)   via llvm-commits
• [llvm] 8837898 - [DAGCombine] Count leading ones: refine post DAG/Type Legalisation if promotion (#102877)   via llvm-commits
• [llvm] 3ae71d1 - [LLVM][TableGen] Change CodeGenSchedule to use const RecordKeeper (#108617)   via llvm-commits
• [llvm] [X86,SimplifyCFG] Use passthru to reduce select (PR #108754)   via llvm-commits
• [llvm] [NewPM][CodeGen] Add callback style codegen pass builder (PR #108690)   via llvm-commits
• [llvm] [NewPM][CodeGen] Add callback style codegen pass builder (PR #108690)   via llvm-commits
• [llvm] [TLI] Add basic support for fdim libcall (PR #108702)   via llvm-commits
• [llvm] [TLI] Add basic support for fdim libcall (PR #108702)   via llvm-commits
• [llvm] [GlobalIsel] Canonicalize G_ICMP (PR #108755)   via llvm-commits
• [llvm] [GlobalIsel] Canonicalize G_ICMP (PR #108755)   via llvm-commits
• [lld] f4763b3 - Reland [CGData] LLD for MachO #90166 (#108733)   via llvm-commits
• [llvm] [llvm][AMDGPU] Implemented isProfitableToHoist and isFMAFasterThanFMulAndFAdd (PR #108756)   via llvm-commits
• [llvm] [llvm][AMDGPU] Implemented isProfitableToHoist and isFMAFasterThanFMulAndFAdd (PR #108756)   via llvm-commits
• [llvm] [llvm][AMDGPU] Implemented isProfitableToHoist and isFMAFasterThanFMulAndFAdd (PR #108756)   via llvm-commits
• [llvm] [DebugInfo] Add fast path for parsing DW_TAG_compile_unit abbrevs (PR #108757)   via llvm-commits
• [llvm] [DebugInfo] Add fast path for parsing DW_TAG_compile_unit abbrevs (PR #108757)   via llvm-commits
• [llvm] 8783bd5 - [LLVM][TableGen] Change CodeGenInstAlias to use const Record pointers (#108753)   via llvm-commits
• [llvm] 43f044b - [LLVM][TableGen] Change CodeGenTarget to use const RecordKeeper (#108752)   via llvm-commits
• [libcxx] [llvm] [libc++][CI] Update to Clang-20 (PR #108761)   via llvm-commits
• [llvm] [Instrumentation] Remove extraneous std::move (NFC) (PR #108764)   via llvm-commits
• [llvm] [RISCV] Split fp rounding ops with zvfhmin nxv32f16 (PR #108765)   via llvm-commits
• [llvm] goldsteinn/fix issue 108722 (PR #108767)   via llvm-commits
• [llvm] goldsteinn/fix issue 108722 (PR #108767)   via llvm-commits
• [llvm] [X86] Fix missing check of rotate <-> shift equivilence (Issue 108722) (PR #108767)   via llvm-commits
• [llvm] [X86] Fix missing check of rotate <-> shift equivilence (Issue 108722) (PR #108767)   via llvm-commits
• [llvm] [X86] Fix missing check of rotate <-> shift equivilence (Issue 108722) (PR #108767)   via llvm-commits
• [llvm] [LLVM][TableGen] Change CodeGenDAGPatterns to use const RecordKeeper (PR #108762)   via llvm-commits
• [llvm] 87e8b53 - [LLVM][TableGen] Change CodeGenDAGPatterns to use const RecordKeeper (#108762)   via llvm-commits
• [llvm] 8e00afc - [LLVM][TableGen] Change SubtargetEmitter to use const RecordKeeper (#108763)   via llvm-commits
• [llvm] 00e4575 - [Instrumentation] Remove extraneous std::move (NFC) (#108764)   via llvm-commits
• [llvm] [VPlan] Delay adding canonical IV increment and exit branches. (PR #82270)   via llvm-commits
• [llvm] [VPlan] Delay adding canonical IV increment and exit branches. (PR #82270)   via llvm-commits
• [llvm] [VPlan] Delay adding canonical IV increment and exit branches. (PR #82270)   via llvm-commits
• [llvm] [VPlan] Delay adding canonical IV increment and exit branches. (PR #82270)   via llvm-commits
• [llvm] [VPlan] Delay adding canonical IV increment and exit branches. (PR #82270)   via llvm-commits
• [llvm] [VPlan] Delay adding canonical IV increment and exit branches. (PR #82270)   via llvm-commits
• [llvm] [VPlan] Delay adding canonical IV increment and exit branches. (PR #82270)   via llvm-commits
• [llvm] [VPlan] Delay adding canonical IV increment and exit branches. (PR #82270)   via llvm-commits
• [llvm] [VPlan] Delay adding canonical IV increment and exit branches. (PR #82270)   via llvm-commits
• [llvm] [VPlan] Delay adding canonical IV increment and exit branches. (PR #82270)   via llvm-commits
• [llvm] [VPlan] Delay adding canonical IV increment and exit branches. (PR #82270)   via llvm-commits
• [llvm] [VPlan] Delay adding canonical IV increment and exit branches. (PR #82270)   via llvm-commits
• [llvm] [VPlan] Delay adding canonical IV increment and exit branches. (PR #82270)   via llvm-commits
• [llvm] [VPlan] Delay adding canonical IV increment and exit branches. (PR #82270)   via llvm-commits
• [llvm] [VirtRegMap] Store MCRegister in Virt2PhysMap. (PR #108775)   via llvm-commits
• [llvm] [VirtRegMap] Store MCRegister in Virt2PhysMap. (PR #108775)   via llvm-commits
• [llvm] [Scalarizer][DirectX] Add support for scalarization of Target intrinsics (PR #108776)   via llvm-commits
• [llvm] [SCEV] Add predicate in SolveLinEq to ensure B is a multiple of A. (PR #108777)   via llvm-commits
• [llvm] [SCEV] Add predicate in SolveLinEq to ensure B is a multiple of A. (PR #108777)   via llvm-commits
• [llvm] a5b63b5 - [VirtRegMap] Store MCRegister in Virt2PhysMap. (#108775)   via llvm-commits
• [llvm] [RISCV][GISel] Use libcalls for rint, nearbyint, trunc, and round intrinsics. (PR #108779)   via llvm-commits
• [llvm] [X86] Consistently use 'k' for predicate mask registers in instruction names (PR #108780)   via llvm-commits
• [llvm] [WIP][SPARC] Allow overaligned `alloca`s (PR #107223)   via llvm-commits
• [llvm] [VirtRegMap] Remove unused MAX_STACK_SLOT. NFC (PR #108781)   via llvm-commits
• [llvm] [VirtRegMap] Remove unused MAX_STACK_SLOT. NFC (PR #108781)   via llvm-commits
• [llvm] [X86] Fix missing check of rotate <-> shift equivilence (Issue 108722) (PR #108767)   via llvm-commits
• [llvm] [X86] Fix missing check of rotate <-> shift equivilence (Issue 108722) (PR #108767)   via llvm-commits
• [llvm] [X86] Fix missing check of rotate <-> shift equivilence (Issue 108722) (PR #108767)   via llvm-commits
• [llvm] [X86] Fix missing check of rotate <-> shift equivilence (Issue 108722) (PR #108767)   via llvm-commits
• [llvm] [X86] Fix missing check of rotate <-> shift equivilence (Issue 108722) (PR #108767)   via llvm-commits
• [llvm] [X86] Fix missing check of rotate <-> shift equivilence (Issue 108722) (PR #108767)   via llvm-commits
• [llvm] [X86] Fix missing check of rotate <-> shift equivilence (Issue 108722) (PR #108767)   via llvm-commits
• [llvm] [X86] Fix missing check of rotate <-> shift equivilence (Issue 108722) (PR #108767)   via llvm-commits
• [llvm] [X86] Fix missing check of rotate <-> shift equivilence (Issue 108722) (PR #108767)   via llvm-commits
• [llvm] [WIP][SPARC] Allow overaligned `alloca`s (PR #107223)   via llvm-commits
• [llvm] [AMDGPU] Include unused preload kernarg in KD total SGPR count (PR #104743)   via llvm-commits
• [llvm] [NewPM][CodeGen] Add callback style codegen pass builder (PR #108690)   via llvm-commits
• [llvm] [NewPM][CodeGen] Add callback style codegen pass builder (PR #108690)   via llvm-commits
• [clang] [llvm] [RISCV] Implement Clang Builtins for XCValu Extension in CV32E40P (PR #100684)   via llvm-commits
• [clang] [llvm] [CGData][ThinLTO][NFC] Prep for two-codegen rounds (PR #90934)   via llvm-commits
• [clang] [llvm] [CGData][ThinLTO][NFC] Prep for two-codegen rounds (PR #90934)   via llvm-commits
• [clang] [llvm] [CGData][ThinLTO] Global Outlining with Two-CodeGen Rounds (PR #90933)   via llvm-commits
• [clang] [lld] [llvm] [mlir] [IR] Introduce `T<address space>` to `DataLayout` to represent flat address space if a target supports it (PR #108786)   via llvm-commits
• [llvm] 2ae968a - [Instrumentation] Move out to Utils (NFC) (#108532)   via llvm-commits
• [llvm] [WebAssembly] Add indentations to annotations.s (PR #108790)   via llvm-commits
• [llvm] [BOLT][NFC] Make YamlProfileToFunction a DenseMap (PR #108712)   via llvm-commits
• [llvm] [AArch64][CostModel] Reduce the cost of fadd reduction with fast flag (PR #108791)   via llvm-commits
• [clang] [llvm] [CodeView] Flatten cmd args in frontend for LF_BUILDINFO (PR #106369)   via llvm-commits
• [llvm] [Codegen][LegalizeIntegerTypes] Improve shift through stack (PR #96151)   via llvm-commits
• [llvm] [IPO] Avoid repeated hash lookups (NFC) (PR #108796)   via llvm-commits
• [llvm] [NVPTX] Check Before inserting AddrSpaceCastInst in NVPTXLoweringAlloca (PR #106127)   weiwei chen via llvm-commits
• [llvm] [NVPTX] Check Before inserting AddrSpaceCastInst in NVPTXLoweringAlloca (PR #106127)   weiwei chen via llvm-commits
• [llvm] [PowerPC] Utilize getReservedRegs to find asm clobberable registers. (PR #107863)   zhijian lin via llvm-commits
• [llvm] [PowerPC] Utilize getReservedRegs to find asm clobberable registers. (PR #107863)   zhijian lin via llvm-commits
• [llvm] delete MF.verify from PPCMIPeephole pass (PR #108075)   zhijian lin via llvm-commits