[llvm] [InitUndef] Enable the InitUndef pass on non-AMDGPU targets (PR #108353)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 13 10:49:34 PDT 2024
================
@@ -0,0 +1,44 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
+# RUN: llc -mtriple=aarch64-- -run-pass=init-undef -o - %s | FileCheck %s
+
+--- |
+ define dso_local i32 @test_stxp_undef(ptr %p, i64 %x) #0 {
+ %res = call i32 @llvm.aarch64.stxp(i64 undef, i64 %x, ptr %p)
+ ret i32 %res
+ }
+
+...
+---
+name: test_stxp_undef
+alignment: 4
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: gpr64common }
+ - { id: 1, class: gpr64 }
+ - { id: 2, class: gpr32 }
+ - { id: 3, class: gpr64 }
+liveins:
+ - { reg: '$x0', virtual-reg: '%0' }
+ - { reg: '$x1', virtual-reg: '%1' }
+body: |
+ bb.0 (%ir-block.0):
+ liveins: $x0, $x1
+
+ ; CHECK-LABEL: name: test_stxp_undef
+ ; CHECK: liveins: $x0, $x1
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x1
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64common = COPY $x0
+ ; CHECK-NEXT: [[DEF:%[0-9]+]]:gpr64 = IMPLICIT_DEF
+ ; CHECK-NEXT: [[INIT_UNDEF:%[0-9]+]]:gpr64 = INIT_UNDEF
+ ; CHECK-NEXT: early-clobber %2:gpr32 = STXPX killed [[INIT_UNDEF]], [[COPY]], [[COPY1]] :: (volatile store (s128) into %ir.p)
+ ; CHECK-NEXT: $w0 = COPY %2
+ ; CHECK-NEXT: RET_ReallyLR implicit $w0
+ %1:gpr64 = COPY $x1
+ %0:gpr64common = COPY $x0
+ %3:gpr64 = IMPLICIT_DEF
+ early-clobber %2:gpr32 = STXPX killed %3, %1, %0 :: (volatile store (s128) into %ir.p)
----------------
arsenm wrote:
```suggestion
early-clobber %2:gpr32 = STXPX killed %3, %1, %0 :: (volatile store (s128))
```
https://github.com/llvm/llvm-project/pull/108353
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