[llvm] ccc52a8 - [AMDGPU] Remove dead code in SIISelLowering (NFC) (#108198)

[via llvm-commits]

Author: Nicolas Miller
Date: 2024-09-11T15:52:10+01:00
New Revision: ccc52a817fb4b7579f2749d4242eff91371040f7

URL: https://github.com/llvm/llvm-project/commit/ccc52a817fb4b7579f2749d4242eff91371040f7
DIFF: https://github.com/llvm/llvm-project/commit/ccc52a817fb4b7579f2749d4242eff91371040f7.diff

LOG: [AMDGPU] Remove dead code in SIISelLowering (NFC) (#108198)

This return is dead code as the return just above will always be taken.

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/SIISelLowering.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index bbb1d0c5eba148..9a6d617e6ee4cf 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -16207,9 +16207,6 @@ SITargetLowering::shouldExpandAtomicRMWInIR(AtomicRMWInst *RMW) const {
     return isAtomicRMWLegalXChgTy(RMW)
                ? TargetLowering::AtomicExpansionKind::None
                : TargetLowering::AtomicExpansionKind::CmpXChg;
-
-    // PCIe supports add and xchg for system atomics.
-    return atomicSupportedIfLegalIntType(RMW);
   }
   case AtomicRMWInst::Add:
   case AtomicRMWInst::And: