[llvm] [SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands. (PR #107273)

[Alexey Bataev via llvm-commits]

alexey-bataev wrote:

> > Ping!
> 
> My previous question still stands. Can you explain how this version of the patch differs (profitability heuristic wise) from the previous? I'm not asking to be difficult. I'm asking because it's hard to review the change without knowing what your intention and reasoning is.

It does not add any profitability checks. It just checks for the actual number of parts (registers), used in the codegen for the type, and tries to operate on the whole parts only.

I'm going to make this mode (whole number of registers, but number of elements is non-power-of-2) default for the key instructions, when trying to build/analyze the graph. 
When you have non-power-of-2 number of key nodes (say, 7), the compiler first try to vectorize all 7 elements. If it fails, it falls back to power-of-2 elements, i.e. 4. Instead, we may try to vectorize 6 elements, if they operate on 3 full registers. In some cases, it might be more profitable than 4 elements (because of the cross-use between registers)

https://github.com/llvm/llvm-project/pull/107273