[llvm] [Target] Avoid repeated hash lookups (NFC) (PR #108677)
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Fri Sep 13 20:25:04 PDT 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-arm
Author: Kazu Hirata (kazutakahirata)
<details>
<summary>Changes</summary>
---
Full diff: https://github.com/llvm/llvm-project/pull/108677.diff
2 Files Affected:
- (modified) llvm/lib/Target/ARM/ARMISelLowering.cpp (-1)
- (modified) llvm/lib/Target/RISCV/RISCVISelLowering.cpp (-1)
``````````diff
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 67653a17512d2c..db564d7e841aa9 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -8017,7 +8017,6 @@ SDValue ARMTargetLowering::LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG,
if (!isa<ConstantFPSDNode>(V) && !isa<ConstantSDNode>(V))
isConstant = false;
- ValueCounts.insert(std::make_pair(V, 0));
unsigned &Count = ValueCounts[V];
// Is this value dominant? (takes up more than half of the lanes)
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index ab49315c12d685..7d2a7b20ba2508 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -3679,7 +3679,6 @@ static SDValue lowerBuildVectorViaDominantValues(SDValue Op, SelectionDAG &DAG,
if (V.isUndef())
continue;
- ValueCounts.insert(std::make_pair(V, 0));
unsigned &Count = ValueCounts[V];
if (0 == Count)
if (auto *CFP = dyn_cast<ConstantFPSDNode>(V))
``````````
</details>
https://github.com/llvm/llvm-project/pull/108677
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