[llvm] [AMDGPU] Avoid unneeded waitcounts before spill stores (PR #108303)

[Stanislav Mekhanoshin via llvm-commits]

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@@ -901,7 +901,7 @@ void WaitcntBrackets::updateByEvent(const SIInstrInfo *TII,
     }
   } else /* LGKM_CNT || EXP_CNT || VS_CNT || NUM_INST_CNTS */ {
     // Match the score to the destination registers.
-    for (unsigned I = 0, E = Inst.getNumOperands(); I != E; ++I) {
+    for (unsigned I = 0, E = Inst.getNumExplicitOperands(); I != E; ++I) {
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rampitec wrote:

> > Besides, there is no way to load vcc
> 
> Yes there is! You can load it with s_load or s_buffer_load.

*** Bad machine code: Illegal physical register for instruction ***
- function:    load_vcc_wait
- basic block: %bb.0  (0x87a5980)
- instruction: $vcc = S_LOAD_DWORD_IMM $sgpr10_sgpr11, 0, 0
- operand 0:   $vcc
$vcc is not a SReg_32_XM0_XEXEC register.
LLVM ERROR: Found 2 machine code errors.

https://github.com/llvm/llvm-project/pull/108303