[llvm] [RISCV] Add documentation that Zvk* are supported through intrinsics. NFC (PR #108577)

[Craig Topper via llvm-commits]

https://github.com/topperc updated https://github.com/llvm/llvm-project/pull/108577

>From 763d96cd304ff18715f41410a768d3721e4d7893 Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Fri, 13 Sep 2024 07:47:16 -0700
Subject: [PATCH 1/2] [RISCV] Add documentation that Zvk* are supported through
 intrinsics. NFC

---
 llvm/docs/RISCVUsage.rst | 33 +++++++++++++++++++--------------
 1 file changed, 19 insertions(+), 14 deletions(-)

diff --git a/llvm/docs/RISCVUsage.rst b/llvm/docs/RISCVUsage.rst
index a15af9adfa945a..a5055d88095c08 100644
--- a/llvm/docs/RISCVUsage.rst
+++ b/llvm/docs/RISCVUsage.rst
@@ -217,20 +217,20 @@ on support follow.
      ``Zvfbfmin``      Supported
      ``Zvfbfwma``      Supported
      ``Zvfh``          Supported
-     ``Zvkb``          Assembly Support
-     ``Zvkg``          Assembly Support
-     ``Zvkn``          Assembly Support
-     ``Zvknc``         Assembly Support
-     ``Zvkned``        Assembly Support
-     ``Zvkng``         Assembly Support
-     ``Zvknha``        Assembly Support
-     ``Zvknhb``        Assembly Support
-     ``Zvks``          Assembly Support
-     ``Zvksc``         Assembly Support
-     ``Zvksed``        Assembly Support
-     ``Zvksg``         Assembly Support
-     ``Zvksh``         Assembly Support
-     ``Zvkt``          Assembly Support
+     ``Zvkb``          Supported (`See note <#iscv-vector-crypto-note>`__)
+     ``Zvkg``          Supported (`See note <#iscv-vector-crypto-note>`__)
+     ``Zvkn``          Supported (`See note <#iscv-vector-crypto-note>`__)
+     ``Zvknc``         Supported (`See note <#iscv-vector-crypto-note>`__)
+     ``Zvkned``        Supported (`See note <#iscv-vector-crypto-note>`__)
+     ``Zvkng``         Supported (`See note <#iscv-vector-crypto-note>`__)
+     ``Zvknha``        Supported (`See note <#iscv-vector-crypto-note>`__)
+     ``Zvknhb``        Supported (`See note <#iscv-vector-crypto-note>`__)
+     ``Zvks``          Supported (`See note <#iscv-vector-crypto-note>`__)
+     ``Zvksc``         Supported (`See note <#iscv-vector-crypto-note>`__)
+     ``Zvksed``        Supported (`See note <#iscv-vector-crypto-note>`__)
+     ``Zvksg``         Supported (`See note <#iscv-vector-crypto-note>`__)
+     ``Zvksh``         Supported (`See note <#iscv-vector-crypto-note>`__)
+     ``Zvkt``          Supported
      ``Zvl32b``        (`Partially <#riscv-vlen-32-note>`__) Supported
      ``Zvl64b``        Supported
      ``Zvl128b``       Supported
@@ -266,6 +266,11 @@ Supported
 ``Zknd``, ``Zkne``, ``Zknh``, ``Zksed``, ``Zksh``
   No pattern matching exists.  As a result, these instructions can only be used from assembler or via intrinsic calls.
 
+.. _riscv-vector-crypto-note:
+
+``Zvkg``, ``Zvkn``, ``Zvknc``, ``Zvkned``, ``Zvkng``, ``Zvknha``, ``Zvknhb``, ``Zvks``, ``Zvks``, ``Zvks``, ``Zvksc``, ``Zvksed``, ``Zvksg``, ``Zvksh``.
+  No pattern matching exists. As a result, these instructions can only be used from assembler or via intrinsic calls.
+
 .. _riscv-vlen-32-note:
 
 ``Zve32x``, ``Zve32f``, ``Zvl32b``

>From b9b58fb2501fc3b61e66548da4d0a8a081e3ed5e Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Fri, 13 Sep 2024 07:51:29 -0700
Subject: [PATCH 2/2] fixup! Add Zvbc too

---
 llvm/docs/RISCVUsage.rst | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/llvm/docs/RISCVUsage.rst b/llvm/docs/RISCVUsage.rst
index a5055d88095c08..de702f36e57eb1 100644
--- a/llvm/docs/RISCVUsage.rst
+++ b/llvm/docs/RISCVUsage.rst
@@ -208,7 +208,7 @@ on support follow.
      ``Zmmul``         Supported
      ``Ztso``          Supported
      ``Zvbb``          Assembly Support
-     ``Zvbc``          Assembly Support
+     ``Zvbc``          Supported (`See note <#iscv-vector-crypto-note>`__)
      ``Zve32x``        (`Partially <#riscv-vlen-32-note>`__) Supported
      ``Zve32f``        (`Partially <#riscv-vlen-32-note>`__) Supported
      ``Zve64x``        Supported
@@ -268,7 +268,7 @@ Supported
 
 .. _riscv-vector-crypto-note:
 
-``Zvkg``, ``Zvkn``, ``Zvknc``, ``Zvkned``, ``Zvkng``, ``Zvknha``, ``Zvknhb``, ``Zvks``, ``Zvks``, ``Zvks``, ``Zvksc``, ``Zvksed``, ``Zvksg``, ``Zvksh``.
+``Zvbc``, ``Zvkg``, ``Zvkn``, ``Zvknc``, ``Zvkned``, ``Zvkng``, ``Zvknha``, ``Zvknhb``, ``Zvks``, ``Zvks``, ``Zvks``, ``Zvksc``, ``Zvksed``, ``Zvksg``, ``Zvksh``.
   No pattern matching exists. As a result, these instructions can only be used from assembler or via intrinsic calls.
 
 .. _riscv-vlen-32-note: