[llvm] [RISCV] Add 16 bit GPR sub-register for Zhinx. (PR #107446)

[Craig Topper via llvm-commits]

topperc wrote:

> You say that fsgnj gives better results vs mv - I'm assuming this is for real world code? Because for the modified in-tree tests, surely using `mv` where possible is better due to being potentially compressible? Happy to go with your judgement, but it probably deserves a TODO/FIXME somewhere like the tests to note that a semantically equivalent mv would be more compressible (and so someone sufficiently motivated might later pick it up).

The subreg operations needed to use the existing ADDI seem to pessimize Machine Copy Propagation on some of the lit tests. I think this is because some implicit operands get added and MachineCopyPropagation doesn't know how those implicit operands relate to the explicit operands so it conservatively gives up. I have not done any testing of this on real world code. I suspect a GPRF16 CodeGenOnly copy instruction may fix this issue, but haven't checked yet.

https://github.com/llvm/llvm-project/pull/107446