[llvm] [X86] Complete AMD znver4 AVX512 zeroing idioms (PR #108740)
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sun Sep 15 03:37:10 PDT 2024
================
@@ -1877,15 +1901,29 @@ def Zn4WriteVZeroIdiomALUX : SchedWriteVariant<[
// PCMPGTBrr, PCMPGTWrr, PCMPGTDrr, PCMPGTQrr are not zero-cycle!
def : InstRW<[Zn4WriteVZeroIdiomALUX],
(instrs VPSUBBrr, VPSUBWrr, VPSUBDrr, VPSUBQrr,
- VPCMPGTBrr, VPCMPGTWrr, VPCMPGTDrr, VPCMPGTQrr)>;
+ VPSUBBZ128rr, VPSUBWZ128rr, VPSUBDZ128rr, VPSUBQZ128rr,
+ VPCMPGTBrr, VPCMPGTWrr, VPCMPGTDrr, VPCMPGTQrr,
+ VPCMPGTBZ128rr, VPCMPGTWZ128rr,
+ VPCMPGTDZ128rr, VPCMPGTQZ128rr)>;
----------------
RKSimon wrote:
@ganeshgit Please can you confirm that AVX512 VPCMPGTZ128/Z256/Z style compares (which write to k-reg) are zero-idioms? It says so in the SoG but I'm concerned its a cut+paste typo.
https://github.com/llvm/llvm-project/pull/108740
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