[llvm] [Mips] Optimize `or (and $src1, mask0), (shl $src2, mask1)` to `ins` (PR #103017)

via llvm-commits llvm-commits at lists.llvm.org
Wed Sep 11 20:35:33 PDT 2024


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@@ -876,38 +876,84 @@ static SDValue performANDCombine(SDNode *N, SelectionDAG &DAG,
 static SDValue performORCombine(SDNode *N, SelectionDAG &DAG,
                                 TargetLowering::DAGCombinerInfo &DCI,
                                 const MipsSubtarget &Subtarget) {
-  // Pattern match INS.
-  //  $dst = or (and $src1 , mask0), (and (shl $src, pos), mask1),
-  //  where mask1 = (2**size - 1) << pos, mask0 = ~mask1
-  //  => ins $dst, $src, size, pos, $src1
   if (DCI.isBeforeLegalizeOps() || !Subtarget.hasExtractInsert())
     return SDValue();
 
-  SDValue And0 = N->getOperand(0), And1 = N->getOperand(1);
+  SDValue FirstOperand = N->getOperand(0), SecondOperand = N->getOperand(1);
   unsigned SMPos0, SMSize0, SMPos1, SMSize1;
   ConstantSDNode *CN, *CN1;
+  uint64_t Pos = 0;
+
+  if ((FirstOperand.getOpcode() == ISD::AND &&
+       SecondOperand.getOpcode() == ISD::SHL) ||
+      (FirstOperand.getOpcode() == ISD::SHL &&
+       SecondOperand.getOpcode() == ISD::AND)) {
+    // Pattern match INS.
+    //   $dst = or (and $src1, (2**size0 - 1)), (shl $src2, size0)
+    //   ==> ins $src1, $src2, pos, size, pos = size0, size = 32 - pos;
+    //   Or:
+    //   $dst = or (shl $src2, size0), (and $src1, (2**size0 - 1))
+    //   ==> ins $src1, $src2, pos, size, pos = size0, size = 32 - pos;
+    SDValue Operand1 = FirstOperand.getOpcode() == ISD::AND
+                           ? FirstOperand.getOperand(1)
+                           : SecondOperand.getOperand(1);
+    if (!(CN = dyn_cast<ConstantSDNode>(Operand1)) ||
+        !isShiftedMask_64(CN->getZExtValue(), SMPos0, SMSize0))
----------------
yingopq wrote:

When using `isShiftedMask_64`, its parameter has been zero expanded with `CN->getZExtValue()`, is that okay?

https://github.com/llvm/llvm-project/pull/103017


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