[llvm] [TableGen] Change CodeGenInstruction record members to const (PR #107921)
Rahul Joshi via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 9 14:44:15 PDT 2024
https://github.com/jurahul created https://github.com/llvm/llvm-project/pull/107921
Change CodeGenInstruction::{TheDef, InfereredFrom} to const pointers.
>From a29ed807ddd7149d220fcdd707bd74a5381ed6c1 Mon Sep 17 00:00:00 2001
From: Rahul Joshi <rjoshi at nvidia.com>
Date: Mon, 9 Sep 2024 14:33:54 -0700
Subject: [PATCH] [TableGen] Change CodeGenInstruction record members to const
Change CodeGenInstruction::{TheDef, InfereredFrom} to const pointers.
---
llvm/utils/TableGen/AsmMatcherEmitter.cpp | 2 +-
llvm/utils/TableGen/CodeEmitterGen.cpp | 4 +-
llvm/utils/TableGen/CodeGenMapTable.cpp | 4 +-
.../TableGen/Common/CodeGenDAGPatterns.cpp | 49 ++++++++-------
.../TableGen/Common/CodeGenDAGPatterns.h | 61 +++++++++----------
.../TableGen/Common/CodeGenInstruction.cpp | 10 +--
.../TableGen/Common/CodeGenInstruction.h | 8 +--
.../utils/TableGen/Common/CodeGenSchedule.cpp | 2 +-
llvm/utils/TableGen/Common/DAGISelMatcher.h | 6 +-
.../GlobalISel/GlobalISelMatchTable.cpp | 2 +-
.../Common/GlobalISel/GlobalISelMatchTable.h | 5 +-
.../TableGen/Common/VarLenCodeEmitterGen.cpp | 8 +--
llvm/utils/TableGen/DAGISelEmitter.cpp | 4 +-
llvm/utils/TableGen/DAGISelMatcherEmitter.cpp | 10 +--
llvm/utils/TableGen/DAGISelMatcherGen.cpp | 8 +--
llvm/utils/TableGen/FastISelEmitter.cpp | 8 +--
llvm/utils/TableGen/GlobalISelEmitter.cpp | 20 +++---
llvm/utils/TableGen/InstrDocsEmitter.cpp | 2 +-
llvm/utils/TableGen/X86FoldTablesEmitter.cpp | 6 +-
19 files changed, 110 insertions(+), 109 deletions(-)
diff --git a/llvm/utils/TableGen/AsmMatcherEmitter.cpp b/llvm/utils/TableGen/AsmMatcherEmitter.cpp
index c5849b6c12dfc7..4a1bf7ea5ef201 100644
--- a/llvm/utils/TableGen/AsmMatcherEmitter.cpp
+++ b/llvm/utils/TableGen/AsmMatcherEmitter.cpp
@@ -504,7 +504,7 @@ struct MatchableInfo {
/// TheDef - This is the definition of the instruction or InstAlias that this
/// matchable came from.
- Record *const TheDef;
+ const Record *const TheDef;
// ResInstSize - The size of the resulting instruction for this matchable.
unsigned ResInstSize;
diff --git a/llvm/utils/TableGen/CodeEmitterGen.cpp b/llvm/utils/TableGen/CodeEmitterGen.cpp
index 88acd79cab092e..69ca9a84953a30 100644
--- a/llvm/utils/TableGen/CodeEmitterGen.cpp
+++ b/llvm/utils/TableGen/CodeEmitterGen.cpp
@@ -403,7 +403,7 @@ void CodeEmitterGen::emitInstructionBaseValues(
<< HWM.getModeName(HwMode, /*IncludeDefault=*/true) << "[] = {\n";
for (const CodeGenInstruction *CGI : NumberedInstructions) {
- Record *R = CGI->TheDef;
+ const Record *R = CGI->TheDef;
if (R->getValueAsString("Namespace") == "TargetOpcode" ||
R->getValueAsBit("isPseudo")) {
@@ -485,7 +485,7 @@ void CodeEmitterGen::run(raw_ostream &o) {
std::set<unsigned> HwModes;
BitWidth = 0;
for (const CodeGenInstruction *CGI : NumberedInstructions) {
- Record *R = CGI->TheDef;
+ const Record *R = CGI->TheDef;
if (R->getValueAsString("Namespace") == "TargetOpcode" ||
R->getValueAsBit("isPseudo"))
continue;
diff --git a/llvm/utils/TableGen/CodeGenMapTable.cpp b/llvm/utils/TableGen/CodeGenMapTable.cpp
index fbf1d47c0327d9..46aad7f7f8bdd9 100644
--- a/llvm/utils/TableGen/CodeGenMapTable.cpp
+++ b/llvm/utils/TableGen/CodeGenMapTable.cpp
@@ -185,7 +185,7 @@ class MapTableEmitter {
// KeyInstrVec - list of key instructions.
std::vector<Record *> KeyInstrVec;
- DenseMap<Record *, std::vector<Record *>> MapTable;
+ DenseMap<const Record *, std::vector<Record *>> MapTable;
public:
MapTableEmitter(CodeGenTarget &Target, RecordKeeper &Records, Record *IMRec)
@@ -371,7 +371,7 @@ unsigned MapTableEmitter::emitBinSearchTable(raw_ostream &OS) {
// emitted as first column.
OS << "Table[][" << NumCol + 1 << "] = {\n";
for (unsigned i = 0; i < TotalNumInstr; i++) {
- Record *CurInstr = NumberedInstructions[i]->TheDef;
+ const Record *CurInstr = NumberedInstructions[i]->TheDef;
std::vector<Record *> ColInstrs = MapTable[CurInstr];
std::string OutStr;
unsigned RelExists = 0;
diff --git a/llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp b/llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
index 458247811091e4..a77e2472ef2cbc 100644
--- a/llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
+++ b/llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
@@ -1255,28 +1255,28 @@ bool TreePredicateFn::isAtomicOrderingWeakerThanRelease() const {
false);
}
Record *TreePredicateFn::getMemoryVT() const {
- Record *R = getOrigPatFragRecord()->getRecord();
+ const Record *R = getOrigPatFragRecord()->getRecord();
if (R->isValueUnset("MemoryVT"))
return nullptr;
return R->getValueAsDef("MemoryVT");
}
ListInit *TreePredicateFn::getAddressSpaces() const {
- Record *R = getOrigPatFragRecord()->getRecord();
+ const Record *R = getOrigPatFragRecord()->getRecord();
if (R->isValueUnset("AddressSpaces"))
return nullptr;
return R->getValueAsListInit("AddressSpaces");
}
int64_t TreePredicateFn::getMinAlignment() const {
- Record *R = getOrigPatFragRecord()->getRecord();
+ const Record *R = getOrigPatFragRecord()->getRecord();
if (R->isValueUnset("MinAlignment"))
return 0;
return R->getValueAsInt("MinAlignment");
}
Record *TreePredicateFn::getScalarMemoryVT() const {
- Record *R = getOrigPatFragRecord()->getRecord();
+ const Record *R = getOrigPatFragRecord()->getRecord();
if (R->isValueUnset("ScalarMemoryVT"))
return nullptr;
return R->getValueAsDef("ScalarMemoryVT");
@@ -1390,7 +1390,7 @@ std::string TreePredicateFn::getCodeToRunOnSDNode() const {
if (Tree->isLeaf())
TreeClassName = "SDNode";
else {
- Record *Op = Tree->getOperator();
+ const Record *Op = Tree->getOperator();
const SDNodeInfo &Info = PatFragRec->getDAGPatterns().getSDNodeInfo(Op);
TreeClassName = Info.getSDClassName();
}
@@ -1848,7 +1848,8 @@ MVT::SimpleValueType SDNodeInfo::getKnownType(unsigned ResNo) const {
// TreePatternNode implementation
//
-static unsigned GetNumNodeResults(Record *Operator, CodeGenDAGPatterns &CDP) {
+static unsigned GetNumNodeResults(const Record *Operator,
+ CodeGenDAGPatterns &CDP) {
if (Operator->getName() == "set" || Operator->getName() == "implicit")
return 0; // All return nothing.
@@ -2077,7 +2078,7 @@ void TreePatternNode::InlinePatternFragments(
return;
}
- Record *Op = getOperator();
+ const Record *Op = getOperator();
if (!Op->isSubClassOf("PatFrags")) {
if (getNumChildren() == 0) {
@@ -2340,7 +2341,7 @@ TreePatternNode::getIntrinsicInfo(const CodeGenDAGPatterns &CDP) const {
/// return the ComplexPattern information, otherwise return null.
const ComplexPattern *
TreePatternNode::getComplexPatternInfo(const CodeGenDAGPatterns &CGP) const {
- Record *Rec;
+ const Record *Rec;
if (isLeaf()) {
DefInit *DI = dyn_cast<DefInit>(getLeafValue());
if (!DI)
@@ -2793,7 +2794,7 @@ bool TreePatternNode::canPatternMatch(std::string &Reason,
// TreePattern implementation
//
-TreePattern::TreePattern(Record *TheRec, ListInit *RawPat, bool isInput,
+TreePattern::TreePattern(const Record *TheRec, ListInit *RawPat, bool isInput,
CodeGenDAGPatterns &cdp)
: TheRecord(TheRec), CDP(cdp), isInputPattern(isInput), HasError(false),
Infer(*this) {
@@ -2801,15 +2802,15 @@ TreePattern::TreePattern(Record *TheRec, ListInit *RawPat, bool isInput,
Trees.push_back(ParseTreePattern(I, ""));
}
-TreePattern::TreePattern(Record *TheRec, DagInit *Pat, bool isInput,
+TreePattern::TreePattern(const Record *TheRec, DagInit *Pat, bool isInput,
CodeGenDAGPatterns &cdp)
: TheRecord(TheRec), CDP(cdp), isInputPattern(isInput), HasError(false),
Infer(*this) {
Trees.push_back(ParseTreePattern(Pat, ""));
}
-TreePattern::TreePattern(Record *TheRec, TreePatternNodePtr Pat, bool isInput,
- CodeGenDAGPatterns &cdp)
+TreePattern::TreePattern(const Record *TheRec, TreePatternNodePtr Pat,
+ bool isInput, CodeGenDAGPatterns &cdp)
: TheRecord(TheRec), CDP(cdp), isInputPattern(isInput), HasError(false),
Infer(*this) {
Trees.push_back(Pat);
@@ -3389,7 +3390,7 @@ static bool HandleUse(TreePattern &I, TreePatternNodePtr Pat,
return false;
}
- Record *Rec;
+ const Record *Rec;
if (Pat->isLeaf()) {
DefInit *DI = dyn_cast<DefInit>(Pat->getLeafValue());
if (!DI)
@@ -3408,7 +3409,7 @@ static bool HandleUse(TreePattern &I, TreePatternNodePtr Pat,
Slot = Pat;
return true;
}
- Record *SlotRec;
+ const Record *SlotRec;
if (Slot->isLeaf()) {
SlotRec = cast<DefInit>(Slot->getLeafValue())->getDef();
} else {
@@ -3633,7 +3634,8 @@ class InstAnalyzer {
};
static bool InferFromPattern(CodeGenInstruction &InstInfo,
- const InstAnalyzer &PatInfo, Record *PatDef) {
+ const InstAnalyzer &PatInfo,
+ const Record *PatDef) {
bool Error = false;
// Remember where InstInfo got its flags.
@@ -3729,7 +3731,7 @@ static bool hasNullFragReference(ListInit *LI) {
/// Get all the instructions in a tree.
static void getInstructionsInTree(TreePatternNode &Tree,
- SmallVectorImpl<Record *> &Instrs) {
+ SmallVectorImpl<const Record *> &Instrs) {
if (Tree.isLeaf())
return;
if (Tree.getOperator()->isSubClassOf("Instruction"))
@@ -3935,8 +3937,7 @@ void CodeGenDAGPatterns::parseInstructionPattern(CodeGenInstruction &CGI,
// Create and insert the instruction.
// FIXME: InstImpResults should not be part of DAGInstruction.
- Record *R = I.getRecord();
- DAGInsts.try_emplace(R, std::move(Results), std::move(Operands),
+ DAGInsts.try_emplace(I.getRecord(), std::move(Results), std::move(Operands),
std::move(InstImpResults), SrcPattern, ResultPattern);
LLVM_DEBUG(I.dump());
@@ -3989,9 +3990,7 @@ void CodeGenDAGPatterns::ParseInstructions() {
}
// If we can, convert the instructions to be patterns that are matched!
- for (auto &Entry : Instructions) {
- Record *Instr = Entry.first;
- DAGInstruction &TheInst = Entry.second;
+ for (const auto &[Instr, TheInst] : Instructions) {
TreePatternNodePtr SrcPattern = TheInst.getSrcPattern();
TreePatternNodePtr ResultPattern = TheInst.getResultPattern();
@@ -4078,7 +4077,7 @@ void CodeGenDAGPatterns::InferInstructionFlags() {
for (const PatternToMatch &PTM : ptms()) {
// We can only infer from single-instruction patterns, otherwise we won't
// know which instruction should get the flags.
- SmallVector<Record *, 8> PatInstrs;
+ SmallVector<const Record *, 8> PatInstrs;
getInstructionsInTree(PTM.getDstPattern(), PatInstrs);
if (PatInstrs.size() != 1)
continue;
@@ -4135,7 +4134,7 @@ void CodeGenDAGPatterns::InferInstructionFlags() {
void CodeGenDAGPatterns::VerifyInstructionFlags() {
unsigned Errors = 0;
for (const PatternToMatch &PTM : ptms()) {
- SmallVector<Record *, 8> Instrs;
+ SmallVector<const Record *, 8> Instrs;
getInstructionsInTree(PTM.getDstPattern(), Instrs);
if (Instrs.empty())
continue;
@@ -4245,7 +4244,7 @@ static TreePatternNodePtr PromoteXForms(TreePatternNodePtr N) {
}
void CodeGenDAGPatterns::ParseOnePattern(
- Record *TheDef, TreePattern &Pattern, TreePattern &Result,
+ const Record *TheDef, TreePattern &Pattern, TreePattern &Result,
const std::vector<Record *> &InstImpResults, bool ShouldIgnore) {
// Inline pattern fragments and expand multiple alternatives.
@@ -4591,7 +4590,7 @@ GatherChildrenOfAssociativeOpcode(TreePatternNodePtr N,
std::vector<TreePatternNodePtr> &Children) {
assert(N->getNumChildren() == 2 &&
"Associative but doesn't have 2 children!");
- Record *Operator = N->getOperator();
+ const Record *Operator = N->getOperator();
// Only permit raw nodes.
if (!N->getName().empty() || !N->getPredicateCalls().empty() ||
diff --git a/llvm/utils/TableGen/Common/CodeGenDAGPatterns.h b/llvm/utils/TableGen/Common/CodeGenDAGPatterns.h
index 88a543793fd471..4dc08e617d1fd6 100644
--- a/llvm/utils/TableGen/Common/CodeGenDAGPatterns.h
+++ b/llvm/utils/TableGen/Common/CodeGenDAGPatterns.h
@@ -634,7 +634,7 @@ class TreePatternNode : public RefCountedBase<TreePatternNode> {
/// OperatorOrVal - The Record for the operator if this is an interior node
/// (not a leaf) or the init value (e.g. the "GPRC" record, or "7") for a
/// leaf.
- PointerUnion<Record *, Init *> OperatorOrVal;
+ PointerUnion<const Record *, Init *> OperatorOrVal;
/// Name - The name given to this node with the :$foo notation.
///
@@ -657,7 +657,7 @@ class TreePatternNode : public RefCountedBase<TreePatternNode> {
const Record *GISelFlags = nullptr;
public:
- TreePatternNode(Record *Op, std::vector<TreePatternNodePtr> Ch,
+ TreePatternNode(const Record *Op, std::vector<TreePatternNodePtr> Ch,
unsigned NumResults)
: OperatorOrVal(Op), TransformFn(nullptr), Children(std::move(Ch)) {
Types.resize(NumResults);
@@ -717,9 +717,9 @@ class TreePatternNode : public RefCountedBase<TreePatternNode> {
assert(isLeaf());
return cast<Init *>(OperatorOrVal);
}
- Record *getOperator() const {
+ const Record *getOperator() const {
assert(!isLeaf());
- return cast<Record *>(OperatorOrVal);
+ return cast<const Record *>(OperatorOrVal);
}
unsigned getNumChildren() const { return Children.size(); }
@@ -878,7 +878,7 @@ class TreePattern {
/// TheRecord - The actual TableGen record corresponding to this pattern.
///
- Record *TheRecord;
+ const Record *TheRecord;
/// Args - This is a list of all of the arguments to this pattern (for
/// PatFrag patterns), which are the 'node' markers in this pattern.
@@ -908,11 +908,11 @@ class TreePattern {
public:
/// TreePattern constructor - Parse the specified DagInits into the
/// current record.
- TreePattern(Record *TheRec, ListInit *RawPat, bool isInput,
+ TreePattern(const Record *TheRec, ListInit *RawPat, bool isInput,
CodeGenDAGPatterns &ise);
- TreePattern(Record *TheRec, DagInit *Pat, bool isInput,
+ TreePattern(const Record *TheRec, DagInit *Pat, bool isInput,
CodeGenDAGPatterns &ise);
- TreePattern(Record *TheRec, TreePatternNodePtr Pat, bool isInput,
+ TreePattern(const Record *TheRec, TreePatternNodePtr Pat, bool isInput,
CodeGenDAGPatterns &ise);
/// getTrees - Return the tree patterns which corresponds to this pattern.
@@ -935,7 +935,7 @@ class TreePattern {
/// getRecord - Return the actual TableGen record corresponding to this
/// pattern.
///
- Record *getRecord() const { return TheRecord; }
+ const Record *getRecord() const { return TheRecord; }
unsigned getNumArgs() const { return Args.size(); }
const std::string &getArgName(unsigned i) const {
@@ -1054,7 +1054,7 @@ class DAGInstruction {
/// PatternToMatch - Used by CodeGenDAGPatterns to keep tab of patterns
/// processed to produce isel.
class PatternToMatch {
- Record *SrcRecord; // Originating Record for the pattern.
+ const Record *SrcRecord; // Originating Record for the pattern.
ListInit *Predicates; // Top level predicate conditions to match.
TreePatternNodePtr SrcPattern; // Source pattern to match.
TreePatternNodePtr DstPattern; // Resulting pattern.
@@ -1065,16 +1065,16 @@ class PatternToMatch {
unsigned ID; // Unique ID for the record.
public:
- PatternToMatch(Record *srcrecord, ListInit *preds, TreePatternNodePtr src,
- TreePatternNodePtr dst, std::vector<Record *> dstregs,
- int complexity, unsigned uid, bool ignore,
- const Twine &hwmodefeatures = "")
+ PatternToMatch(const Record *srcrecord, ListInit *preds,
+ TreePatternNodePtr src, TreePatternNodePtr dst,
+ std::vector<Record *> dstregs, int complexity, unsigned uid,
+ bool ignore, const Twine &hwmodefeatures = "")
: SrcRecord(srcrecord), Predicates(preds), SrcPattern(src),
DstPattern(dst), Dstregs(std::move(dstregs)),
HwModeFeatures(hwmodefeatures.str()), AddedComplexity(complexity),
GISelShouldIgnore(ignore), ID(uid) {}
- Record *getSrcRecord() const { return SrcRecord; }
+ const Record *getSrcRecord() const { return SrcRecord; }
ListInit *getPredicates() const { return Predicates; }
TreePatternNode &getSrcPattern() const { return *SrcPattern; }
TreePatternNodePtr getSrcPatternShared() const { return SrcPattern; }
@@ -1099,14 +1099,14 @@ class CodeGenDAGPatterns {
CodeGenTarget Target;
CodeGenIntrinsicTable Intrinsics;
- std::map<Record *, SDNodeInfo, LessRecordByID> SDNodes;
- std::map<Record *, std::pair<Record *, std::string>, LessRecordByID>
+ std::map<const Record *, SDNodeInfo, LessRecordByID> SDNodes;
+ std::map<const Record *, std::pair<Record *, std::string>, LessRecordByID>
SDNodeXForms;
- std::map<Record *, ComplexPattern, LessRecordByID> ComplexPatterns;
- std::map<Record *, std::unique_ptr<TreePattern>, LessRecordByID>
+ std::map<const Record *, ComplexPattern, LessRecordByID> ComplexPatterns;
+ std::map<const Record *, std::unique_ptr<TreePattern>, LessRecordByID>
PatternFragments;
std::map<const Record *, DAGDefaultOperand, LessRecordByID> DefaultOperands;
- std::map<Record *, DAGInstruction, LessRecordByID> Instructions;
+ std::map<const Record *, DAGInstruction, LessRecordByID> Instructions;
// Specific SDNode definitions:
Record *intrinsic_void_sdnode;
@@ -1134,7 +1134,7 @@ class CodeGenDAGPatterns {
Record *getSDNodeNamed(StringRef Name) const;
- const SDNodeInfo &getSDNodeInfo(Record *R) const {
+ const SDNodeInfo &getSDNodeInfo(const Record *R) const {
auto F = SDNodes.find(R);
assert(F != SDNodes.end() && "Unknown node!");
return F->second;
@@ -1142,19 +1142,19 @@ class CodeGenDAGPatterns {
// Node transformation lookups.
typedef std::pair<Record *, std::string> NodeXForm;
- const NodeXForm &getSDNodeTransform(Record *R) const {
+ const NodeXForm &getSDNodeTransform(const Record *R) const {
auto F = SDNodeXForms.find(R);
assert(F != SDNodeXForms.end() && "Invalid transform!");
return F->second;
}
- const ComplexPattern &getComplexPattern(Record *R) const {
+ const ComplexPattern &getComplexPattern(const Record *R) const {
auto F = ComplexPatterns.find(R);
assert(F != ComplexPatterns.end() && "Unknown addressing mode!");
return F->second;
}
- const CodeGenIntrinsic &getIntrinsic(Record *R) const {
+ const CodeGenIntrinsic &getIntrinsic(const Record *R) const {
for (unsigned i = 0, e = Intrinsics.size(); i != e; ++i)
if (Intrinsics[i].TheDef == R)
return Intrinsics[i];
@@ -1181,20 +1181,19 @@ class CodeGenDAGPatterns {
}
// Pattern Fragment information.
- TreePattern *getPatternFragment(Record *R) const {
+ TreePattern *getPatternFragment(const Record *R) const {
auto F = PatternFragments.find(R);
assert(F != PatternFragments.end() && "Invalid pattern fragment request!");
return F->second.get();
}
- TreePattern *getPatternFragmentIfRead(Record *R) const {
+ TreePattern *getPatternFragmentIfRead(const Record *R) const {
auto F = PatternFragments.find(R);
if (F == PatternFragments.end())
return nullptr;
return F->second.get();
}
- typedef std::map<Record *, std::unique_ptr<TreePattern>,
- LessRecordByID>::const_iterator pf_iterator;
+ using pf_iterator = decltype(PatternFragments)::const_iterator;
pf_iterator pf_begin() const { return PatternFragments.begin(); }
pf_iterator pf_end() const { return PatternFragments.end(); }
iterator_range<pf_iterator> ptfs() const { return PatternFragments; }
@@ -1206,11 +1205,11 @@ class CodeGenDAGPatterns {
iterator_range<ptm_iterator> ptms() const { return PatternsToMatch; }
/// Parse the Pattern for an instruction, and insert the result in DAGInsts.
- typedef std::map<Record *, DAGInstruction, LessRecordByID> DAGInstMap;
+ typedef std::map<const Record *, DAGInstruction, LessRecordByID> DAGInstMap;
void parseInstructionPattern(CodeGenInstruction &CGI, ListInit *Pattern,
DAGInstMap &DAGInsts);
- const DAGInstruction &getInstruction(Record *R) const {
+ const DAGInstruction &getInstruction(const Record *R) const {
auto F = Instructions.find(R);
assert(F != Instructions.end() && "Unknown instruction!");
return F->second;
@@ -1244,7 +1243,7 @@ class CodeGenDAGPatterns {
void GenerateVariants();
void VerifyInstructionFlags();
- void ParseOnePattern(Record *TheDef, TreePattern &Pattern,
+ void ParseOnePattern(const Record *TheDef, TreePattern &Pattern,
TreePattern &Result,
const std::vector<Record *> &InstImpResults,
bool ShouldIgnore = false);
diff --git a/llvm/utils/TableGen/Common/CodeGenInstruction.cpp b/llvm/utils/TableGen/Common/CodeGenInstruction.cpp
index 1cc217b46a7ee6..8d698fa9aa36d0 100644
--- a/llvm/utils/TableGen/Common/CodeGenInstruction.cpp
+++ b/llvm/utils/TableGen/Common/CodeGenInstruction.cpp
@@ -298,7 +298,8 @@ CGIOperandList::ParseOperandName(StringRef Op, bool AllowWholeOp) {
return std::pair(0U, 0U);
}
-static void ParseConstraint(StringRef CStr, CGIOperandList &Ops, Record *Rec) {
+static void ParseConstraint(StringRef CStr, CGIOperandList &Ops,
+ const Record *Rec) {
// EARLY_CLOBBER: @early $reg
StringRef::size_type wpos = CStr.find_first_of(" \t");
StringRef::size_type start = CStr.find_first_not_of(" \t");
@@ -391,7 +392,8 @@ static void ParseConstraint(StringRef CStr, CGIOperandList &Ops, Record *Rec) {
Ops[SrcOp.first].Constraints[SrcOp.second] = NewConstraint;
}
-static void ParseConstraints(StringRef CStr, CGIOperandList &Ops, Record *Rec) {
+static void ParseConstraints(StringRef CStr, CGIOperandList &Ops,
+ const Record *Rec) {
if (CStr.empty())
return;
@@ -428,7 +430,7 @@ void CGIOperandList::ProcessDisableEncoding(StringRef DisableEncoding) {
// CodeGenInstruction Implementation
//===----------------------------------------------------------------------===//
-CodeGenInstruction::CodeGenInstruction(Record *R)
+CodeGenInstruction::CodeGenInstruction(const Record *R)
: TheDef(R), Operands(R), InferredFrom(nullptr) {
Namespace = R->getValueAsString("Namespace");
AsmString = std::string(R->getValueAsString("AsmString"));
@@ -501,7 +503,7 @@ CodeGenInstruction::CodeGenInstruction(Record *R)
HasComplexDeprecationPredicate = true;
DeprecatedReason =
std::string(R->getValueAsString("ComplexDeprecationPredicate"));
- } else if (RecordVal *Dep = R->getValue("DeprecatedFeatureMask")) {
+ } else if (const RecordVal *Dep = R->getValue("DeprecatedFeatureMask")) {
// Check if we have a Subtarget feature mask.
HasComplexDeprecationPredicate = false;
DeprecatedReason = Dep->getValue()->getAsString();
diff --git a/llvm/utils/TableGen/Common/CodeGenInstruction.h b/llvm/utils/TableGen/Common/CodeGenInstruction.h
index f4af0e876060e0..3d4360fcfda706 100644
--- a/llvm/utils/TableGen/Common/CodeGenInstruction.h
+++ b/llvm/utils/TableGen/Common/CodeGenInstruction.h
@@ -222,8 +222,8 @@ class CGIOperandList {
class CodeGenInstruction {
public:
- Record *TheDef; // The actual record defining this instruction.
- StringRef Namespace; // The namespace the instruction is in.
+ const Record *TheDef; // The actual record defining this instruction.
+ StringRef Namespace; // The namespace the instruction is in.
/// AsmString - The format string used to emit a .s file for the
/// instruction.
@@ -297,12 +297,12 @@ class CodeGenInstruction {
// The record used to infer instruction flags, or NULL if no flag values
// have been inferred.
- Record *InferredFrom;
+ const Record *InferredFrom;
// The enum value assigned by CodeGenTarget::computeInstrsByEnum.
mutable unsigned EnumVal = 0;
- CodeGenInstruction(Record *R);
+ CodeGenInstruction(const Record *R);
/// HasOneImplicitDefWithKnownVT - If the instruction has at least one
/// implicit def and it has a known VT, return the VT, otherwise return
diff --git a/llvm/utils/TableGen/Common/CodeGenSchedule.cpp b/llvm/utils/TableGen/Common/CodeGenSchedule.cpp
index 0a48feab867cf6..3dcfdc936cd812 100644
--- a/llvm/utils/TableGen/Common/CodeGenSchedule.cpp
+++ b/llvm/utils/TableGen/Common/CodeGenSchedule.cpp
@@ -609,7 +609,7 @@ void CodeGenSchedModels::collectSchedRW() {
// Find all SchedReadWrites referenced by instruction defs.
RecVec SWDefs, SRDefs;
for (const CodeGenInstruction *Inst : Target.getInstructionsByEnumValue()) {
- Record *SchedDef = Inst->TheDef;
+ const Record *SchedDef = Inst->TheDef;
if (SchedDef->isValueUnset("SchedRW"))
continue;
RecVec RWs = SchedDef->getValueAsListOfDefs("SchedRW");
diff --git a/llvm/utils/TableGen/Common/DAGISelMatcher.h b/llvm/utils/TableGen/Common/DAGISelMatcher.h
index 81a5e3e050f272..49dc4726552af6 100644
--- a/llvm/utils/TableGen/Common/DAGISelMatcher.h
+++ b/llvm/utils/TableGen/Common/DAGISelMatcher.h
@@ -983,14 +983,14 @@ class EmitCopyToRegMatcher : public Matcher {
/// recorded node and records the result.
class EmitNodeXFormMatcher : public Matcher {
unsigned Slot;
- Record *NodeXForm;
+ const Record *NodeXForm;
public:
- EmitNodeXFormMatcher(unsigned slot, Record *nodeXForm)
+ EmitNodeXFormMatcher(unsigned slot, const Record *nodeXForm)
: Matcher(EmitNodeXForm), Slot(slot), NodeXForm(nodeXForm) {}
unsigned getSlot() const { return Slot; }
- Record *getNodeXForm() const { return NodeXForm; }
+ const Record *getNodeXForm() const { return NodeXForm; }
static bool classof(const Matcher *N) {
return N->getKind() == EmitNodeXForm;
diff --git a/llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.cpp b/llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.cpp
index 139bf2d8218032..0779b1e3502d2b 100644
--- a/llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.cpp
+++ b/llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.cpp
@@ -822,7 +822,7 @@ SaveAndRestore<GISelFlags> RuleMatcher::setGISelFlags(const Record *R) {
}
Error RuleMatcher::defineComplexSubOperand(StringRef SymbolicName,
- Record *ComplexPattern,
+ const Record *ComplexPattern,
unsigned RendererID,
unsigned SubOperandID,
StringRef ParentSymbolicName) {
diff --git a/llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.h b/llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.h
index 5b517b117ca823..94f26d85488af6 100644
--- a/llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.h
+++ b/llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.h
@@ -523,7 +523,7 @@ class RuleMatcher : public Matcher {
ArrayRef<SMLoc> SrcLoc;
- typedef std::tuple<Record *, unsigned, unsigned>
+ typedef std::tuple<const Record *, unsigned, unsigned>
DefinedComplexPatternSubOperand;
typedef StringMap<DefinedComplexPatternSubOperand>
DefinedComplexPatternSubOperandMap;
@@ -649,7 +649,8 @@ class RuleMatcher : public Matcher {
void definePhysRegOperand(Record *Reg, OperandMatcher &OM);
- Error defineComplexSubOperand(StringRef SymbolicName, Record *ComplexPattern,
+ Error defineComplexSubOperand(StringRef SymbolicName,
+ const Record *ComplexPattern,
unsigned RendererID, unsigned SubOperandID,
StringRef ParentSymbolicName);
diff --git a/llvm/utils/TableGen/Common/VarLenCodeEmitterGen.cpp b/llvm/utils/TableGen/Common/VarLenCodeEmitterGen.cpp
index 049bd37dc83e58..ce4cd354540d04 100644
--- a/llvm/utils/TableGen/Common/VarLenCodeEmitterGen.cpp
+++ b/llvm/utils/TableGen/Common/VarLenCodeEmitterGen.cpp
@@ -77,7 +77,7 @@ class VarLenCodeEmitterGen {
// name suffix to improve readability of the generated code.
std::map<AltEncodingTy, std::string> Modes;
- DenseMap<Record *, DenseMap<AltEncodingTy, VarLenInst>> VarLenInsts;
+ DenseMap<const Record *, DenseMap<AltEncodingTy, VarLenInst>> VarLenInsts;
// Emit based values (i.e. fixed bits in the encoded instructions)
void emitInstructionBaseValues(
@@ -227,7 +227,7 @@ void VarLenCodeEmitterGen::run(raw_ostream &OS) {
auto NumberedInstructions = Target.getInstructionsByEnumValue();
for (const CodeGenInstruction *CGI : NumberedInstructions) {
- Record *R = CGI->TheDef;
+ const Record *R = CGI->TheDef;
// Create the corresponding VarLenInst instance.
if (R->getValueAsString("Namespace") == "TargetOpcode" ||
R->getValueAsBit("isPseudo"))
@@ -249,7 +249,7 @@ void VarLenCodeEmitterGen::run(raw_ostream &OS) {
continue;
}
}
- RecordVal *RV = R->getValue("Inst");
+ const RecordVal *RV = R->getValue("Inst");
DagInit *DI = cast<DagInit>(RV->getValue());
VarLenInsts[R].insert({Universal, VarLenInst(DI, RV)});
}
@@ -356,7 +356,7 @@ void VarLenCodeEmitterGen::emitInstructionBaseValues(
unsigned NumFixedValueWords = 0U;
for (const CodeGenInstruction *CGI : NumberedInstructions) {
- Record *R = CGI->TheDef;
+ const Record *R = CGI->TheDef;
if (R->getValueAsString("Namespace") == "TargetOpcode" ||
R->getValueAsBit("isPseudo")) {
diff --git a/llvm/utils/TableGen/DAGISelEmitter.cpp b/llvm/utils/TableGen/DAGISelEmitter.cpp
index b43a8e659dd9c5..6c72103f6251f5 100644
--- a/llvm/utils/TableGen/DAGISelEmitter.cpp
+++ b/llvm/utils/TableGen/DAGISelEmitter.cpp
@@ -47,7 +47,7 @@ static unsigned getResultPatternCost(TreePatternNode &P,
return 0;
unsigned Cost = 0;
- Record *Op = P.getOperator();
+ const Record *Op = P.getOperator();
if (Op->isSubClassOf("Instruction")) {
Cost++;
CodeGenInstruction &II = CGP.getTargetInfo().getInstruction(Op);
@@ -67,7 +67,7 @@ static unsigned getResultPatternSize(TreePatternNode &P,
return 0;
unsigned Cost = 0;
- Record *Op = P.getOperator();
+ const Record *Op = P.getOperator();
if (Op->isSubClassOf("Instruction")) {
Cost += Op->getValueAsInt("CodeSize");
}
diff --git a/llvm/utils/TableGen/DAGISelMatcherEmitter.cpp b/llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
index 1b93e3d5e3b705..c7642439422774 100644
--- a/llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
+++ b/llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
@@ -64,8 +64,8 @@ class MatcherTableEmitter {
std::vector<const ComplexPattern *> ComplexPatterns;
- DenseMap<Record *, unsigned> NodeXFormMap;
- std::vector<Record *> NodeXForms;
+ DenseMap<const Record *, unsigned> NodeXFormMap;
+ std::vector<const Record *> NodeXForms;
std::vector<std::string> VecIncludeStrings;
MapVector<std::string, unsigned, StringMap<unsigned>> VecPatterns;
@@ -203,7 +203,7 @@ class MatcherTableEmitter {
return llvm::find(ComplexPatterns, &P) - ComplexPatterns.begin();
}
- unsigned getNodeXFormID(Record *Rec) {
+ unsigned getNodeXFormID(const Record *Rec) {
unsigned &Entry = NodeXFormMap[Rec];
if (Entry == 0) {
NodeXForms.push_back(Rec);
@@ -930,7 +930,7 @@ unsigned MatcherTableEmitter::EmitMatcher(const Matcher *N,
GetPatFromTreePatternNode(SNT->getPattern().getSrcPattern());
std::string dst =
GetPatFromTreePatternNode(SNT->getPattern().getDstPattern());
- Record *PatRecord = SNT->getPattern().getSrcRecord();
+ const Record *PatRecord = SNT->getPattern().getSrcRecord();
std::string include_src = getIncludePath(PatRecord);
unsigned Offset =
getPatternIdxFromTable(src + " -> " + dst, std::move(include_src));
@@ -1043,7 +1043,7 @@ unsigned MatcherTableEmitter::EmitMatcher(const Matcher *N,
GetPatFromTreePatternNode(CM->getPattern().getSrcPattern());
std::string dst =
GetPatFromTreePatternNode(CM->getPattern().getDstPattern());
- Record *PatRecord = CM->getPattern().getSrcRecord();
+ const Record *PatRecord = CM->getPattern().getSrcRecord();
std::string include_src = getIncludePath(PatRecord);
unsigned Offset =
getPatternIdxFromTable(src + " -> " + dst, std::move(include_src));
diff --git a/llvm/utils/TableGen/DAGISelMatcherGen.cpp b/llvm/utils/TableGen/DAGISelMatcherGen.cpp
index 4e65690ae782c6..bb8f4dcb85a1d8 100644
--- a/llvm/utils/TableGen/DAGISelMatcherGen.cpp
+++ b/llvm/utils/TableGen/DAGISelMatcherGen.cpp
@@ -746,7 +746,7 @@ void MatcherGen::EmitResultLeafAsOperand(const TreePatternNode &N,
static bool mayInstNodeLoadOrStore(const TreePatternNode &N,
const CodeGenDAGPatterns &CGP) {
- Record *Op = N.getOperator();
+ const Record *Op = N.getOperator();
const CodeGenTarget &CGT = CGP.getTargetInfo();
CodeGenInstruction &II = CGT.getInstruction(Op);
return II.mayLoad || II.mayStore;
@@ -757,7 +757,7 @@ static unsigned numNodesThatMayLoadOrStore(const TreePatternNode &N,
if (N.isLeaf())
return 0;
- Record *OpRec = N.getOperator();
+ const Record *OpRec = N.getOperator();
if (!OpRec->isSubClassOf("Instruction"))
return 0;
@@ -773,7 +773,7 @@ static unsigned numNodesThatMayLoadOrStore(const TreePatternNode &N,
void MatcherGen::EmitResultInstructionAsOperand(
const TreePatternNode &N, SmallVectorImpl<unsigned> &OutputOps) {
- Record *Op = N.getOperator();
+ const Record *Op = N.getOperator();
const CodeGenTarget &CGT = CGP.getTargetInfo();
CodeGenInstruction &II = CGT.getInstruction(Op);
const DAGInstruction &Inst = CGP.getInstruction(Op);
@@ -1010,7 +1010,7 @@ void MatcherGen::EmitResultOperand(const TreePatternNode &N,
if (N.isLeaf())
return EmitResultLeafAsOperand(N, ResultOps);
- Record *OpRec = N.getOperator();
+ const Record *OpRec = N.getOperator();
if (OpRec->isSubClassOf("Instruction"))
return EmitResultInstructionAsOperand(N, ResultOps);
if (OpRec->isSubClassOf("SDNodeXForm"))
diff --git a/llvm/utils/TableGen/FastISelEmitter.cpp b/llvm/utils/TableGen/FastISelEmitter.cpp
index 2ef98b3922f487..01df873ece1fcf 100644
--- a/llvm/utils/TableGen/FastISelEmitter.cpp
+++ b/llvm/utils/TableGen/FastISelEmitter.cpp
@@ -236,7 +236,7 @@ struct OperandsSignature {
// not needed and just bloat the fast instruction selector. For
// example, X86 doesn't need to generate code to match ADD16ri8 since
// ADD16ri will do just fine.
- Record *Rec = PredFn.getOrigPatFragRecord()->getRecord();
+ const Record *Rec = PredFn.getOrigPatFragRecord()->getRecord();
if (Rec->getValueAsBit("FastIselShouldIgnore"))
return false;
@@ -417,7 +417,7 @@ class FastISelMap {
};
} // End anonymous namespace
-static std::string getOpcodeName(Record *Op, CodeGenDAGPatterns &CGP) {
+static std::string getOpcodeName(const Record *Op, CodeGenDAGPatterns &CGP) {
return std::string(CGP.getSDNodeInfo(Op).getEnumName());
}
@@ -461,7 +461,7 @@ void FastISelMap::collectPatterns(CodeGenDAGPatterns &CGP) {
TreePatternNode &Dst = Pattern.getDstPattern();
if (Dst.isLeaf())
continue;
- Record *Op = Dst.getOperator();
+ const Record *Op = Dst.getOperator();
if (!Op->isSubClassOf("Instruction"))
continue;
CodeGenInstruction &II = CGP.getTargetInfo().getInstruction(Op);
@@ -524,7 +524,7 @@ void FastISelMap::collectPatterns(CodeGenDAGPatterns &CGP) {
if (InstPatNode.getNumTypes() > 1)
continue;
- Record *InstPatOp = InstPatNode.getOperator();
+ const Record *InstPatOp = InstPatNode.getOperator();
std::string OpcodeName = getOpcodeName(InstPatOp, CGP);
MVT::SimpleValueType RetVT = MVT::isVoid;
if (InstPatNode.getNumTypes())
diff --git a/llvm/utils/TableGen/GlobalISelEmitter.cpp b/llvm/utils/TableGen/GlobalISelEmitter.cpp
index b2f4d32ad96224..d82f1c369533e0 100644
--- a/llvm/utils/TableGen/GlobalISelEmitter.cpp
+++ b/llvm/utils/TableGen/GlobalISelEmitter.cpp
@@ -120,7 +120,7 @@ static std::string explainPredicates(const TreePatternNode &N) {
if (P.isTruncStore())
Explanation += " truncstore";
- if (Record *VT = P.getMemoryVT())
+ if (const Record *VT = P.getMemoryVT())
Explanation += (" MemVT=" + VT->getName()).str();
if (Record *VT = P.getScalarMemoryVT())
Explanation += (" ScalarVT(MemVT)=" + VT->getName()).str();
@@ -168,7 +168,7 @@ static std::string explainPredicates(const TreePatternNode &N) {
return Explanation;
}
-std::string explainOperator(Record *Operator) {
+std::string explainOperator(const Record *Operator) {
if (Operator->isSubClassOf("SDNode"))
return (" (" + Operator->getValueAsString("Opcode") + ")").str();
@@ -346,7 +346,7 @@ class GlobalISelEmitter final : public GlobalISelMatchTableExecutorEmitter {
/// SDNodes to the GINodeEquiv mapping. We need to map to the GINodeEquiv to
/// check for attributes on the relation such as CheckMMOIsNonAtomic.
/// This is defined using 'GINodeEquiv' in the target description.
- DenseMap<Record *, Record *> NodeEquivs;
+ DenseMap<const Record *, Record *> NodeEquivs;
/// Keep track of the equivalence between ComplexPattern's and
/// GIComplexOperandMatcher. Map entries are specified by subclassing
@@ -379,7 +379,7 @@ class GlobalISelEmitter final : public GlobalISelMatchTableExecutorEmitter {
void gatherTypeIDValues();
void gatherNodeEquivs();
- Record *findNodeEquiv(Record *N) const;
+ Record *findNodeEquiv(const Record *N) const;
const CodeGenInstruction *getEquivNode(Record &Equiv,
const TreePatternNode &N) const;
@@ -388,7 +388,7 @@ class GlobalISelEmitter final : public GlobalISelMatchTableExecutorEmitter {
createAndImportSelDAGMatcher(RuleMatcher &Rule,
InstructionMatcher &InsnMatcher,
const TreePatternNode &Src, unsigned &TempOpIdx);
- Error importComplexPatternOperandMatcher(OperandMatcher &OM, Record *R,
+ Error importComplexPatternOperandMatcher(OperandMatcher &OM, const Record *R,
unsigned &TempOpIdx) const;
Error importChildMatcher(RuleMatcher &Rule, InstructionMatcher &InsnMatcher,
const TreePatternNode &SrcChild,
@@ -504,7 +504,7 @@ void GlobalISelEmitter::gatherNodeEquivs() {
}
}
-Record *GlobalISelEmitter::findNodeEquiv(Record *N) const {
+Record *GlobalISelEmitter::findNodeEquiv(const Record *N) const {
return NodeEquivs.lookup(N);
}
@@ -928,7 +928,7 @@ Expected<InstructionMatcher &> GlobalISelEmitter::createAndImportSelDAGMatcher(
}
Error GlobalISelEmitter::importComplexPatternOperandMatcher(
- OperandMatcher &OM, Record *R, unsigned &TempOpIdx) const {
+ OperandMatcher &OM, const Record *R, unsigned &TempOpIdx) const {
const auto &ComplexPattern = ComplexPatternEquivs.find(R);
if (ComplexPattern == ComplexPatternEquivs.end())
return failedImport("SelectionDAG ComplexPattern (" + R->getName() +
@@ -1508,7 +1508,7 @@ GlobalISelEmitter::createAndImportSubInstructionRenderer(
Expected<action_iterator> GlobalISelEmitter::createInstructionRenderer(
action_iterator InsertPt, RuleMatcher &M, const TreePatternNode &Dst) {
- Record *DstOp = Dst.getOperator();
+ const Record *DstOp = Dst.getOperator();
if (!DstOp->isSubClassOf("Instruction")) {
if (DstOp->isSubClassOf("ValueType"))
return failedImport(
@@ -1813,7 +1813,7 @@ GlobalISelEmitter::inferRegClassFromPattern(const TreePatternNode &N) {
// just take the first one).
if (N.getNumTypes() < 1)
return std::nullopt;
- Record *OpRec = N.getOperator();
+ const Record *OpRec = N.getOperator();
// We only want instructions.
if (!OpRec->isSubClassOf("Instruction"))
@@ -2011,7 +2011,7 @@ Expected<RuleMatcher> GlobalISelEmitter::runOnPattern(const PatternToMatch &P) {
}
// Start with the defined operands (i.e., the results of the root operator).
- Record *DstOp = Dst.getOperator();
+ const Record *DstOp = Dst.getOperator();
if (!DstOp->isSubClassOf("Instruction"))
return failedImport("Pattern operator isn't an instruction");
diff --git a/llvm/utils/TableGen/InstrDocsEmitter.cpp b/llvm/utils/TableGen/InstrDocsEmitter.cpp
index f948540e18dbd8..f53428ecdffede 100644
--- a/llvm/utils/TableGen/InstrDocsEmitter.cpp
+++ b/llvm/utils/TableGen/InstrDocsEmitter.cpp
@@ -73,7 +73,7 @@ static void EmitInstrDocs(RecordKeeper &RK, raw_ostream &OS) {
OS << "\n";
for (const CodeGenInstruction *II : Target.getInstructionsByEnumValue()) {
- Record *Inst = II->TheDef;
+ const Record *Inst = II->TheDef;
// Don't print the target-independent instructions.
if (II->Namespace == "TargetOpcode")
diff --git a/llvm/utils/TableGen/X86FoldTablesEmitter.cpp b/llvm/utils/TableGen/X86FoldTablesEmitter.cpp
index 0fc930be8c5526..8952c8e0a1c6f1 100644
--- a/llvm/utils/TableGen/X86FoldTablesEmitter.cpp
+++ b/llvm/utils/TableGen/X86FoldTablesEmitter.cpp
@@ -446,7 +446,7 @@ void X86FoldTablesEmitter::addEntryWithFlags(FoldTable &Table,
assert((IsManual || Table.find(RegInst) == Table.end()) &&
"Override entry unexpectedly");
X86FoldTableEntry Result = X86FoldTableEntry(RegInst, MemInst);
- Record *RegRec = RegInst->TheDef;
+ const Record *RegRec = RegInst->TheDef;
Result.NoReverse = S & TB_NO_REVERSE;
Result.NoForward = S & TB_NO_FORWARD;
Result.FoldLoad = S & TB_FOLDED_LOAD;
@@ -537,8 +537,8 @@ void X86FoldTablesEmitter::updateTables(const CodeGenInstruction *RegInst,
uint16_t S, bool IsManual,
bool IsBroadcast) {
- Record *RegRec = RegInst->TheDef;
- Record *MemRec = MemInst->TheDef;
+ const Record *RegRec = RegInst->TheDef;
+ const Record *MemRec = MemInst->TheDef;
unsigned MemOutSize = MemRec->getValueAsDag("OutOperandList")->getNumArgs();
unsigned RegOutSize = RegRec->getValueAsDag("OutOperandList")->getNumArgs();
unsigned MemInSize = MemRec->getValueAsDag("InOperandList")->getNumArgs();
More information about the llvm-commits
mailing list