[llvm] [AMDGPU][MC] Implement fft and rotate modes for ds_swizzle_b32 (PR #108064)

[Matt Arsenault via llvm-commits]

================
@@ -1829,7 +1829,7 @@ class AMDGPUAsmParser : public MCTargetAsmParser {
   bool parseSwizzleOperand(int64_t &Op,
                            const unsigned MinVal,
                            const unsigned MaxVal,
-                           const StringRef ErrMsg,
+                           const Twine ErrMsg,
----------------
arsenm wrote:

const Twine &

https://github.com/llvm/llvm-project/pull/108064